1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-NetBSD 3 * 4 * Copyright (C) 2001 Eduardo Horvath. 5 * Copyright (c) 2007 Marius Strobl <marius@FreeBSD.org> 6 * All rights reserved. 7 * 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 /* 37 * PCI bindings for Apple GMAC and Sun GEM Ethernet controllers 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/bus.h> 43 #include <sys/kernel.h> 44 #include <sys/lock.h> 45 #include <sys/module.h> 46 #include <sys/mutex.h> 47 #include <sys/resource.h> 48 #include <sys/rman.h> 49 #include <sys/socket.h> 50 51 #include <net/ethernet.h> 52 #include <net/if.h> 53 54 #include <machine/bus.h> 55 #if defined(__powerpc__) 56 #include <dev/ofw/ofw_bus.h> 57 #include <dev/ofw/openfirm.h> 58 #include <machine/ofw_machdep.h> 59 #endif 60 #include <machine/resource.h> 61 62 #include <dev/gem/if_gemreg.h> 63 #include <dev/gem/if_gemvar.h> 64 65 #include <dev/pci/pcireg.h> 66 #include <dev/pci/pcivar.h> 67 68 #include "miibus_if.h" 69 70 static int gem_pci_attach(device_t dev); 71 static int gem_pci_detach(device_t dev); 72 static int gem_pci_probe(device_t dev); 73 static int gem_pci_resume(device_t dev); 74 static int gem_pci_suspend(device_t dev); 75 76 static const struct gem_pci_dev { 77 uint32_t gpd_devid; 78 int gpd_variant; 79 const char *gpd_desc; 80 } gem_pci_devlist[] = { 81 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet" }, 82 { 0x0021106b, GEM_APPLE_GMAC, "Apple UniNorth GMAC Ethernet" }, 83 { 0x0024106b, GEM_APPLE_GMAC, "Apple Pangea GMAC Ethernet" }, 84 { 0x0032106b, GEM_APPLE_GMAC, "Apple UniNorth2 GMAC Ethernet" }, 85 { 0x004c106b, GEM_APPLE_K2_GMAC,"Apple K2 GMAC Ethernet" }, 86 { 0x0051106b, GEM_APPLE_GMAC, "Apple Shasta GMAC Ethernet" }, 87 { 0x006b106b, GEM_APPLE_GMAC, "Apple Intrepid 2 GMAC Ethernet" }, 88 { 0, 0, NULL } 89 }; 90 91 static device_method_t gem_pci_methods[] = { 92 /* Device interface */ 93 DEVMETHOD(device_probe, gem_pci_probe), 94 DEVMETHOD(device_attach, gem_pci_attach), 95 DEVMETHOD(device_detach, gem_pci_detach), 96 DEVMETHOD(device_suspend, gem_pci_suspend), 97 DEVMETHOD(device_resume, gem_pci_resume), 98 /* Use the suspend handler here, it is all that is required. */ 99 DEVMETHOD(device_shutdown, gem_pci_suspend), 100 101 /* MII interface */ 102 DEVMETHOD(miibus_readreg, gem_mii_readreg), 103 DEVMETHOD(miibus_writereg, gem_mii_writereg), 104 DEVMETHOD(miibus_statchg, gem_mii_statchg), 105 106 DEVMETHOD_END 107 }; 108 109 static driver_t gem_pci_driver = { 110 "gem", 111 gem_pci_methods, 112 sizeof(struct gem_softc) 113 }; 114 115 DRIVER_MODULE(gem, pci, gem_pci_driver, 0, 0); 116 MODULE_PNP_INFO("W32:vendor/device", pci, gem, gem_pci_devlist, 117 nitems(gem_pci_devlist) - 1); 118 MODULE_DEPEND(gem, pci, 1, 1, 1); 119 MODULE_DEPEND(gem, ether, 1, 1, 1); 120 121 static int 122 gem_pci_probe(device_t dev) 123 { 124 int i; 125 126 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) { 127 if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) { 128 device_set_desc(dev, gem_pci_devlist[i].gpd_desc); 129 return (BUS_PROBE_DEFAULT); 130 } 131 } 132 133 return (ENXIO); 134 } 135 136 static struct resource_spec gem_pci_res_spec[] = { 137 { SYS_RES_IRQ, 0, RF_SHAREABLE | RF_ACTIVE }, /* GEM_RES_INTR */ 138 { SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE }, /* GEM_RES_MEM */ 139 { -1, 0 } 140 }; 141 142 #define GEM_SHARED_PINS "shared-pins" 143 #define GEM_SHARED_PINS_SERDES "serdes" 144 145 static int 146 gem_pci_attach(device_t dev) 147 { 148 struct gem_softc *sc; 149 int i; 150 #if defined(__powerpc__) 151 char buf[sizeof(GEM_SHARED_PINS)]; 152 #else 153 int j; 154 #endif 155 156 sc = device_get_softc(dev); 157 sc->sc_variant = GEM_UNKNOWN; 158 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) { 159 if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) { 160 sc->sc_variant = gem_pci_devlist[i].gpd_variant; 161 break; 162 } 163 } 164 if (sc->sc_variant == GEM_UNKNOWN) { 165 device_printf(dev, "unknown adaptor\n"); 166 return (ENXIO); 167 } 168 169 pci_enable_busmaster(dev); 170 171 sc->sc_dev = dev; 172 173 if (bus_alloc_resources(dev, gem_pci_res_spec, sc->sc_res)) { 174 device_printf(dev, "failed to allocate resources\n"); 175 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res); 176 return (ENXIO); 177 } 178 179 GEM_LOCK_INIT(sc, device_get_nameunit(dev)); 180 181 /* Determine whether we're running at 66MHz. */ 182 if ((GEM_READ_4(sc, GEM_PCI_BIF_CONFIG) & GEM_PCI_BIF_CNF_M66EN) != 0) 183 sc->sc_flags |= GEM_PCI66; 184 185 #if defined(__powerpc__) 186 OF_getetheraddr(dev, sc->sc_enaddr); 187 if (OF_getprop(ofw_bus_get_node(dev), GEM_SHARED_PINS, buf, 188 sizeof(buf)) > 0) { 189 buf[sizeof(buf) - 1] = '\0'; 190 if (strcmp(buf, GEM_SHARED_PINS_SERDES) == 0) 191 sc->sc_flags |= GEM_SERDES; 192 } 193 #else 194 /* 195 * Dig out VPD (vital product data) and read NA (network address). 196 * The VPD resides in the PCI Expansion ROM (PCI FCode) and can't 197 * be accessed via the PCI capability pointer. 198 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later) 199 * chapter 2 describes the data structure. 200 */ 201 202 #define PCI_ROMHDR_SIZE 0x1c 203 #define PCI_ROMHDR_SIG 0x00 204 #define PCI_ROMHDR_SIG_MAGIC 0xaa55 /* little endian */ 205 #define PCI_ROMHDR_PTR_DATA 0x18 206 #define PCI_ROM_SIZE 0x18 207 #define PCI_ROM_SIG 0x00 208 #define PCI_ROM_SIG_MAGIC 0x52494350 /* "PCIR", endian */ 209 /* reversed */ 210 #define PCI_ROM_VENDOR 0x04 211 #define PCI_ROM_DEVICE 0x06 212 #define PCI_ROM_PTR_VPD 0x08 213 #define PCI_VPDRES_BYTE0 0x00 214 #define PCI_VPDRES_ISLARGE(x) ((x) & 0x80) 215 #define PCI_VPDRES_LARGE_NAME(x) ((x) & 0x7f) 216 #define PCI_VPDRES_LARGE_LEN_LSB 0x01 217 #define PCI_VPDRES_LARGE_LEN_MSB 0x02 218 #define PCI_VPDRES_LARGE_SIZE 0x03 219 #define PCI_VPDRES_TYPE_VPD 0x10 /* large */ 220 #define PCI_VPD_KEY0 0x00 221 #define PCI_VPD_KEY1 0x01 222 #define PCI_VPD_LEN 0x02 223 #define PCI_VPD_SIZE 0x03 224 225 #define GEM_ROM_READ_1(sc, offs) \ 226 GEM_READ_1((sc), GEM_PCI_ROM_OFFSET + (offs)) 227 #define GEM_ROM_READ_2(sc, offs) \ 228 GEM_READ_2((sc), GEM_PCI_ROM_OFFSET + (offs)) 229 #define GEM_ROM_READ_4(sc, offs) \ 230 GEM_READ_4((sc), GEM_PCI_ROM_OFFSET + (offs)) 231 232 /* Read PCI Expansion ROM header. */ 233 if (GEM_ROM_READ_2(sc, PCI_ROMHDR_SIG) != PCI_ROMHDR_SIG_MAGIC || 234 (i = GEM_ROM_READ_2(sc, PCI_ROMHDR_PTR_DATA)) < 235 PCI_ROMHDR_SIZE) { 236 device_printf(dev, "unexpected PCI Expansion ROM header\n"); 237 goto fail; 238 } 239 240 /* Read PCI Expansion ROM data. */ 241 if (GEM_ROM_READ_4(sc, i + PCI_ROM_SIG) != PCI_ROM_SIG_MAGIC || 242 GEM_ROM_READ_2(sc, i + PCI_ROM_VENDOR) != pci_get_vendor(dev) || 243 GEM_ROM_READ_2(sc, i + PCI_ROM_DEVICE) != pci_get_device(dev) || 244 (j = GEM_ROM_READ_2(sc, i + PCI_ROM_PTR_VPD)) < 245 i + PCI_ROM_SIZE) { 246 device_printf(dev, "unexpected PCI Expansion ROM data\n"); 247 goto fail; 248 } 249 250 /* 251 * Read PCI VPD. 252 * SUNW,pci-gem cards have a single large resource VPD-R tag 253 * containing one NA. The VPD used is not in PCI 2.2 standard 254 * format however. The length in the resource header is in big 255 * endian and the end tag is non-standard (0x79) and followed 256 * by an all-zero "checksum" byte. Sun calls this a "Fresh 257 * Choice Ethernet" VPD... 258 */ 259 if (PCI_VPDRES_ISLARGE(GEM_ROM_READ_1(sc, 260 j + PCI_VPDRES_BYTE0)) == 0 || 261 PCI_VPDRES_LARGE_NAME(GEM_ROM_READ_1(sc, 262 j + PCI_VPDRES_BYTE0)) != PCI_VPDRES_TYPE_VPD || 263 ((GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_LSB) << 8) | 264 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_MSB)) != 265 PCI_VPD_SIZE + ETHER_ADDR_LEN || 266 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY0) != 267 0x4e /* N */ || 268 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY1) != 269 0x41 /* A */ || 270 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_LEN) != 271 ETHER_ADDR_LEN || 272 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE + 273 ETHER_ADDR_LEN) != 0x79) { 274 device_printf(dev, "unexpected PCI VPD\n"); 275 goto fail; 276 } 277 bus_read_region_1(sc->sc_res[GEM_RES_MEM], 278 GEM_PCI_ROM_OFFSET + j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE, 279 sc->sc_enaddr, ETHER_ADDR_LEN); 280 #endif 281 /* 282 * The Xserve G5 has a fake GMAC with an all-zero MAC address. 283 * Check for this, and don't attach in this case. 284 */ 285 286 for (i = 0; i < ETHER_ADDR_LEN && sc->sc_enaddr[i] == 0; i++) {} 287 if (i == ETHER_ADDR_LEN) { 288 device_printf(dev, "invalid MAC address\n"); 289 goto fail; 290 } 291 292 if (gem_attach(sc) != 0) { 293 device_printf(dev, "could not be attached\n"); 294 goto fail; 295 } 296 297 if (bus_setup_intr(dev, sc->sc_res[GEM_RES_INTR], INTR_TYPE_NET | 298 INTR_MPSAFE, NULL, gem_intr, sc, &sc->sc_ih) != 0) { 299 device_printf(dev, "failed to set up interrupt\n"); 300 gem_detach(sc); 301 goto fail; 302 } 303 return (0); 304 305 fail: 306 GEM_LOCK_DESTROY(sc); 307 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res); 308 return (ENXIO); 309 } 310 311 static int 312 gem_pci_detach(device_t dev) 313 { 314 struct gem_softc *sc; 315 316 sc = device_get_softc(dev); 317 bus_teardown_intr(dev, sc->sc_res[GEM_RES_INTR], sc->sc_ih); 318 gem_detach(sc); 319 GEM_LOCK_DESTROY(sc); 320 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res); 321 return (0); 322 } 323 324 static int 325 gem_pci_suspend(device_t dev) 326 { 327 328 gem_suspend(device_get_softc(dev)); 329 return (0); 330 } 331 332 static int 333 gem_pci_resume(device_t dev) 334 { 335 336 gem_resume(device_get_softc(dev)); 337 return (0); 338 } 339