1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2009 Oleksandr Tymoshenko. All rights reserved. 5 * Copyright (c) 2018 Ian Lepore. All rights reserved. 6 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include "opt_platform.h" 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/bio.h> 37 #include <sys/bus.h> 38 #include <sys/conf.h> 39 #include <sys/kernel.h> 40 #include <sys/kthread.h> 41 #include <sys/lock.h> 42 #include <sys/mbuf.h> 43 #include <sys/malloc.h> 44 #include <sys/module.h> 45 #include <sys/mutex.h> 46 #include <geom/geom_disk.h> 47 48 #ifdef FDT 49 #include <dev/fdt/fdt_common.h> 50 #include <dev/ofw/ofw_bus_subr.h> 51 #include <dev/ofw/openfirm.h> 52 #endif 53 54 #include <dev/spibus/spi.h> 55 #include "spibus_if.h" 56 57 #include <dev/flash/mx25lreg.h> 58 59 #define FL_NONE 0x00 60 #define FL_ERASE_4K 0x01 61 #define FL_ERASE_32K 0x02 62 #define FL_ENABLE_4B_ADDR 0x04 63 #define FL_DISABLE_4B_ADDR 0x08 64 65 /* 66 * Define the sectorsize to be a smaller size rather than the flash 67 * sector size. Trying to run FFS off of a 64k flash sector size 68 * results in a completely un-usable system. 69 */ 70 #define MX25L_SECTORSIZE 512 71 72 struct mx25l_flash_ident 73 { 74 const char *name; 75 uint8_t manufacturer_id; 76 uint16_t device_id; 77 unsigned int sectorsize; 78 unsigned int sectorcount; 79 unsigned int flags; 80 }; 81 82 struct mx25l_softc 83 { 84 device_t sc_dev; 85 device_t sc_parent; 86 uint8_t sc_manufacturer_id; 87 uint16_t sc_device_id; 88 unsigned int sc_erasesize; 89 struct mtx sc_mtx; 90 struct disk *sc_disk; 91 struct proc *sc_p; 92 struct bio_queue_head sc_bio_queue; 93 unsigned int sc_flags; 94 unsigned int sc_taskstate; 95 uint8_t sc_dummybuf[FLASH_PAGE_SIZE]; 96 }; 97 98 #define TSTATE_STOPPED 0 99 #define TSTATE_STOPPING 1 100 #define TSTATE_RUNNING 2 101 102 #define M25PXX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 103 #define M25PXX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 104 #define M25PXX_LOCK_INIT(_sc) \ 105 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 106 "mx25l", MTX_DEF) 107 #define M25PXX_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 108 #define M25PXX_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); 109 #define M25PXX_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); 110 111 /* disk routines */ 112 static int mx25l_open(struct disk *dp); 113 static int mx25l_close(struct disk *dp); 114 static int mx25l_ioctl(struct disk *, u_long, void *, int, struct thread *); 115 static void mx25l_strategy(struct bio *bp); 116 static int mx25l_getattr(struct bio *bp); 117 static void mx25l_task(void *arg); 118 119 static struct mx25l_flash_ident flash_devices[] = { 120 { "en25f32", 0x1c, 0x3116, 64 * 1024, 64, FL_NONE }, 121 { "en25p32", 0x1c, 0x2016, 64 * 1024, 64, FL_NONE }, 122 { "en25p64", 0x1c, 0x2017, 64 * 1024, 128, FL_NONE }, 123 { "en25q32", 0x1c, 0x3016, 64 * 1024, 64, FL_NONE }, 124 { "en25q64", 0x1c, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 125 { "m25p32", 0x20, 0x2016, 64 * 1024, 64, FL_NONE }, 126 { "m25p64", 0x20, 0x2017, 64 * 1024, 128, FL_NONE }, 127 { "mx25l1606e", 0xc2, 0x2015, 64 * 1024, 32, FL_ERASE_4K}, 128 { "mx25ll32", 0xc2, 0x2016, 64 * 1024, 64, FL_NONE }, 129 { "mx25ll64", 0xc2, 0x2017, 64 * 1024, 128, FL_NONE }, 130 { "mx25ll128", 0xc2, 0x2018, 64 * 1024, 256, FL_ERASE_4K | FL_ERASE_32K }, 131 { "mx25ll256", 0xc2, 0x2019, 64 * 1024, 512, FL_ERASE_4K | FL_ERASE_32K | FL_ENABLE_4B_ADDR }, 132 { "n25q64", 0x20, 0xba17, 64 * 1024, 128, FL_ERASE_4K }, 133 { "s25fl032", 0x01, 0x0215, 64 * 1024, 64, FL_NONE }, 134 { "s25fl064", 0x01, 0x0216, 64 * 1024, 128, FL_NONE }, 135 { "s25fl128", 0x01, 0x2018, 64 * 1024, 256, FL_NONE }, 136 { "s25fl256s", 0x01, 0x0219, 64 * 1024, 512, FL_NONE }, 137 { "s25fl512s", 0x01, 0x0220, 64 * 1024, 1024, FL_NONE }, 138 { "SST25VF010A", 0xbf, 0x2549, 4 * 1024, 32, FL_ERASE_4K | FL_ERASE_32K }, 139 { "SST25VF032B", 0xbf, 0x254a, 64 * 1024, 64, FL_ERASE_4K | FL_ERASE_32K }, 140 141 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ 142 { "w25x32", 0xef, 0x3016, 64 * 1024, 64, FL_ERASE_4K }, 143 { "w25x64", 0xef, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 144 { "w25q32", 0xef, 0x4016, 64 * 1024, 64, FL_ERASE_4K }, 145 { "w25q64", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 146 { "w25q64bv", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 147 { "w25q128", 0xef, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 148 { "w25q256", 0xef, 0x4019, 64 * 1024, 512, FL_ERASE_4K }, 149 150 /* Atmel */ 151 { "at25df641", 0x1f, 0x4800, 64 * 1024, 128, FL_ERASE_4K }, 152 153 /* GigaDevice */ 154 { "gd25q64", 0xc8, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 155 { "gd25q128", 0xc8, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 156 157 /* Integrated Silicon Solution */ 158 { "is25wp256", 0x9d, 0x7019, 64 * 1024, 512, FL_ERASE_4K | FL_ENABLE_4B_ADDR}, 159 }; 160 161 static int 162 mx25l_wait_for_device_ready(struct mx25l_softc *sc) 163 { 164 uint8_t txBuf[2], rxBuf[2]; 165 struct spi_command cmd; 166 int err; 167 168 memset(&cmd, 0, sizeof(cmd)); 169 170 do { 171 txBuf[0] = CMD_READ_STATUS; 172 cmd.tx_cmd = txBuf; 173 cmd.rx_cmd = rxBuf; 174 cmd.rx_cmd_sz = 2; 175 cmd.tx_cmd_sz = 2; 176 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 177 } while (err == 0 && (rxBuf[1] & STATUS_WIP)); 178 179 return (err); 180 } 181 182 static struct mx25l_flash_ident* 183 mx25l_get_device_ident(struct mx25l_softc *sc) 184 { 185 uint8_t txBuf[8], rxBuf[8]; 186 struct spi_command cmd; 187 uint8_t manufacturer_id; 188 uint16_t dev_id; 189 int err, i; 190 191 memset(&cmd, 0, sizeof(cmd)); 192 memset(txBuf, 0, sizeof(txBuf)); 193 memset(rxBuf, 0, sizeof(rxBuf)); 194 195 txBuf[0] = CMD_READ_IDENT; 196 cmd.tx_cmd = &txBuf; 197 cmd.rx_cmd = &rxBuf; 198 /* 199 * Some compatible devices has extended two-bytes ID 200 * We'll use only manufacturer/deviceid atm 201 */ 202 cmd.tx_cmd_sz = 4; 203 cmd.rx_cmd_sz = 4; 204 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 205 if (err) 206 return (NULL); 207 208 manufacturer_id = rxBuf[1]; 209 dev_id = (rxBuf[2] << 8) | (rxBuf[3]); 210 211 for (i = 0; i < nitems(flash_devices); i++) { 212 if ((flash_devices[i].manufacturer_id == manufacturer_id) && 213 (flash_devices[i].device_id == dev_id)) 214 return &flash_devices[i]; 215 } 216 217 device_printf(sc->sc_dev, 218 "Unknown SPI flash device. Vendor: %02x, device id: %04x\n", 219 manufacturer_id, dev_id); 220 return (NULL); 221 } 222 223 static int 224 mx25l_set_writable(struct mx25l_softc *sc, int writable) 225 { 226 uint8_t txBuf[1], rxBuf[1]; 227 struct spi_command cmd; 228 int err; 229 230 memset(&cmd, 0, sizeof(cmd)); 231 memset(txBuf, 0, sizeof(txBuf)); 232 memset(rxBuf, 0, sizeof(rxBuf)); 233 234 txBuf[0] = writable ? CMD_WRITE_ENABLE : CMD_WRITE_DISABLE; 235 cmd.tx_cmd = txBuf; 236 cmd.rx_cmd = rxBuf; 237 cmd.rx_cmd_sz = 1; 238 cmd.tx_cmd_sz = 1; 239 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 240 return (err); 241 } 242 243 static int 244 mx25l_erase_cmd(struct mx25l_softc *sc, off_t sector) 245 { 246 uint8_t txBuf[5], rxBuf[5]; 247 struct spi_command cmd; 248 int err; 249 250 if ((err = mx25l_set_writable(sc, 1)) != 0) 251 return (err); 252 253 memset(&cmd, 0, sizeof(cmd)); 254 memset(txBuf, 0, sizeof(txBuf)); 255 memset(rxBuf, 0, sizeof(rxBuf)); 256 257 cmd.tx_cmd = txBuf; 258 cmd.rx_cmd = rxBuf; 259 260 if (sc->sc_flags & FL_ERASE_4K) 261 txBuf[0] = CMD_BLOCK_4K_ERASE; 262 else if (sc->sc_flags & FL_ERASE_32K) 263 txBuf[0] = CMD_BLOCK_32K_ERASE; 264 else 265 txBuf[0] = CMD_SECTOR_ERASE; 266 267 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 268 cmd.rx_cmd_sz = 5; 269 cmd.tx_cmd_sz = 5; 270 txBuf[1] = ((sector >> 24) & 0xff); 271 txBuf[2] = ((sector >> 16) & 0xff); 272 txBuf[3] = ((sector >> 8) & 0xff); 273 txBuf[4] = (sector & 0xff); 274 } else { 275 cmd.rx_cmd_sz = 4; 276 cmd.tx_cmd_sz = 4; 277 txBuf[1] = ((sector >> 16) & 0xff); 278 txBuf[2] = ((sector >> 8) & 0xff); 279 txBuf[3] = (sector & 0xff); 280 } 281 if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) != 0) 282 return (err); 283 err = mx25l_wait_for_device_ready(sc); 284 return (err); 285 } 286 287 static int 288 mx25l_write(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count) 289 { 290 uint8_t txBuf[8], rxBuf[8]; 291 struct spi_command cmd; 292 off_t bytes_to_write; 293 int err = 0; 294 295 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 296 cmd.tx_cmd_sz = 5; 297 cmd.rx_cmd_sz = 5; 298 } else { 299 cmd.tx_cmd_sz = 4; 300 cmd.rx_cmd_sz = 4; 301 } 302 303 /* 304 * Writes must be aligned to the erase sectorsize, since blocks are 305 * fully erased before they're written to. 306 */ 307 if (count % sc->sc_erasesize != 0 || offset % sc->sc_erasesize != 0) 308 return (EIO); 309 310 /* 311 * Maximum write size for CMD_PAGE_PROGRAM is FLASH_PAGE_SIZE, so loop 312 * to write chunks of FLASH_PAGE_SIZE bytes each. 313 */ 314 while (count != 0) { 315 /* If we crossed a sector boundary, erase the next sector. */ 316 if (((offset) % sc->sc_erasesize) == 0) { 317 err = mx25l_erase_cmd(sc, offset); 318 if (err) 319 break; 320 } 321 322 txBuf[0] = CMD_PAGE_PROGRAM; 323 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 324 txBuf[1] = (offset >> 24) & 0xff; 325 txBuf[2] = (offset >> 16) & 0xff; 326 txBuf[3] = (offset >> 8) & 0xff; 327 txBuf[4] = offset & 0xff; 328 } else { 329 txBuf[1] = (offset >> 16) & 0xff; 330 txBuf[2] = (offset >> 8) & 0xff; 331 txBuf[3] = offset & 0xff; 332 } 333 334 bytes_to_write = MIN(FLASH_PAGE_SIZE, count); 335 cmd.tx_cmd = txBuf; 336 cmd.rx_cmd = rxBuf; 337 cmd.tx_data = data; 338 cmd.rx_data = sc->sc_dummybuf; 339 cmd.tx_data_sz = (uint32_t)bytes_to_write; 340 cmd.rx_data_sz = (uint32_t)bytes_to_write; 341 342 /* 343 * Each completed write operation resets WEL (write enable 344 * latch) to disabled state, so we re-enable it here. 345 */ 346 if ((err = mx25l_wait_for_device_ready(sc)) != 0) 347 break; 348 if ((err = mx25l_set_writable(sc, 1)) != 0) 349 break; 350 351 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 352 if (err != 0) 353 break; 354 err = mx25l_wait_for_device_ready(sc); 355 if (err) 356 break; 357 358 data += bytes_to_write; 359 offset += bytes_to_write; 360 count -= bytes_to_write; 361 } 362 363 return (err); 364 } 365 366 static int 367 mx25l_read(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count) 368 { 369 uint8_t txBuf[8], rxBuf[8]; 370 struct spi_command cmd; 371 int err = 0; 372 373 /* 374 * Enforce that reads are aligned to the disk sectorsize, not the 375 * erase sectorsize. In this way, smaller read IO is possible, 376 * dramatically speeding up filesystem/geom_compress access. 377 */ 378 if (count % sc->sc_disk->d_sectorsize != 0 || 379 offset % sc->sc_disk->d_sectorsize != 0) 380 return (EIO); 381 382 txBuf[0] = CMD_FAST_READ; 383 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 384 cmd.tx_cmd_sz = 6; 385 cmd.rx_cmd_sz = 6; 386 387 txBuf[1] = (offset >> 24) & 0xff; 388 txBuf[2] = (offset >> 16) & 0xff; 389 txBuf[3] = (offset >> 8) & 0xff; 390 txBuf[4] = offset & 0xff; 391 /* Dummy byte */ 392 txBuf[5] = 0; 393 } else { 394 cmd.tx_cmd_sz = 5; 395 cmd.rx_cmd_sz = 5; 396 397 txBuf[1] = (offset >> 16) & 0xff; 398 txBuf[2] = (offset >> 8) & 0xff; 399 txBuf[3] = offset & 0xff; 400 /* Dummy byte */ 401 txBuf[4] = 0; 402 } 403 404 cmd.tx_cmd = txBuf; 405 cmd.rx_cmd = rxBuf; 406 cmd.tx_data = data; 407 cmd.rx_data = data; 408 cmd.tx_data_sz = count; 409 cmd.rx_data_sz = count; 410 411 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 412 return (err); 413 } 414 415 static int 416 mx25l_set_4b_mode(struct mx25l_softc *sc, uint8_t command) 417 { 418 uint8_t txBuf[1], rxBuf[1]; 419 struct spi_command cmd; 420 int err; 421 422 memset(&cmd, 0, sizeof(cmd)); 423 memset(txBuf, 0, sizeof(txBuf)); 424 memset(rxBuf, 0, sizeof(rxBuf)); 425 426 cmd.tx_cmd_sz = cmd.rx_cmd_sz = 1; 427 428 cmd.tx_cmd = txBuf; 429 cmd.rx_cmd = rxBuf; 430 431 txBuf[0] = command; 432 433 if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) == 0) 434 err = mx25l_wait_for_device_ready(sc); 435 436 return (err); 437 } 438 439 #ifdef FDT 440 static struct ofw_compat_data compat_data[] = { 441 { "st,m25p", 1 }, 442 { "jedec,spi-nor", 1 }, 443 { NULL, 0 }, 444 }; 445 #endif 446 447 static int 448 mx25l_probe(device_t dev) 449 { 450 #ifdef FDT 451 int i; 452 453 if (!ofw_bus_status_okay(dev)) 454 return (ENXIO); 455 456 /* First try to match the compatible property to the compat_data */ 457 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 1) 458 goto found; 459 460 /* 461 * Next, try to find a compatible device using the names in the 462 * flash_devices structure 463 */ 464 for (i = 0; i < nitems(flash_devices); i++) 465 if (ofw_bus_is_compatible(dev, flash_devices[i].name)) 466 goto found; 467 468 return (ENXIO); 469 found: 470 #endif 471 device_set_desc(dev, "M25Pxx Flash Family"); 472 473 return (0); 474 } 475 476 static int 477 mx25l_attach(device_t dev) 478 { 479 struct mx25l_softc *sc; 480 struct mx25l_flash_ident *ident; 481 int err; 482 483 sc = device_get_softc(dev); 484 sc->sc_dev = dev; 485 sc->sc_parent = device_get_parent(sc->sc_dev); 486 487 M25PXX_LOCK_INIT(sc); 488 489 ident = mx25l_get_device_ident(sc); 490 if (ident == NULL) 491 return (ENXIO); 492 493 if ((err = mx25l_wait_for_device_ready(sc)) != 0) 494 return (err); 495 496 sc->sc_flags = ident->flags; 497 498 if (sc->sc_flags & FL_ERASE_4K) 499 sc->sc_erasesize = 4 * 1024; 500 else if (sc->sc_flags & FL_ERASE_32K) 501 sc->sc_erasesize = 32 * 1024; 502 else 503 sc->sc_erasesize = ident->sectorsize; 504 505 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 506 if ((err = mx25l_set_4b_mode(sc, CMD_ENTER_4B_MODE)) != 0) 507 return (err); 508 } else if (sc->sc_flags & FL_DISABLE_4B_ADDR) { 509 if ((err = mx25l_set_4b_mode(sc, CMD_EXIT_4B_MODE)) != 0) 510 return (err); 511 } 512 513 sc->sc_disk = disk_alloc(); 514 sc->sc_disk->d_open = mx25l_open; 515 sc->sc_disk->d_close = mx25l_close; 516 sc->sc_disk->d_strategy = mx25l_strategy; 517 sc->sc_disk->d_getattr = mx25l_getattr; 518 sc->sc_disk->d_ioctl = mx25l_ioctl; 519 sc->sc_disk->d_name = "flash/spi"; 520 sc->sc_disk->d_drv1 = sc; 521 sc->sc_disk->d_maxsize = DFLTPHYS; 522 sc->sc_disk->d_sectorsize = MX25L_SECTORSIZE; 523 sc->sc_disk->d_mediasize = ident->sectorsize * ident->sectorcount; 524 sc->sc_disk->d_stripesize = sc->sc_erasesize; 525 sc->sc_disk->d_unit = device_get_unit(sc->sc_dev); 526 sc->sc_disk->d_dump = NULL; /* NB: no dumps */ 527 strlcpy(sc->sc_disk->d_descr, ident->name, 528 sizeof(sc->sc_disk->d_descr)); 529 530 disk_create(sc->sc_disk, DISK_VERSION); 531 bioq_init(&sc->sc_bio_queue); 532 533 kproc_create(&mx25l_task, sc, &sc->sc_p, 0, 0, "task: mx25l flash"); 534 sc->sc_taskstate = TSTATE_RUNNING; 535 536 device_printf(sc->sc_dev, 537 "device type %s, size %dK in %d sectors of %dK, erase size %dK\n", 538 ident->name, 539 ident->sectorcount * ident->sectorsize / 1024, 540 ident->sectorcount, ident->sectorsize / 1024, 541 sc->sc_erasesize / 1024); 542 543 return (0); 544 } 545 546 static int 547 mx25l_detach(device_t dev) 548 { 549 struct mx25l_softc *sc; 550 int err; 551 552 sc = device_get_softc(dev); 553 err = 0; 554 555 M25PXX_LOCK(sc); 556 if (sc->sc_taskstate == TSTATE_RUNNING) { 557 sc->sc_taskstate = TSTATE_STOPPING; 558 wakeup(sc); 559 while (err == 0 && sc->sc_taskstate != TSTATE_STOPPED) { 560 err = msleep(sc, &sc->sc_mtx, 0, "mx25dt", hz * 3); 561 if (err != 0) { 562 sc->sc_taskstate = TSTATE_RUNNING; 563 device_printf(sc->sc_dev, 564 "Failed to stop queue task\n"); 565 } 566 } 567 } 568 M25PXX_UNLOCK(sc); 569 570 if (err == 0 && sc->sc_taskstate == TSTATE_STOPPED) { 571 disk_destroy(sc->sc_disk); 572 bioq_flush(&sc->sc_bio_queue, NULL, ENXIO); 573 M25PXX_LOCK_DESTROY(sc); 574 } 575 return (err); 576 } 577 578 static int 579 mx25l_open(struct disk *dp) 580 { 581 return (0); 582 } 583 584 static int 585 mx25l_close(struct disk *dp) 586 { 587 588 return (0); 589 } 590 591 static int 592 mx25l_ioctl(struct disk *dp, u_long cmd, void *data, int fflag, 593 struct thread *td) 594 { 595 596 return (EINVAL); 597 } 598 599 static void 600 mx25l_strategy(struct bio *bp) 601 { 602 struct mx25l_softc *sc; 603 604 sc = (struct mx25l_softc *)bp->bio_disk->d_drv1; 605 M25PXX_LOCK(sc); 606 bioq_disksort(&sc->sc_bio_queue, bp); 607 wakeup(sc); 608 M25PXX_UNLOCK(sc); 609 } 610 611 static int 612 mx25l_getattr(struct bio *bp) 613 { 614 struct mx25l_softc *sc; 615 device_t dev; 616 617 if (bp->bio_disk == NULL || bp->bio_disk->d_drv1 == NULL) 618 return (ENXIO); 619 620 sc = bp->bio_disk->d_drv1; 621 dev = sc->sc_dev; 622 623 if (strcmp(bp->bio_attribute, "SPI::device") == 0) { 624 if (bp->bio_length != sizeof(dev)) 625 return (EFAULT); 626 bcopy(&dev, bp->bio_data, sizeof(dev)); 627 } else 628 return (-1); 629 return (0); 630 } 631 632 static void 633 mx25l_task(void *arg) 634 { 635 struct mx25l_softc *sc = (struct mx25l_softc*)arg; 636 struct bio *bp; 637 638 for (;;) { 639 M25PXX_LOCK(sc); 640 do { 641 if (sc->sc_taskstate == TSTATE_STOPPING) { 642 sc->sc_taskstate = TSTATE_STOPPED; 643 M25PXX_UNLOCK(sc); 644 wakeup(sc); 645 kproc_exit(0); 646 } 647 bp = bioq_first(&sc->sc_bio_queue); 648 if (bp == NULL) 649 msleep(sc, &sc->sc_mtx, PRIBIO, "mx25jq", 0); 650 } while (bp == NULL); 651 bioq_remove(&sc->sc_bio_queue, bp); 652 M25PXX_UNLOCK(sc); 653 654 switch (bp->bio_cmd) { 655 case BIO_READ: 656 bp->bio_error = mx25l_read(sc, bp->bio_offset, 657 bp->bio_data, bp->bio_bcount); 658 break; 659 case BIO_WRITE: 660 bp->bio_error = mx25l_write(sc, bp->bio_offset, 661 bp->bio_data, bp->bio_bcount); 662 break; 663 default: 664 bp->bio_error = EOPNOTSUPP; 665 } 666 667 668 biodone(bp); 669 } 670 } 671 672 static device_method_t mx25l_methods[] = { 673 /* Device interface */ 674 DEVMETHOD(device_probe, mx25l_probe), 675 DEVMETHOD(device_attach, mx25l_attach), 676 DEVMETHOD(device_detach, mx25l_detach), 677 678 { 0, 0 } 679 }; 680 681 static driver_t mx25l_driver = { 682 "mx25l", 683 mx25l_methods, 684 sizeof(struct mx25l_softc), 685 }; 686 687 DRIVER_MODULE(mx25l, spibus, mx25l_driver, 0, 0); 688 MODULE_DEPEND(mx25l, spibus, 1, 1, 1); 689 #ifdef FDT 690 MODULE_DEPEND(mx25l, fdt_slicer, 1, 1, 1); 691 SPIBUS_FDT_PNP_INFO(compat_data); 692 #endif 693