1e388de98SAdrian Chadd /*- 24d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause 3e388de98SAdrian Chadd * 4e388de98SAdrian Chadd * Copyright (c) 2022 Adrian Chadd <adrian@FreeBSD.org>. 5e388de98SAdrian Chadd * 6e388de98SAdrian Chadd * Redistribution and use in source and binary forms, with or without 7e388de98SAdrian Chadd * modification, are permitted provided that the following conditions 8e388de98SAdrian Chadd * are met: 9e388de98SAdrian Chadd * 1. Redistributions of source code must retain the above copyright 10e388de98SAdrian Chadd * notice, this list of conditions and the following disclaimer. 11e388de98SAdrian Chadd * 2. Redistributions in binary form must reproduce the above copyright 12e388de98SAdrian Chadd * notice, this list of conditions and the following disclaimer in the 13e388de98SAdrian Chadd * documentation and/or other materials provided with the distribution. 14e388de98SAdrian Chadd * 15e388de98SAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16e388de98SAdrian Chadd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17e388de98SAdrian Chadd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18e388de98SAdrian Chadd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19e388de98SAdrian Chadd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20e388de98SAdrian Chadd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21e388de98SAdrian Chadd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22e388de98SAdrian Chadd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23e388de98SAdrian Chadd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24e388de98SAdrian Chadd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25e388de98SAdrian Chadd * SUCH DAMAGE. 26e388de98SAdrian Chadd */ 27e388de98SAdrian Chadd 28e388de98SAdrian Chadd #include <sys/param.h> 29e388de98SAdrian Chadd #include <sys/bus.h> 30e388de98SAdrian Chadd #include <sys/errno.h> 31e388de98SAdrian Chadd #include <sys/kernel.h> 32e388de98SAdrian Chadd #include <sys/malloc.h> 33e388de98SAdrian Chadd #include <sys/module.h> 34e388de98SAdrian Chadd #include <sys/socket.h> 35e388de98SAdrian Chadd #include <sys/sockio.h> 36e388de98SAdrian Chadd #include <sys/sysctl.h> 37e388de98SAdrian Chadd #include <sys/systm.h> 38e388de98SAdrian Chadd 39e388de98SAdrian Chadd #include <net/if.h> 40e388de98SAdrian Chadd #include <net/if_var.h> 41e388de98SAdrian Chadd #include <net/if_arp.h> 42e388de98SAdrian Chadd #include <net/ethernet.h> 43e388de98SAdrian Chadd #include <net/if_dl.h> 44e388de98SAdrian Chadd #include <net/if_media.h> 45e388de98SAdrian Chadd #include <net/if_types.h> 46e388de98SAdrian Chadd 47e388de98SAdrian Chadd #include <machine/bus.h> 48e388de98SAdrian Chadd #include <dev/iicbus/iic.h> 49e388de98SAdrian Chadd #include <dev/iicbus/iiconf.h> 50e388de98SAdrian Chadd #include <dev/iicbus/iicbus.h> 51e388de98SAdrian Chadd #include <dev/mii/mii.h> 52e388de98SAdrian Chadd #include <dev/mii/miivar.h> 53e388de98SAdrian Chadd #include <dev/mdio/mdio.h> 54*be82b3a0SEmmanuel Vadot #include <dev/clk/clk.h> 55e388de98SAdrian Chadd #include <dev/extres/hwreset/hwreset.h> 56e388de98SAdrian Chadd 57e388de98SAdrian Chadd #include <dev/fdt/fdt_common.h> 58e388de98SAdrian Chadd #include <dev/ofw/ofw_bus.h> 59e388de98SAdrian Chadd #include <dev/ofw/ofw_bus_subr.h> 60e388de98SAdrian Chadd 61e388de98SAdrian Chadd #include <dev/etherswitch/etherswitch.h> 62e388de98SAdrian Chadd 63e388de98SAdrian Chadd #include <dev/etherswitch/ar40xx/ar40xx_var.h> 64e388de98SAdrian Chadd #include <dev/etherswitch/ar40xx/ar40xx_reg.h> 65e388de98SAdrian Chadd #include <dev/etherswitch/ar40xx/ar40xx_hw.h> 66e388de98SAdrian Chadd 67e388de98SAdrian Chadd #include <dev/etherswitch/ar40xx/ar40xx_hw_mdio.h> 68e388de98SAdrian Chadd 69e388de98SAdrian Chadd #include "mdio_if.h" 70e388de98SAdrian Chadd #include "miibus_if.h" 71e388de98SAdrian Chadd #include "etherswitch_if.h" 72e388de98SAdrian Chadd 73e388de98SAdrian Chadd int 74e388de98SAdrian Chadd ar40xx_hw_phy_dbg_write(struct ar40xx_softc *sc, int phy, uint16_t dbg, 75e388de98SAdrian Chadd uint16_t data) 76e388de98SAdrian Chadd { 77e388de98SAdrian Chadd AR40XX_LOCK_ASSERT(sc); 78e388de98SAdrian Chadd device_printf(sc->sc_dev, "%s: TODO\n", __func__); 79e388de98SAdrian Chadd return (0); 80e388de98SAdrian Chadd } 81e388de98SAdrian Chadd 82e388de98SAdrian Chadd int 83e388de98SAdrian Chadd ar40xx_hw_phy_dbg_read(struct ar40xx_softc *sc, int phy, uint16_t dbg) 84e388de98SAdrian Chadd { 85e388de98SAdrian Chadd AR40XX_LOCK_ASSERT(sc); 86e388de98SAdrian Chadd device_printf(sc->sc_dev, "%s: TODO\n", __func__); 87e388de98SAdrian Chadd return (-1); 88e388de98SAdrian Chadd } 89e388de98SAdrian Chadd 90e388de98SAdrian Chadd int 91e388de98SAdrian Chadd ar40xx_hw_phy_mmd_write(struct ar40xx_softc *sc, uint32_t phy_id, 92e388de98SAdrian Chadd uint16_t mmd_num, uint16_t reg_id, uint16_t reg_val) 93e388de98SAdrian Chadd { 94e388de98SAdrian Chadd 95e388de98SAdrian Chadd AR40XX_LOCK_ASSERT(sc); 96e388de98SAdrian Chadd 97e388de98SAdrian Chadd MDIO_WRITEREG(sc->sc_mdio_dev, phy_id, AR40XX_MII_ATH_MMD_ADDR, 98e388de98SAdrian Chadd mmd_num); 99e388de98SAdrian Chadd MDIO_WRITEREG(sc->sc_mdio_dev, phy_id, AR40XX_MII_ATH_MMD_DATA, 100e388de98SAdrian Chadd reg_id); 101e388de98SAdrian Chadd MDIO_WRITEREG(sc->sc_mdio_dev, phy_id, AR40XX_MII_ATH_MMD_ADDR, 102e388de98SAdrian Chadd 0x4000 | mmd_num); 103e388de98SAdrian Chadd MDIO_WRITEREG(sc->sc_mdio_dev, phy_id, AR40XX_MII_ATH_MMD_DATA, 104e388de98SAdrian Chadd reg_val); 105e388de98SAdrian Chadd 106e388de98SAdrian Chadd return (0); 107e388de98SAdrian Chadd } 108e388de98SAdrian Chadd 109e388de98SAdrian Chadd int 110e388de98SAdrian Chadd ar40xx_hw_phy_mmd_read(struct ar40xx_softc *sc, uint32_t phy_id, 111e388de98SAdrian Chadd uint16_t mmd_num, uint16_t reg_id) 112e388de98SAdrian Chadd { 113e388de98SAdrian Chadd uint16_t value; 114e388de98SAdrian Chadd 115e388de98SAdrian Chadd AR40XX_LOCK_ASSERT(sc); 116e388de98SAdrian Chadd 117e388de98SAdrian Chadd MDIO_WRITEREG(sc->sc_mdio_dev, phy_id, AR40XX_MII_ATH_MMD_ADDR, 118e388de98SAdrian Chadd mmd_num); 119e388de98SAdrian Chadd MDIO_WRITEREG(sc->sc_mdio_dev, phy_id, AR40XX_MII_ATH_MMD_DATA, 120e388de98SAdrian Chadd reg_id); 121e388de98SAdrian Chadd MDIO_WRITEREG(sc->sc_mdio_dev, phy_id, AR40XX_MII_ATH_MMD_ADDR, 122e388de98SAdrian Chadd 0x4000 | mmd_num); 123e388de98SAdrian Chadd 124e388de98SAdrian Chadd value = MDIO_READREG(sc->sc_mdio_dev, phy_id, 125e388de98SAdrian Chadd AR40XX_MII_ATH_MMD_DATA); 126e388de98SAdrian Chadd 127e388de98SAdrian Chadd return value; 128e388de98SAdrian Chadd } 129e388de98SAdrian Chadd 130