1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 */ 32 33 #include <sys/cdefs.h> 34 #include <dev/drm2/drmP.h> 35 #include <dev/drm2/drm_crtc.h> 36 37 /** 38 * drm_mode_debug_printmodeline - debug print a mode 39 * @dev: DRM device 40 * @mode: mode to print 41 * 42 * LOCKING: 43 * None. 44 * 45 * Describe @mode using DRM_DEBUG. 46 */ 47 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) 48 { 49 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 50 "0x%x 0x%x\n", 51 mode->base.id, mode->name, mode->vrefresh, mode->clock, 52 mode->hdisplay, mode->hsync_start, 53 mode->hsync_end, mode->htotal, 54 mode->vdisplay, mode->vsync_start, 55 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 56 } 57 EXPORT_SYMBOL(drm_mode_debug_printmodeline); 58 59 /** 60 * drm_cvt_mode -create a modeline based on CVT algorithm 61 * @dev: DRM device 62 * @hdisplay: hdisplay size 63 * @vdisplay: vdisplay size 64 * @vrefresh : vrefresh rate 65 * @reduced : Whether the GTF calculation is simplified 66 * @interlaced:Whether the interlace is supported 67 * 68 * LOCKING: 69 * none. 70 * 71 * return the modeline based on CVT algorithm 72 * 73 * This function is called to generate the modeline based on CVT algorithm 74 * according to the hdisplay, vdisplay, vrefresh. 75 * It is based from the VESA(TM) Coordinated Video Timing Generator by 76 * Graham Loveridge April 9, 2003 available at 77 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 78 * 79 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 80 * What I have done is to translate it by using integer calculation. 81 */ 82 #define HV_FACTOR 1000 83 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 84 int vdisplay, int vrefresh, 85 bool reduced, bool interlaced, bool margins) 86 { 87 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 88 #define CVT_MARGIN_PERCENTAGE 18 89 /* 2) character cell horizontal granularity (pixels) - default 8 */ 90 #define CVT_H_GRANULARITY 8 91 /* 3) Minimum vertical porch (lines) - default 3 */ 92 #define CVT_MIN_V_PORCH 3 93 /* 4) Minimum number of vertical back porch lines - default 6 */ 94 #define CVT_MIN_V_BPORCH 6 95 /* Pixel Clock step (kHz) */ 96 #define CVT_CLOCK_STEP 250 97 struct drm_display_mode *drm_mode; 98 unsigned int vfieldrate, hperiod; 99 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 100 int interlace; 101 102 /* allocate the drm_display_mode structure. If failure, we will 103 * return directly 104 */ 105 drm_mode = drm_mode_create(dev); 106 if (!drm_mode) 107 return NULL; 108 109 /* the CVT default refresh rate is 60Hz */ 110 if (!vrefresh) 111 vrefresh = 60; 112 113 /* the required field fresh rate */ 114 if (interlaced) 115 vfieldrate = vrefresh * 2; 116 else 117 vfieldrate = vrefresh; 118 119 /* horizontal pixels */ 120 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 121 122 /* determine the left&right borders */ 123 hmargin = 0; 124 if (margins) { 125 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 126 hmargin -= hmargin % CVT_H_GRANULARITY; 127 } 128 /* find the total active pixels */ 129 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 130 131 /* find the number of lines per field */ 132 if (interlaced) 133 vdisplay_rnd = vdisplay / 2; 134 else 135 vdisplay_rnd = vdisplay; 136 137 /* find the top & bottom borders */ 138 vmargin = 0; 139 if (margins) 140 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 141 142 drm_mode->vdisplay = vdisplay + 2 * vmargin; 143 144 /* Interlaced */ 145 if (interlaced) 146 interlace = 1; 147 else 148 interlace = 0; 149 150 /* Determine VSync Width from aspect ratio */ 151 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 152 vsync = 4; 153 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 154 vsync = 5; 155 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 156 vsync = 6; 157 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 158 vsync = 7; 159 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 160 vsync = 7; 161 else /* custom */ 162 vsync = 10; 163 164 if (!reduced) { 165 /* simplify the GTF calculation */ 166 /* 4) Minimum time of vertical sync + back porch interval (µs) 167 * default 550.0 168 */ 169 int tmp1, tmp2; 170 #define CVT_MIN_VSYNC_BP 550 171 /* 3) Nominal HSync width (% of line period) - default 8 */ 172 #define CVT_HSYNC_PERCENTAGE 8 173 unsigned int hblank_percentage; 174 int vsyncandback_porch, hblank; 175 176 /* estimated the horizontal period */ 177 tmp1 = HV_FACTOR * 1000000 - 178 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 179 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 180 interlace; 181 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 182 183 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 184 /* 9. Find number of lines in sync + backporch */ 185 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 186 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 187 else 188 vsyncandback_porch = tmp1; 189 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 190 vsyncandback_porch + CVT_MIN_V_PORCH; 191 /* 5) Definition of Horizontal blanking time limitation */ 192 /* Gradient (%/kHz) - default 600 */ 193 #define CVT_M_FACTOR 600 194 /* Offset (%) - default 40 */ 195 #define CVT_C_FACTOR 40 196 /* Blanking time scaling factor - default 128 */ 197 #define CVT_K_FACTOR 128 198 /* Scaling factor weighting - default 20 */ 199 #define CVT_J_FACTOR 20 200 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 201 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 202 CVT_J_FACTOR) 203 /* 12. Find ideal blanking duty cycle from formula */ 204 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 205 hperiod / 1000; 206 /* 13. Blanking time */ 207 if (hblank_percentage < 20 * HV_FACTOR) 208 hblank_percentage = 20 * HV_FACTOR; 209 hblank = drm_mode->hdisplay * hblank_percentage / 210 (100 * HV_FACTOR - hblank_percentage); 211 hblank -= hblank % (2 * CVT_H_GRANULARITY); 212 /* 14. find the total pixes per line */ 213 drm_mode->htotal = drm_mode->hdisplay + hblank; 214 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 215 drm_mode->hsync_start = drm_mode->hsync_end - 216 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 217 drm_mode->hsync_start += CVT_H_GRANULARITY - 218 drm_mode->hsync_start % CVT_H_GRANULARITY; 219 /* fill the Vsync values */ 220 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 221 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 222 } else { 223 /* Reduced blanking */ 224 /* Minimum vertical blanking interval time (µs)- default 460 */ 225 #define CVT_RB_MIN_VBLANK 460 226 /* Fixed number of clocks for horizontal sync */ 227 #define CVT_RB_H_SYNC 32 228 /* Fixed number of clocks for horizontal blanking */ 229 #define CVT_RB_H_BLANK 160 230 /* Fixed number of lines for vertical front porch - default 3*/ 231 #define CVT_RB_VFPORCH 3 232 int vbilines; 233 int tmp1, tmp2; 234 /* 8. Estimate Horizontal period. */ 235 tmp1 = HV_FACTOR * 1000000 - 236 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 237 tmp2 = vdisplay_rnd + 2 * vmargin; 238 hperiod = tmp1 / (tmp2 * vfieldrate); 239 /* 9. Find number of lines in vertical blanking */ 240 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 241 /* 10. Check if vertical blanking is sufficient */ 242 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 243 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 244 /* 11. Find total number of lines in vertical field */ 245 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 246 /* 12. Find total number of pixels in a line */ 247 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 248 /* Fill in HSync values */ 249 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 250 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 251 /* Fill in VSync values */ 252 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 253 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 254 } 255 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 256 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 257 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 258 /* 18/16. Find actual vertical frame frequency */ 259 /* ignore - just set the mode flag for interlaced */ 260 if (interlaced) { 261 drm_mode->vtotal *= 2; 262 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 263 } 264 /* Fill the mode line name */ 265 drm_mode_set_name(drm_mode); 266 if (reduced) 267 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 268 DRM_MODE_FLAG_NVSYNC); 269 else 270 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 271 DRM_MODE_FLAG_NHSYNC); 272 273 return drm_mode; 274 } 275 EXPORT_SYMBOL(drm_cvt_mode); 276 277 /** 278 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm 279 * 280 * @dev :drm device 281 * @hdisplay :hdisplay size 282 * @vdisplay :vdisplay size 283 * @vrefresh :vrefresh rate. 284 * @interlaced :whether the interlace is supported 285 * @margins :desired margin size 286 * @GTF_[MCKJ] :extended GTF formula parameters 287 * 288 * LOCKING. 289 * none. 290 * 291 * return the modeline based on full GTF algorithm. 292 * 293 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 294 * in here multiplied by two. For a C of 40, pass in 80. 295 */ 296 struct drm_display_mode * 297 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 298 int vrefresh, bool interlaced, int margins, 299 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 300 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 301 #define GTF_MARGIN_PERCENTAGE 18 302 /* 2) character cell horizontal granularity (pixels) - default 8 */ 303 #define GTF_CELL_GRAN 8 304 /* 3) Minimum vertical porch (lines) - default 3 */ 305 #define GTF_MIN_V_PORCH 1 306 /* width of vsync in lines */ 307 #define V_SYNC_RQD 3 308 /* width of hsync as % of total line */ 309 #define H_SYNC_PERCENT 8 310 /* min time of vsync + back porch (microsec) */ 311 #define MIN_VSYNC_PLUS_BP 550 312 /* C' and M' are part of the Blanking Duty Cycle computation */ 313 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 314 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 315 struct drm_display_mode *drm_mode; 316 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 317 int top_margin, bottom_margin; 318 int interlace; 319 unsigned int hfreq_est; 320 int vsync_plus_bp; 321 unsigned int vtotal_lines; 322 int left_margin, right_margin; 323 unsigned int total_active_pixels, ideal_duty_cycle; 324 unsigned int hblank, total_pixels, pixel_freq; 325 int hsync, hfront_porch, vodd_front_porch_lines; 326 unsigned int tmp1, tmp2; 327 328 drm_mode = drm_mode_create(dev); 329 if (!drm_mode) 330 return NULL; 331 332 /* 1. In order to give correct results, the number of horizontal 333 * pixels requested is first processed to ensure that it is divisible 334 * by the character size, by rounding it to the nearest character 335 * cell boundary: 336 */ 337 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 338 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 339 340 /* 2. If interlace is requested, the number of vertical lines assumed 341 * by the calculation must be halved, as the computation calculates 342 * the number of vertical lines per field. 343 */ 344 if (interlaced) 345 vdisplay_rnd = vdisplay / 2; 346 else 347 vdisplay_rnd = vdisplay; 348 349 /* 3. Find the frame rate required: */ 350 if (interlaced) 351 vfieldrate_rqd = vrefresh * 2; 352 else 353 vfieldrate_rqd = vrefresh; 354 355 /* 4. Find number of lines in Top margin: */ 356 top_margin = 0; 357 if (margins) 358 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 359 1000; 360 /* 5. Find number of lines in bottom margin: */ 361 bottom_margin = top_margin; 362 363 /* 6. If interlace is required, then set variable interlace: */ 364 if (interlaced) 365 interlace = 1; 366 else 367 interlace = 0; 368 369 /* 7. Estimate the Horizontal frequency */ 370 { 371 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 372 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 373 2 + interlace; 374 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 375 } 376 377 /* 8. Find the number of lines in V sync + back porch */ 378 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 379 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 380 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 381 /* 10. Find the total number of lines in Vertical field period: */ 382 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 383 vsync_plus_bp + GTF_MIN_V_PORCH; 384 385 /* 15. Find number of pixels in left margin: */ 386 if (margins) 387 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 388 1000; 389 else 390 left_margin = 0; 391 392 /* 16.Find number of pixels in right margin: */ 393 right_margin = left_margin; 394 /* 17.Find total number of active pixels in image and left and right */ 395 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 396 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 397 ideal_duty_cycle = GTF_C_PRIME * 1000 - 398 (GTF_M_PRIME * 1000000 / hfreq_est); 399 /* 19.Find the number of pixels in the blanking time to the nearest 400 * double character cell: */ 401 hblank = total_active_pixels * ideal_duty_cycle / 402 (100000 - ideal_duty_cycle); 403 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 404 hblank = hblank * 2 * GTF_CELL_GRAN; 405 /* 20.Find total number of pixels: */ 406 total_pixels = total_active_pixels + hblank; 407 /* 21.Find pixel clock frequency: */ 408 pixel_freq = total_pixels * hfreq_est / 1000; 409 /* Stage 1 computations are now complete; I should really pass 410 * the results to another function and do the Stage 2 computations, 411 * but I only need a few more values so I'll just append the 412 * computations here for now */ 413 /* 17. Find the number of pixels in the horizontal sync period: */ 414 hsync = H_SYNC_PERCENT * total_pixels / 100; 415 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 416 hsync = hsync * GTF_CELL_GRAN; 417 /* 18. Find the number of pixels in horizontal front porch period */ 418 hfront_porch = hblank / 2 - hsync; 419 /* 36. Find the number of lines in the odd front porch period: */ 420 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 421 422 /* finally, pack the results in the mode struct */ 423 drm_mode->hdisplay = hdisplay_rnd; 424 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 425 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 426 drm_mode->htotal = total_pixels; 427 drm_mode->vdisplay = vdisplay_rnd; 428 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 429 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 430 drm_mode->vtotal = vtotal_lines; 431 432 drm_mode->clock = pixel_freq; 433 434 if (interlaced) { 435 drm_mode->vtotal *= 2; 436 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 437 } 438 439 drm_mode_set_name(drm_mode); 440 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 441 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 442 else 443 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 444 445 return drm_mode; 446 } 447 EXPORT_SYMBOL(drm_gtf_mode_complex); 448 449 /** 450 * drm_gtf_mode - create the modeline based on GTF algorithm 451 * 452 * @dev :drm device 453 * @hdisplay :hdisplay size 454 * @vdisplay :vdisplay size 455 * @vrefresh :vrefresh rate. 456 * @interlaced :whether the interlace is supported 457 * @margins :whether the margin is supported 458 * 459 * LOCKING. 460 * none. 461 * 462 * return the modeline based on GTF algorithm 463 * 464 * This function is to create the modeline based on the GTF algorithm. 465 * Generalized Timing Formula is derived from: 466 * GTF Spreadsheet by Andy Morrish (1/5/97) 467 * available at http://www.vesa.org 468 * 469 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 470 * What I have done is to translate it by using integer calculation. 471 * I also refer to the function of fb_get_mode in the file of 472 * drivers/video/fbmon.c 473 * 474 * Standard GTF parameters: 475 * M = 600 476 * C = 40 477 * K = 128 478 * J = 20 479 */ 480 struct drm_display_mode * 481 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 482 bool lace, int margins) 483 { 484 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, 485 margins, 600, 40 * 2, 128, 20 * 2); 486 } 487 EXPORT_SYMBOL(drm_gtf_mode); 488 489 /** 490 * drm_mode_set_name - set the name on a mode 491 * @mode: name will be set in this mode 492 * 493 * LOCKING: 494 * None. 495 * 496 * Set the name of @mode to a standard format. 497 */ 498 void drm_mode_set_name(struct drm_display_mode *mode) 499 { 500 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 501 502 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 503 mode->hdisplay, mode->vdisplay, 504 interlaced ? "i" : ""); 505 } 506 EXPORT_SYMBOL(drm_mode_set_name); 507 508 /** 509 * drm_mode_list_concat - move modes from one list to another 510 * @head: source list 511 * @new: dst list 512 * 513 * LOCKING: 514 * Caller must ensure both lists are locked. 515 * 516 * Move all the modes from @head to @new. 517 */ 518 void drm_mode_list_concat(struct list_head *head, struct list_head *new) 519 { 520 521 struct list_head *entry, *tmp; 522 523 list_for_each_safe(entry, tmp, head) { 524 list_move_tail(entry, new); 525 } 526 } 527 EXPORT_SYMBOL(drm_mode_list_concat); 528 529 /** 530 * drm_mode_width - get the width of a mode 531 * @mode: mode 532 * 533 * LOCKING: 534 * None. 535 * 536 * Return @mode's width (hdisplay) value. 537 * 538 * FIXME: is this needed? 539 * 540 * RETURNS: 541 * @mode->hdisplay 542 */ 543 int drm_mode_width(const struct drm_display_mode *mode) 544 { 545 return mode->hdisplay; 546 547 } 548 EXPORT_SYMBOL(drm_mode_width); 549 550 /** 551 * drm_mode_height - get the height of a mode 552 * @mode: mode 553 * 554 * LOCKING: 555 * None. 556 * 557 * Return @mode's height (vdisplay) value. 558 * 559 * FIXME: is this needed? 560 * 561 * RETURNS: 562 * @mode->vdisplay 563 */ 564 int drm_mode_height(const struct drm_display_mode *mode) 565 { 566 return mode->vdisplay; 567 } 568 EXPORT_SYMBOL(drm_mode_height); 569 570 /** drm_mode_hsync - get the hsync of a mode 571 * @mode: mode 572 * 573 * LOCKING: 574 * None. 575 * 576 * Return @modes's hsync rate in kHz, rounded to the nearest int. 577 */ 578 int drm_mode_hsync(const struct drm_display_mode *mode) 579 { 580 unsigned int calc_val; 581 582 if (mode->hsync) 583 return mode->hsync; 584 585 if (mode->htotal < 0) 586 return 0; 587 588 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 589 calc_val += 500; /* round to 1000Hz */ 590 calc_val /= 1000; /* truncate to kHz */ 591 592 return calc_val; 593 } 594 EXPORT_SYMBOL(drm_mode_hsync); 595 596 /** 597 * drm_mode_vrefresh - get the vrefresh of a mode 598 * @mode: mode 599 * 600 * LOCKING: 601 * None. 602 * 603 * Return @mode's vrefresh rate in Hz or calculate it if necessary. 604 * 605 * FIXME: why is this needed? shouldn't vrefresh be set already? 606 * 607 * RETURNS: 608 * Vertical refresh rate. It will be the result of actual value plus 0.5. 609 * If it is 70.288, it will return 70Hz. 610 * If it is 59.6, it will return 60Hz. 611 */ 612 int drm_mode_vrefresh(const struct drm_display_mode *mode) 613 { 614 int refresh = 0; 615 unsigned int calc_val; 616 617 if (mode->vrefresh > 0) 618 refresh = mode->vrefresh; 619 else if (mode->htotal > 0 && mode->vtotal > 0) { 620 int vtotal; 621 vtotal = mode->vtotal; 622 /* work out vrefresh the value will be x1000 */ 623 calc_val = (mode->clock * 1000); 624 calc_val /= mode->htotal; 625 refresh = (calc_val + vtotal / 2) / vtotal; 626 627 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 628 refresh *= 2; 629 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 630 refresh /= 2; 631 if (mode->vscan > 1) 632 refresh /= mode->vscan; 633 } 634 return refresh; 635 } 636 EXPORT_SYMBOL(drm_mode_vrefresh); 637 638 /** 639 * drm_mode_set_crtcinfo - set CRTC modesetting parameters 640 * @p: mode 641 * @adjust_flags: unused? (FIXME) 642 * 643 * LOCKING: 644 * None. 645 * 646 * Setup the CRTC modesetting parameters for @p, adjusting if necessary. 647 */ 648 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 649 { 650 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 651 return; 652 653 p->crtc_hdisplay = p->hdisplay; 654 p->crtc_hsync_start = p->hsync_start; 655 p->crtc_hsync_end = p->hsync_end; 656 p->crtc_htotal = p->htotal; 657 p->crtc_hskew = p->hskew; 658 p->crtc_vdisplay = p->vdisplay; 659 p->crtc_vsync_start = p->vsync_start; 660 p->crtc_vsync_end = p->vsync_end; 661 p->crtc_vtotal = p->vtotal; 662 663 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 664 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 665 p->crtc_vdisplay /= 2; 666 p->crtc_vsync_start /= 2; 667 p->crtc_vsync_end /= 2; 668 p->crtc_vtotal /= 2; 669 } 670 } 671 672 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 673 p->crtc_vdisplay *= 2; 674 p->crtc_vsync_start *= 2; 675 p->crtc_vsync_end *= 2; 676 p->crtc_vtotal *= 2; 677 } 678 679 if (p->vscan > 1) { 680 p->crtc_vdisplay *= p->vscan; 681 p->crtc_vsync_start *= p->vscan; 682 p->crtc_vsync_end *= p->vscan; 683 p->crtc_vtotal *= p->vscan; 684 } 685 686 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 687 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 688 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 689 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 690 } 691 EXPORT_SYMBOL(drm_mode_set_crtcinfo); 692 693 694 /** 695 * drm_mode_copy - copy the mode 696 * @dst: mode to overwrite 697 * @src: mode to copy 698 * 699 * LOCKING: 700 * None. 701 * 702 * Copy an existing mode into another mode, preserving the object id 703 * of the destination mode. 704 */ 705 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) 706 { 707 int id = dst->base.id; 708 709 *dst = *src; 710 dst->base.id = id; 711 INIT_LIST_HEAD(&dst->head); 712 } 713 EXPORT_SYMBOL(drm_mode_copy); 714 715 /** 716 * drm_mode_duplicate - allocate and duplicate an existing mode 717 * @m: mode to duplicate 718 * 719 * LOCKING: 720 * None. 721 * 722 * Just allocate a new mode, copy the existing mode into it, and return 723 * a pointer to it. Used to create new instances of established modes. 724 */ 725 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 726 const struct drm_display_mode *mode) 727 { 728 struct drm_display_mode *nmode; 729 730 nmode = drm_mode_create(dev); 731 if (!nmode) 732 return NULL; 733 734 drm_mode_copy(nmode, mode); 735 736 return nmode; 737 } 738 EXPORT_SYMBOL(drm_mode_duplicate); 739 740 /** 741 * drm_mode_equal - test modes for equality 742 * @mode1: first mode 743 * @mode2: second mode 744 * 745 * LOCKING: 746 * None. 747 * 748 * Check to see if @mode1 and @mode2 are equivalent. 749 * 750 * RETURNS: 751 * True if the modes are equal, false otherwise. 752 */ 753 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) 754 { 755 /* do clock check convert to PICOS so fb modes get matched 756 * the same */ 757 if (mode1->clock && mode2->clock) { 758 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 759 return false; 760 } else if (mode1->clock != mode2->clock) 761 return false; 762 763 if (mode1->hdisplay == mode2->hdisplay && 764 mode1->hsync_start == mode2->hsync_start && 765 mode1->hsync_end == mode2->hsync_end && 766 mode1->htotal == mode2->htotal && 767 mode1->hskew == mode2->hskew && 768 mode1->vdisplay == mode2->vdisplay && 769 mode1->vsync_start == mode2->vsync_start && 770 mode1->vsync_end == mode2->vsync_end && 771 mode1->vtotal == mode2->vtotal && 772 mode1->vscan == mode2->vscan && 773 mode1->flags == mode2->flags) 774 return true; 775 776 return false; 777 } 778 EXPORT_SYMBOL(drm_mode_equal); 779 780 /** 781 * drm_mode_validate_size - make sure modes adhere to size constraints 782 * @dev: DRM device 783 * @mode_list: list of modes to check 784 * @maxX: maximum width 785 * @maxY: maximum height 786 * @maxPitch: max pitch 787 * 788 * LOCKING: 789 * Caller must hold a lock protecting @mode_list. 790 * 791 * The DRM device (@dev) has size and pitch limits. Here we validate the 792 * modes we probed for @dev against those limits and set their status as 793 * necessary. 794 */ 795 void drm_mode_validate_size(struct drm_device *dev, 796 struct list_head *mode_list, 797 int maxX, int maxY, int maxPitch) 798 { 799 struct drm_display_mode *mode; 800 801 list_for_each_entry(mode, mode_list, head) { 802 if (maxPitch > 0 && mode->hdisplay > maxPitch) 803 mode->status = MODE_BAD_WIDTH; 804 805 if (maxX > 0 && mode->hdisplay > maxX) 806 mode->status = MODE_VIRTUAL_X; 807 808 if (maxY > 0 && mode->vdisplay > maxY) 809 mode->status = MODE_VIRTUAL_Y; 810 } 811 } 812 EXPORT_SYMBOL(drm_mode_validate_size); 813 814 /** 815 * drm_mode_validate_clocks - validate modes against clock limits 816 * @dev: DRM device 817 * @mode_list: list of modes to check 818 * @min: minimum clock rate array 819 * @max: maximum clock rate array 820 * @n_ranges: number of clock ranges (size of arrays) 821 * 822 * LOCKING: 823 * Caller must hold a lock protecting @mode_list. 824 * 825 * Some code may need to check a mode list against the clock limits of the 826 * device in question. This function walks the mode list, testing to make 827 * sure each mode falls within a given range (defined by @min and @max 828 * arrays) and sets @mode->status as needed. 829 */ 830 void drm_mode_validate_clocks(struct drm_device *dev, 831 struct list_head *mode_list, 832 int *min, int *max, int n_ranges) 833 { 834 struct drm_display_mode *mode; 835 int i; 836 837 list_for_each_entry(mode, mode_list, head) { 838 bool good = false; 839 for (i = 0; i < n_ranges; i++) { 840 if (mode->clock >= min[i] && mode->clock <= max[i]) { 841 good = true; 842 break; 843 } 844 } 845 if (!good) 846 mode->status = MODE_CLOCK_RANGE; 847 } 848 } 849 EXPORT_SYMBOL(drm_mode_validate_clocks); 850 851 /** 852 * drm_mode_prune_invalid - remove invalid modes from mode list 853 * @dev: DRM device 854 * @mode_list: list of modes to check 855 * @verbose: be verbose about it 856 * 857 * LOCKING: 858 * Caller must hold a lock protecting @mode_list. 859 * 860 * Once mode list generation is complete, a caller can use this routine to 861 * remove invalid modes from a mode list. If any of the modes have a 862 * status other than %MODE_OK, they are removed from @mode_list and freed. 863 */ 864 void drm_mode_prune_invalid(struct drm_device *dev, 865 struct list_head *mode_list, bool verbose) 866 { 867 struct drm_display_mode *mode, *t; 868 869 list_for_each_entry_safe(mode, t, mode_list, head) { 870 if (mode->status != MODE_OK) { 871 list_del(&mode->head); 872 if (verbose) { 873 drm_mode_debug_printmodeline(mode); 874 DRM_DEBUG_KMS("Not using %s mode %d\n", 875 mode->name, mode->status); 876 } 877 drm_mode_destroy(dev, mode); 878 } 879 } 880 } 881 EXPORT_SYMBOL(drm_mode_prune_invalid); 882 883 /** 884 * drm_mode_compare - compare modes for favorability 885 * @priv: unused 886 * @lh_a: list_head for first mode 887 * @lh_b: list_head for second mode 888 * 889 * LOCKING: 890 * None. 891 * 892 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 893 * which is better. 894 * 895 * RETURNS: 896 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 897 * positive if @lh_b is better than @lh_a. 898 */ 899 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 900 { 901 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 902 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 903 int diff; 904 905 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 906 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 907 if (diff) 908 return diff; 909 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 910 if (diff) 911 return diff; 912 913 diff = b->vrefresh - a->vrefresh; 914 if (diff) 915 return diff; 916 917 diff = b->clock - a->clock; 918 return diff; 919 } 920 921 /** 922 * drm_mode_sort - sort mode list 923 * @mode_list: list to sort 924 * 925 * LOCKING: 926 * Caller must hold a lock protecting @mode_list. 927 * 928 * Sort @mode_list by favorability, putting good modes first. 929 */ 930 void drm_mode_sort(struct list_head *mode_list) 931 { 932 drm_list_sort(NULL, mode_list, drm_mode_compare); 933 } 934 EXPORT_SYMBOL(drm_mode_sort); 935 936 /** 937 * drm_mode_connector_list_update - update the mode list for the connector 938 * @connector: the connector to update 939 * 940 * LOCKING: 941 * Caller must hold a lock protecting @mode_list. 942 * 943 * This moves the modes from the @connector probed_modes list 944 * to the actual mode list. It compares the probed mode against the current 945 * list and only adds different modes. All modes unverified after this point 946 * will be removed by the prune invalid modes. 947 */ 948 void drm_mode_connector_list_update(struct drm_connector *connector) 949 { 950 struct drm_display_mode *mode; 951 struct drm_display_mode *pmode, *pt; 952 int found_it; 953 954 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 955 head) { 956 found_it = 0; 957 /* go through current modes checking for the new probed mode */ 958 list_for_each_entry(mode, &connector->modes, head) { 959 if (drm_mode_equal(pmode, mode)) { 960 found_it = 1; 961 /* if equal delete the probed mode */ 962 mode->status = pmode->status; 963 /* Merge type bits together */ 964 mode->type |= pmode->type; 965 list_del(&pmode->head); 966 drm_mode_destroy(connector->dev, pmode); 967 break; 968 } 969 } 970 971 if (!found_it) { 972 list_move_tail(&pmode->head, &connector->modes); 973 } 974 } 975 } 976 EXPORT_SYMBOL(drm_mode_connector_list_update); 977 978 /** 979 * drm_mode_parse_command_line_for_connector - parse command line for connector 980 * @mode_option - per connector mode option 981 * @connector - connector to parse line for 982 * 983 * This parses the connector specific then generic command lines for 984 * modes and options to configure the connector. 985 * 986 * This uses the same parameters as the fb modedb.c, except for extra 987 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 988 * 989 * enable/enable Digital/disable bit at the end 990 */ 991 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 992 struct drm_connector *connector, 993 struct drm_cmdline_mode *mode) 994 { 995 const char *name; 996 unsigned int namelen; 997 bool res_specified = false, bpp_specified = false, refresh_specified = false; 998 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 999 bool yres_specified = false, cvt = false, rb = false; 1000 bool interlace = false, margins = false, was_digit = false; 1001 int i; 1002 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 1003 1004 #ifdef CONFIG_FB 1005 if (!mode_option) 1006 mode_option = fb_mode_option; 1007 #endif 1008 1009 if (!mode_option) { 1010 mode->specified = false; 1011 return false; 1012 } 1013 1014 name = mode_option; 1015 namelen = strlen(name); 1016 for (i = namelen-1; i >= 0; i--) { 1017 switch (name[i]) { 1018 case '@': 1019 if (!refresh_specified && !bpp_specified && 1020 !yres_specified && !cvt && !rb && was_digit) { 1021 refresh = simple_strtol(&name[i+1], NULL, 10); 1022 refresh_specified = true; 1023 was_digit = false; 1024 } else 1025 goto done; 1026 break; 1027 case '-': 1028 if (!bpp_specified && !yres_specified && !cvt && 1029 !rb && was_digit) { 1030 bpp = simple_strtol(&name[i+1], NULL, 10); 1031 bpp_specified = true; 1032 was_digit = false; 1033 } else 1034 goto done; 1035 break; 1036 case 'x': 1037 if (!yres_specified && was_digit) { 1038 yres = simple_strtol(&name[i+1], NULL, 10); 1039 yres_specified = true; 1040 was_digit = false; 1041 } else 1042 goto done; 1043 case '0' ... '9': 1044 was_digit = true; 1045 break; 1046 case 'M': 1047 if (yres_specified || cvt || was_digit) 1048 goto done; 1049 cvt = true; 1050 break; 1051 case 'R': 1052 if (yres_specified || cvt || rb || was_digit) 1053 goto done; 1054 rb = true; 1055 break; 1056 case 'm': 1057 if (cvt || yres_specified || was_digit) 1058 goto done; 1059 margins = true; 1060 break; 1061 case 'i': 1062 if (cvt || yres_specified || was_digit) 1063 goto done; 1064 interlace = true; 1065 break; 1066 case 'e': 1067 if (yres_specified || bpp_specified || refresh_specified || 1068 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1069 goto done; 1070 1071 force = DRM_FORCE_ON; 1072 break; 1073 case 'D': 1074 if (yres_specified || bpp_specified || refresh_specified || 1075 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1076 goto done; 1077 1078 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1079 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1080 force = DRM_FORCE_ON; 1081 else 1082 force = DRM_FORCE_ON_DIGITAL; 1083 break; 1084 case 'd': 1085 if (yres_specified || bpp_specified || refresh_specified || 1086 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1087 goto done; 1088 1089 force = DRM_FORCE_OFF; 1090 break; 1091 default: 1092 goto done; 1093 } 1094 } 1095 1096 if (i < 0 && yres_specified) { 1097 char *ch; 1098 xres = simple_strtol(name, &ch, 10); 1099 if ((ch != NULL) && (*ch == 'x')) 1100 res_specified = true; 1101 else 1102 i = ch - name; 1103 } else if (!yres_specified && was_digit) { 1104 /* catch mode that begins with digits but has no 'x' */ 1105 i = 0; 1106 } 1107 done: 1108 if (i >= 0) { 1109 DRM_WARNING( 1110 "parse error at position %i in video mode '%s'\n", 1111 i, name); 1112 mode->specified = false; 1113 return false; 1114 } 1115 1116 if (res_specified) { 1117 mode->specified = true; 1118 mode->xres = xres; 1119 mode->yres = yres; 1120 } 1121 1122 if (refresh_specified) { 1123 mode->refresh_specified = true; 1124 mode->refresh = refresh; 1125 } 1126 1127 if (bpp_specified) { 1128 mode->bpp_specified = true; 1129 mode->bpp = bpp; 1130 } 1131 mode->rb = rb; 1132 mode->cvt = cvt; 1133 mode->interlace = interlace; 1134 mode->margins = margins; 1135 mode->force = force; 1136 1137 return true; 1138 } 1139 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); 1140 1141 struct drm_display_mode * 1142 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1143 struct drm_cmdline_mode *cmd) 1144 { 1145 struct drm_display_mode *mode; 1146 1147 if (cmd->cvt) 1148 mode = drm_cvt_mode(dev, 1149 cmd->xres, cmd->yres, 1150 cmd->refresh_specified ? cmd->refresh : 60, 1151 cmd->rb, cmd->interlace, 1152 cmd->margins); 1153 else 1154 mode = drm_gtf_mode(dev, 1155 cmd->xres, cmd->yres, 1156 cmd->refresh_specified ? cmd->refresh : 60, 1157 cmd->interlace, 1158 cmd->margins); 1159 if (!mode) 1160 return NULL; 1161 1162 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1163 return mode; 1164 } 1165 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode); 1166