1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright © 2021-2023 Dmitry Salychev 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #ifndef _DPAA2_IO_H 29 #define _DPAA2_IO_H 30 31 #include <sys/rman.h> 32 #include <sys/bus.h> 33 #include <sys/queue.h> 34 35 #include "dpaa2_types.h" 36 #include "dpaa2_mcp.h" 37 #include "dpaa2_swp.h" 38 39 /* Maximum resources per DPIO: 3 SYS_MEM + 1 DPMCP. */ 40 #define DPAA2_IO_MAX_RESOURCES 4 41 /* Maximum number of MSIs supported by the DPIO objects. */ 42 #define DPAA2_IO_MSI_COUNT 1 43 44 enum dpaa2_io_chan_mode { 45 DPAA2_IO_NO_CHANNEL, 46 DPAA2_IO_LOCAL_CHANNEL 47 }; 48 49 /** 50 * @brief Attributes of the DPIO object. 51 * 52 * swp_ce_paddr: Physical address of the cache-enabled area. 53 * swp_ci_paddr: Physical address of the cache-inhibited area. 54 * swp_version: Hardware IP version of the software portal. 55 * swp_clk: QBMAN clock frequency value in Hz. 56 * id: DPIO object ID. 57 * swp_id: Software portal ID. 58 * priors_num: Number of priorities for the notification channel (1-8); 59 * relevant only if channel mode is "local channel". 60 * chan_mode: Notification channel mode. 61 */ 62 struct dpaa2_io_attr { 63 uint64_t swp_ce_paddr; 64 uint64_t swp_ci_paddr; 65 uint32_t swp_version; 66 uint32_t swp_clk; 67 uint32_t id; 68 uint16_t swp_id; 69 uint8_t priors_num; 70 enum dpaa2_io_chan_mode chan_mode; 71 }; 72 73 /** 74 * @brief Context used by DPIO to configure data availability notifications 75 * (CDAN) on a particular WQ channel. 76 */ 77 struct dpaa2_io_notif_ctx { 78 device_t io_dev; 79 void *channel; 80 uint64_t qman_ctx; 81 uint16_t fq_chan_id; 82 bool cdan_en; 83 }; 84 85 /** 86 * @brief Software context for the DPAA2 I/O driver. 87 */ 88 struct dpaa2_io_softc { 89 device_t dev; 90 struct dpaa2_swp_desc swp_desc; 91 struct dpaa2_swp *swp; 92 struct dpaa2_io_attr attr; 93 94 struct resource *res[DPAA2_IO_MAX_RESOURCES]; 95 struct resource_map map[DPAA2_IO_MAX_RESOURCES]; 96 97 int irq_rid[DPAA2_IO_MSI_COUNT]; 98 struct resource *irq_resource; 99 void *intr; /* interrupt handle */ 100 101 int cpu; 102 cpuset_t cpu_mask; 103 }; 104 105 extern struct resource_spec dpaa2_io_spec[]; 106 107 #endif /* _DPAA2_IO_H */ 108