1 /*- 2 * Copyright (c) 2015 Landon Fuller <landon@landonf.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 32 #ifndef _BHND_BHNDB_H_ 33 #define _BHND_BHNDB_H_ 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 38 #include <machine/bus.h> 39 #include <sys/rman.h> 40 #include <machine/resource.h> 41 42 #include <dev/bhnd/bhnd.h> 43 44 #include "bhndb_bus_if.h" 45 46 DECLARE_CLASS(bhnd_bhndb_driver); 47 48 int bhndb_attach_bridge(device_t parent, device_t *bhndb, int unit); 49 50 /** 51 * bhndb register window types. 52 */ 53 typedef enum { 54 BHNDB_REGWIN_T_CORE, /**< Fixed mapping of a core port region. */ 55 BHNDB_REGWIN_T_SPROM, /**< Fixed mapping of device SPROM */ 56 BHNDB_REGWIN_T_DYN, /**< A dynamically configurable window */ 57 BHNDB_REGWIN_T_INVALID /**< Invalid type */ 58 } bhndb_regwin_type_t; 59 60 /** 61 * Evaluates to true if @p _rt defines a static mapping. 62 * 63 * @param _rt A bhndb_regwin_type_t value. 64 */ 65 #define BHNDB_REGWIN_T_IS_STATIC(_rt) \ 66 ((_rt) == BHNDB_REGWIN_T_CORE || \ 67 (_rt) == BHNDB_REGWIN_T_SPROM) 68 69 /** 70 * bhndb register window definition. 71 */ 72 struct bhndb_regwin { 73 bhndb_regwin_type_t win_type; /**< window type */ 74 bus_size_t win_offset; /**< offset of the window within the resource */ 75 bus_size_t win_size; /**< size of the window */ 76 77 /** Resource identification */ 78 struct { 79 int type; /**< resource type */ 80 int rid; /**< resource id */ 81 } res; 82 83 union { 84 /** Core-specific register window (BHNDB_REGWIN_T_CORE). */ 85 struct { 86 bhnd_devclass_t class; /**< mapped core's class */ 87 u_int unit; /**< mapped core's unit */ 88 bhnd_port_type port_type; /**< mapped port type */ 89 u_int port; /**< mapped port number */ 90 u_int region; /**< mapped region number */ 91 bhnd_size_t offset; /**< mapped offset within the region */ 92 } core; 93 94 /** SPROM register window (BHNDB_REGWIN_T_SPROM). */ 95 struct {} sprom; 96 97 /** Dynamic register window (BHNDB_REGWIN_T_DYN). */ 98 struct { 99 bus_size_t cfg_offset; /**< window address config offset. */ 100 } dyn; 101 } d; 102 }; 103 #define BHNDB_REGWIN_TABLE_END { BHNDB_REGWIN_T_INVALID, 0, 0, { 0, 0 } } 104 105 /** 106 * Bridge hardware configuration. 107 * 108 * Provides the bridge's DMA address translation descriptions, register/address 109 * mappings, and the resources via which those mappings may be accessed. 110 */ 111 struct bhndb_hwcfg { 112 const struct resource_spec *resource_specs; /**< resources required by our register windows */ 113 const struct bhndb_regwin *register_windows; /**< register window table */ 114 const struct bhnd_dma_translation *dma_translations; /**< DMA address translation table, or NULL if DMA is not supported */ 115 }; 116 117 /** 118 * Hardware specification entry. 119 * 120 * Defines a set of match criteria that may be used to determine the 121 * register map and resource configuration for a bhndb bridge device. 122 */ 123 struct bhndb_hw { 124 const char *name; /**< configuration name */ 125 const struct bhnd_core_match *hw_reqs; /**< match requirements */ 126 u_int num_hw_reqs; /**< number of match requirements */ 127 const struct bhndb_hwcfg *cfg; /**< associated hardware configuration */ 128 }; 129 130 /** 131 * bhndb resource allocation priorities. 132 */ 133 typedef enum { 134 /** No direct resources should ever be allocated for this device. */ 135 BHNDB_PRIORITY_NONE = 0, 136 137 /** Allocate a direct resource if available after serving all other 138 * higher-priority requests. */ 139 BHNDB_PRIORITY_LOW = 1, 140 141 /** Direct resource allocation is preferred, but not necessary 142 * for reasonable runtime performance. */ 143 BHNDB_PRIORITY_DEFAULT = 2, 144 145 /** Indirect resource allocation would incur high runtime overhead. */ 146 BHNDB_PRIORITY_HIGH = 3 147 } bhndb_priority_t; 148 149 /** 150 * bhndb resource allocation flags. 151 */ 152 enum bhndb_alloc_flags { 153 /** 154 * If resource overcommit prevents fulfilling a request for this 155 * resource, an in-use resource should be borrowed to fulfill the 156 * request. 157 * 158 * The only known use case is to support accessing the ChipCommon core 159 * during Wi-Fi driver operation on early PCI Wi-Fi devices 160 * (PCI_V0, SSB) that do not provide a dedicated ChipCommon register 161 * window mapping; on such devices, device and firmware semantics 162 * guarantee the safety of -- after disabling interrupts -- borrowing 163 * the single dynamic register window that's been assigned to the D11 164 * core to perform the few ChipCommon operations required by the driver. 165 */ 166 BHNDB_ALLOC_FULFILL_ON_OVERCOMMIT = (1<<0), 167 }; 168 169 /** 170 * Port resource priority descriptor. 171 */ 172 struct bhndb_port_priority { 173 bhnd_port_type type; /**< port type. */ 174 u_int port; /**< port */ 175 u_int region; /**< region */ 176 bhndb_priority_t priority; /**< port priority */ 177 uint32_t alloc_flags; /**< port allocation flags (@see bhndb_alloc_flags) */ 178 }; 179 180 /** 181 * Core resource priority descriptor. 182 */ 183 struct bhndb_hw_priority { 184 struct bhnd_core_match match; /**< core match descriptor */ 185 bhndb_priority_t priority; /**< core-level priority */ 186 const struct bhndb_port_priority *ports; /**< port priorities */ 187 u_int num_ports; /**< number of port priority records. */ 188 }; 189 #define BHNDB_HW_PRIORITY_TABLE_END { {}, BHNDB_PRIORITY_NONE, NULL, 0 } 190 191 #endif /* _BHND_BHNDB_H_ */ 192