1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2011 The FreeBSD Foundation 5 * 6 * This software was developed by Konstantin Belousov under sponsorship from 7 * the FreeBSD Foundation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef AGP_AGP_I810_H 34 #define AGP_AGP_I810_H 35 36 #include <sys/param.h> 37 #include <sys/rman.h> 38 #include <sys/sglist.h> 39 40 #include <vm/vm.h> 41 #include <vm/vm_page.h> 42 43 /* Special gtt memory types */ 44 #define AGP_DCACHE_MEMORY 1 45 #define AGP_PHYS_MEMORY 2 46 47 /* New caching attributes for gen6/sandybridge */ 48 #define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2) 49 #define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4) 50 51 /* flag for GFDT type */ 52 #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) 53 54 struct intel_gtt { 55 /* Size of memory reserved for graphics by the BIOS */ 56 unsigned int stolen_size; 57 /* Total number of gtt entries. */ 58 unsigned int gtt_total_entries; 59 /* Part of the gtt that is mappable by the cpu, for those chips where 60 * this is not the full gtt. */ 61 unsigned int gtt_mappable_entries; 62 /* Whether i915 needs to use the dmar apis or not. */ 63 unsigned int needs_dmar : 1; 64 /* Whether we idle the gpu before mapping/unmapping */ 65 unsigned int do_idle_maps : 1; 66 /* Share the scratch page dma with ppgtts. */ 67 vm_paddr_t scratch_page_dma; 68 vm_page_t scratch_page; 69 /* for ppgtt PDE access */ 70 uint32_t *gtt; 71 /* needed for ioremap in drm/i915 */ 72 bus_addr_t gma_bus_addr; 73 }; 74 75 struct intel_gtt agp_intel_gtt_get(device_t dev); 76 int agp_intel_gtt_chipset_flush(device_t dev); 77 void agp_intel_gtt_unmap_memory(device_t dev, struct sglist *sg_list); 78 void agp_intel_gtt_clear_range(device_t dev, u_int first_entry, 79 u_int num_entries); 80 int agp_intel_gtt_map_memory(device_t dev, vm_page_t *pages, u_int num_entries, 81 struct sglist **sg_list); 82 void agp_intel_gtt_insert_sg_entries(device_t dev, struct sglist *sg_list, 83 u_int pg_start, u_int flags); 84 void agp_intel_gtt_insert_pages(device_t dev, u_int first_entry, 85 u_int num_entries, vm_page_t *pages, u_int flags); 86 87 struct intel_gtt *intel_gtt_get(void); 88 int intel_gtt_chipset_flush(void); 89 void intel_gtt_unmap_memory(struct sglist *sg_list); 90 void intel_gtt_clear_range(u_int first_entry, u_int num_entries); 91 void intel_gtt_install_pte(u_int index, vm_paddr_t addr, u_int flags); 92 int intel_gtt_map_memory(vm_page_t *pages, u_int num_entries, 93 struct sglist **sg_list); 94 void intel_gtt_insert_sg_entries(struct sglist *sg_list, u_int pg_start, 95 u_int flags); 96 void intel_gtt_insert_pages(u_int first_entry, u_int num_entries, 97 vm_page_t *pages, u_int flags); 98 vm_paddr_t intel_gtt_read_pte_paddr(u_int entry); 99 u_int32_t intel_gtt_read_pte(u_int entry); 100 device_t intel_gtt_get_bridge_device(void); 101 void intel_gtt_write(u_int entry, uint32_t val); 102 103 #endif 104