1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2000 Doug Rabson 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/module.h> 37 #include <sys/bus.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/proc.h> 41 42 #include <dev/agp/agppriv.h> 43 #include <dev/agp/agpreg.h> 44 #include <dev/pci/pcivar.h> 45 #include <dev/pci/pcireg.h> 46 47 #include <vm/vm.h> 48 #include <vm/vm_extern.h> 49 #include <vm/vm_kern.h> 50 #include <vm/vm_object.h> 51 #include <vm/pmap.h> 52 #include <machine/bus.h> 53 #include <machine/resource.h> 54 #include <sys/rman.h> 55 56 MALLOC_DECLARE(M_AGP); 57 58 #define READ2(off) bus_space_read_2(sc->bst, sc->bsh, off) 59 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off) 60 #define WRITE2(off,v) bus_space_write_2(sc->bst, sc->bsh, off, v) 61 #define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v) 62 63 struct agp_amd_gatt { 64 u_int32_t ag_entries; 65 u_int32_t *ag_virtual; /* virtual address of gatt */ 66 vm_offset_t ag_physical; 67 u_int32_t *ag_vdir; /* virtual address of page dir */ 68 vm_offset_t ag_pdir; /* physical address of page dir */ 69 }; 70 71 struct agp_amd_softc { 72 struct agp_softc agp; 73 struct resource *regs; /* memory mapped control registers */ 74 bus_space_tag_t bst; /* bus_space tag */ 75 bus_space_handle_t bsh; /* bus_space handle */ 76 u_int32_t initial_aperture; /* aperture size at startup */ 77 struct agp_amd_gatt *gatt; 78 }; 79 80 static struct agp_amd_gatt * 81 agp_amd_alloc_gatt(device_t dev) 82 { 83 u_int32_t apsize = AGP_GET_APERTURE(dev); 84 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 85 struct agp_amd_gatt *gatt; 86 int i, npages, pdir_offset; 87 88 if (bootverbose) 89 device_printf(dev, 90 "allocating GATT for aperture of size %dM\n", 91 apsize / (1024*1024)); 92 93 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT); 94 if (!gatt) 95 return 0; 96 97 /* 98 * The AMD751 uses a page directory to map a non-contiguous 99 * gatt so we don't need to use kmem_alloc_contig. 100 * Allocate individual GATT pages and map them into the page 101 * directory. 102 */ 103 gatt->ag_entries = entries; 104 gatt->ag_virtual = (void *)kmem_alloc_attr(kernel_arena, 105 entries * sizeof(u_int32_t), M_NOWAIT | M_ZERO, 0, ~0, 106 VM_MEMATTR_WRITE_COMBINING); 107 if (!gatt->ag_virtual) { 108 if (bootverbose) 109 device_printf(dev, "allocation failed\n"); 110 free(gatt, M_AGP); 111 return 0; 112 } 113 114 /* 115 * Allocate the page directory. 116 */ 117 gatt->ag_vdir = (void *)kmem_alloc_attr(kernel_arena, AGP_PAGE_SIZE, 118 M_NOWAIT | M_ZERO, 0, ~0, VM_MEMATTR_WRITE_COMBINING); 119 if (!gatt->ag_vdir) { 120 if (bootverbose) 121 device_printf(dev, 122 "failed to allocate page directory\n"); 123 kmem_free(kernel_arena, (vm_offset_t)gatt->ag_virtual, 124 entries * sizeof(u_int32_t)); 125 free(gatt, M_AGP); 126 return 0; 127 } 128 129 gatt->ag_pdir = vtophys((vm_offset_t) gatt->ag_vdir); 130 if(bootverbose) 131 device_printf(dev, "gatt -> ag_pdir %#lx\n", 132 (u_long)gatt->ag_pdir); 133 /* 134 * Allocate the gatt pages 135 */ 136 gatt->ag_entries = entries; 137 if(bootverbose) 138 device_printf(dev, "allocating GATT for %d AGP page entries\n", 139 gatt->ag_entries); 140 141 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 142 143 /* 144 * Map the pages of the GATT into the page directory. 145 * 146 * The GATT page addresses are mapped into the directory offset by 147 * an amount dependent on the base address of the aperture. This 148 * is and offset into the page directory, not an offset added to 149 * the addresses of the gatt pages. 150 */ 151 152 pdir_offset = pci_read_config(dev, AGP_AMD751_APBASE, 4) >> 22; 153 154 npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1) 155 >> AGP_PAGE_SHIFT); 156 157 for (i = 0; i < npages; i++) { 158 vm_offset_t va; 159 vm_offset_t pa; 160 161 va = ((vm_offset_t) gatt->ag_virtual) + i * AGP_PAGE_SIZE; 162 pa = vtophys(va); 163 gatt->ag_vdir[i + pdir_offset] = pa | 1; 164 } 165 166 return gatt; 167 } 168 169 static void 170 agp_amd_free_gatt(struct agp_amd_gatt *gatt) 171 { 172 kmem_free(kernel_arena, (vm_offset_t)gatt->ag_vdir, AGP_PAGE_SIZE); 173 kmem_free(kernel_arena, (vm_offset_t)gatt->ag_virtual, 174 gatt->ag_entries * sizeof(u_int32_t)); 175 free(gatt, M_AGP); 176 } 177 178 static const char* 179 agp_amd_match(device_t dev) 180 { 181 if (pci_get_class(dev) != PCIC_BRIDGE 182 || pci_get_subclass(dev) != PCIS_BRIDGE_HOST) 183 return NULL; 184 185 if (agp_find_caps(dev) == 0) 186 return NULL; 187 188 switch (pci_get_devid(dev)) { 189 case 0x70061022: 190 return ("AMD 751 host to AGP bridge"); 191 case 0x700e1022: 192 return ("AMD 761 host to AGP bridge"); 193 case 0x700c1022: 194 return ("AMD 762 host to AGP bridge"); 195 } 196 197 return NULL; 198 } 199 200 static int 201 agp_amd_probe(device_t dev) 202 { 203 const char *desc; 204 205 if (resource_disabled("agp", device_get_unit(dev))) 206 return (ENXIO); 207 desc = agp_amd_match(dev); 208 if (desc) { 209 device_set_desc(dev, desc); 210 return BUS_PROBE_DEFAULT; 211 } 212 213 return ENXIO; 214 } 215 216 static int 217 agp_amd_attach(device_t dev) 218 { 219 struct agp_amd_softc *sc = device_get_softc(dev); 220 struct agp_amd_gatt *gatt; 221 int error, rid; 222 223 error = agp_generic_attach(dev); 224 if (error) 225 return error; 226 227 rid = AGP_AMD751_REGISTERS; 228 sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 229 RF_ACTIVE); 230 if (!sc->regs) { 231 agp_generic_detach(dev); 232 return ENOMEM; 233 } 234 235 sc->bst = rman_get_bustag(sc->regs); 236 sc->bsh = rman_get_bushandle(sc->regs); 237 238 sc->initial_aperture = AGP_GET_APERTURE(dev); 239 240 for (;;) { 241 gatt = agp_amd_alloc_gatt(dev); 242 if (gatt) 243 break; 244 245 /* 246 * Probably contigmalloc failure. Try reducing the 247 * aperture so that the gatt size reduces. 248 */ 249 if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) 250 return ENOMEM; 251 } 252 sc->gatt = gatt; 253 254 /* Install the gatt. */ 255 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_pdir); 256 257 /* Enable synchronisation between host and agp. */ 258 pci_write_config(dev, 259 AGP_AMD751_MODECTRL, 260 AGP_AMD751_MODECTRL_SYNEN, 1); 261 262 /* Set indexing mode for two-level and enable page dir cache */ 263 pci_write_config(dev, 264 AGP_AMD751_MODECTRL2, 265 AGP_AMD751_MODECTRL2_GPDCE, 1); 266 267 /* Enable the TLB and flush */ 268 WRITE2(AGP_AMD751_STATUS, 269 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE); 270 AGP_FLUSH_TLB(dev); 271 272 return 0; 273 } 274 275 static int 276 agp_amd_detach(device_t dev) 277 { 278 struct agp_amd_softc *sc = device_get_softc(dev); 279 280 agp_free_cdev(dev); 281 282 /* Disable the TLB.. */ 283 WRITE2(AGP_AMD751_STATUS, 284 READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE); 285 286 /* Disable host-agp sync */ 287 pci_write_config(dev, AGP_AMD751_MODECTRL, 0x00, 1); 288 289 /* Clear the GATT base */ 290 WRITE4(AGP_AMD751_ATTBASE, 0); 291 292 /* Put the aperture back the way it started. */ 293 AGP_SET_APERTURE(dev, sc->initial_aperture); 294 295 agp_amd_free_gatt(sc->gatt); 296 agp_free_res(dev); 297 298 bus_release_resource(dev, SYS_RES_MEMORY, 299 AGP_AMD751_REGISTERS, sc->regs); 300 301 return 0; 302 } 303 304 static u_int32_t 305 agp_amd_get_aperture(device_t dev) 306 { 307 int vas; 308 309 /* 310 * The aperture size is equal to 32M<<vas. 311 */ 312 vas = (pci_read_config(dev, AGP_AMD751_APCTRL, 1) & 0x06) >> 1; 313 return (32*1024*1024) << vas; 314 } 315 316 static int 317 agp_amd_set_aperture(device_t dev, u_int32_t aperture) 318 { 319 int vas; 320 321 /* 322 * Check for a power of two and make sure its within the 323 * programmable range. 324 */ 325 if (aperture & (aperture - 1) 326 || aperture < 32*1024*1024 327 || aperture > 2U*1024*1024*1024) 328 return EINVAL; 329 330 vas = ffs(aperture / 32*1024*1024) - 1; 331 332 /* 333 * While the size register is bits 1-3 of APCTRL, bit 0 must be 334 * set for the size value to be 'valid' 335 */ 336 pci_write_config(dev, AGP_AMD751_APCTRL, 337 (((pci_read_config(dev, AGP_AMD751_APCTRL, 1) & ~0x06) 338 | ((vas << 1) | 1))), 1); 339 340 return 0; 341 } 342 343 static int 344 agp_amd_bind_page(device_t dev, vm_offset_t offset, vm_offset_t physical) 345 { 346 struct agp_amd_softc *sc = device_get_softc(dev); 347 348 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 349 return EINVAL; 350 351 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1; 352 return 0; 353 } 354 355 static int 356 agp_amd_unbind_page(device_t dev, vm_offset_t offset) 357 { 358 struct agp_amd_softc *sc = device_get_softc(dev); 359 360 if (offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) 361 return EINVAL; 362 363 sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; 364 return 0; 365 } 366 367 static void 368 agp_amd_flush_tlb(device_t dev) 369 { 370 struct agp_amd_softc *sc = device_get_softc(dev); 371 372 /* Set the cache invalidate bit and wait for the chipset to clear */ 373 WRITE4(AGP_AMD751_TLBCTRL, 1); 374 do { 375 DELAY(1); 376 } while (READ4(AGP_AMD751_TLBCTRL)); 377 } 378 379 static device_method_t agp_amd_methods[] = { 380 /* Device interface */ 381 DEVMETHOD(device_probe, agp_amd_probe), 382 DEVMETHOD(device_attach, agp_amd_attach), 383 DEVMETHOD(device_detach, agp_amd_detach), 384 DEVMETHOD(device_shutdown, bus_generic_shutdown), 385 DEVMETHOD(device_suspend, bus_generic_suspend), 386 DEVMETHOD(device_resume, bus_generic_resume), 387 388 /* AGP interface */ 389 DEVMETHOD(agp_get_aperture, agp_amd_get_aperture), 390 DEVMETHOD(agp_set_aperture, agp_amd_set_aperture), 391 DEVMETHOD(agp_bind_page, agp_amd_bind_page), 392 DEVMETHOD(agp_unbind_page, agp_amd_unbind_page), 393 DEVMETHOD(agp_flush_tlb, agp_amd_flush_tlb), 394 DEVMETHOD(agp_enable, agp_generic_enable), 395 DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory), 396 DEVMETHOD(agp_free_memory, agp_generic_free_memory), 397 DEVMETHOD(agp_bind_memory, agp_generic_bind_memory), 398 DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory), 399 400 { 0, 0 } 401 }; 402 403 static driver_t agp_amd_driver = { 404 "agp", 405 agp_amd_methods, 406 sizeof(struct agp_amd_softc), 407 }; 408 409 static devclass_t agp_devclass; 410 411 DRIVER_MODULE(agp_amd, hostb, agp_amd_driver, agp_devclass, 0, 0); 412 MODULE_DEPEND(agp_amd, agp, 1, 1, 1); 413 MODULE_DEPEND(agp_amd, pci, 1, 1, 1); 414