1 /*- 2 * Copyright (c) 2005-2008 Pawel Jakub Dawidek <pjd@FreeBSD.org> 3 * Copyright (c) 2010 Konstantin Belousov <kib@FreeBSD.org> 4 * Copyright (c) 2014-2021 The FreeBSD Foundation 5 * Copyright (c) 2017 Conrad Meyer <cem@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Portions of this software were developed by John-Mark Gurney 9 * under sponsorship of the FreeBSD Foundation and 10 * Rubicon Communications, LLC (Netgate). 11 * 12 * Portions of this software were developed by Ararat River 13 * Consulting, LLC under sponsorship of the FreeBSD Foundation. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 */ 36 37 #include <sys/cdefs.h> 38 __FBSDID("$FreeBSD$"); 39 40 #include <sys/param.h> 41 #include <sys/bus.h> 42 #include <sys/kernel.h> 43 #include <sys/kobj.h> 44 #include <sys/libkern.h> 45 #include <sys/lock.h> 46 #include <sys/malloc.h> 47 #include <sys/mbuf.h> 48 #include <sys/module.h> 49 #include <sys/mutex.h> 50 #include <sys/smp.h> 51 #include <sys/systm.h> 52 #include <sys/uio.h> 53 54 #include <crypto/aesni/aesni.h> 55 #include <crypto/aesni/sha_sse.h> 56 #include <crypto/sha1.h> 57 #include <crypto/sha2/sha224.h> 58 #include <crypto/sha2/sha256.h> 59 60 #include <opencrypto/cryptodev.h> 61 #include <opencrypto/gmac.h> 62 #include <cryptodev_if.h> 63 64 #include <machine/md_var.h> 65 #include <machine/specialreg.h> 66 #include <machine/fpu.h> 67 68 static struct mtx_padalign *ctx_mtx; 69 static struct fpu_kern_ctx **ctx_fpu; 70 71 struct aesni_softc { 72 int32_t cid; 73 bool has_aes; 74 bool has_sha; 75 }; 76 77 #define ACQUIRE_CTX(i, ctx) \ 78 do { \ 79 (i) = PCPU_GET(cpuid); \ 80 mtx_lock(&ctx_mtx[(i)]); \ 81 (ctx) = ctx_fpu[(i)]; \ 82 } while (0) 83 #define RELEASE_CTX(i, ctx) \ 84 do { \ 85 mtx_unlock(&ctx_mtx[(i)]); \ 86 (i) = -1; \ 87 (ctx) = NULL; \ 88 } while (0) 89 90 static int aesni_cipher_setup(struct aesni_session *ses, 91 const struct crypto_session_params *csp); 92 static int aesni_cipher_process(struct aesni_session *ses, struct cryptop *crp); 93 static int aesni_cipher_crypt(struct aesni_session *ses, struct cryptop *crp, 94 const struct crypto_session_params *csp); 95 static int aesni_cipher_mac(struct aesni_session *ses, struct cryptop *crp, 96 const struct crypto_session_params *csp); 97 98 MALLOC_DEFINE(M_AESNI, "aesni_data", "AESNI Data"); 99 100 static void 101 aesni_identify(driver_t *drv, device_t parent) 102 { 103 104 /* NB: order 10 is so we get attached after h/w devices */ 105 if (device_find_child(parent, "aesni", -1) == NULL && 106 BUS_ADD_CHILD(parent, 10, "aesni", -1) == 0) 107 panic("aesni: could not attach"); 108 } 109 110 static void 111 detect_cpu_features(bool *has_aes, bool *has_sha) 112 { 113 114 *has_aes = ((cpu_feature2 & CPUID2_AESNI) != 0 && 115 (cpu_feature2 & CPUID2_SSE41) != 0); 116 *has_sha = ((cpu_stdext_feature & CPUID_STDEXT_SHA) != 0 && 117 (cpu_feature2 & CPUID2_SSSE3) != 0); 118 } 119 120 static int 121 aesni_probe(device_t dev) 122 { 123 bool has_aes, has_sha; 124 125 detect_cpu_features(&has_aes, &has_sha); 126 if (!has_aes && !has_sha) { 127 device_printf(dev, "No AES or SHA support.\n"); 128 return (EINVAL); 129 } else if (has_aes && has_sha) 130 device_set_desc(dev, 131 "AES-CBC,AES-CCM,AES-GCM,AES-ICM,AES-XTS,SHA1,SHA256"); 132 else if (has_aes) 133 device_set_desc(dev, 134 "AES-CBC,AES-CCM,AES-GCM,AES-ICM,AES-XTS"); 135 else 136 device_set_desc(dev, "SHA1,SHA256"); 137 138 return (0); 139 } 140 141 static void 142 aesni_cleanctx(void) 143 { 144 int i; 145 146 /* XXX - no way to return driverid */ 147 CPU_FOREACH(i) { 148 if (ctx_fpu[i] != NULL) { 149 mtx_destroy(&ctx_mtx[i]); 150 fpu_kern_free_ctx(ctx_fpu[i]); 151 } 152 ctx_fpu[i] = NULL; 153 } 154 free(ctx_mtx, M_AESNI); 155 ctx_mtx = NULL; 156 free(ctx_fpu, M_AESNI); 157 ctx_fpu = NULL; 158 } 159 160 static int 161 aesni_attach(device_t dev) 162 { 163 struct aesni_softc *sc; 164 int i; 165 166 sc = device_get_softc(dev); 167 168 sc->cid = crypto_get_driverid(dev, sizeof(struct aesni_session), 169 CRYPTOCAP_F_SOFTWARE | CRYPTOCAP_F_SYNC | 170 CRYPTOCAP_F_ACCEL_SOFTWARE); 171 if (sc->cid < 0) { 172 device_printf(dev, "Could not get crypto driver id.\n"); 173 return (ENOMEM); 174 } 175 176 ctx_mtx = malloc(sizeof *ctx_mtx * (mp_maxid + 1), M_AESNI, 177 M_WAITOK|M_ZERO); 178 ctx_fpu = malloc(sizeof *ctx_fpu * (mp_maxid + 1), M_AESNI, 179 M_WAITOK|M_ZERO); 180 181 CPU_FOREACH(i) { 182 #ifdef __amd64__ 183 ctx_fpu[i] = fpu_kern_alloc_ctx_domain( 184 pcpu_find(i)->pc_domain, FPU_KERN_NORMAL); 185 #else 186 ctx_fpu[i] = fpu_kern_alloc_ctx(FPU_KERN_NORMAL); 187 #endif 188 mtx_init(&ctx_mtx[i], "anifpumtx", NULL, MTX_DEF|MTX_NEW); 189 } 190 191 detect_cpu_features(&sc->has_aes, &sc->has_sha); 192 return (0); 193 } 194 195 static int 196 aesni_detach(device_t dev) 197 { 198 struct aesni_softc *sc; 199 200 sc = device_get_softc(dev); 201 202 crypto_unregister_all(sc->cid); 203 204 aesni_cleanctx(); 205 206 return (0); 207 } 208 209 static bool 210 aesni_auth_supported(struct aesni_softc *sc, 211 const struct crypto_session_params *csp) 212 { 213 214 if (!sc->has_sha) 215 return (false); 216 217 switch (csp->csp_auth_alg) { 218 case CRYPTO_SHA1: 219 case CRYPTO_SHA2_224: 220 case CRYPTO_SHA2_256: 221 case CRYPTO_SHA1_HMAC: 222 case CRYPTO_SHA2_224_HMAC: 223 case CRYPTO_SHA2_256_HMAC: 224 break; 225 default: 226 return (false); 227 } 228 229 return (true); 230 } 231 232 static bool 233 aesni_cipher_supported(struct aesni_softc *sc, 234 const struct crypto_session_params *csp) 235 { 236 237 if (!sc->has_aes) 238 return (false); 239 240 switch (csp->csp_cipher_alg) { 241 case CRYPTO_AES_CBC: 242 case CRYPTO_AES_ICM: 243 switch (csp->csp_cipher_klen * 8) { 244 case 128: 245 case 192: 246 case 256: 247 break; 248 default: 249 CRYPTDEB("invalid CBC/ICM key length"); 250 return (false); 251 } 252 if (csp->csp_ivlen != AES_BLOCK_LEN) 253 return (false); 254 break; 255 case CRYPTO_AES_XTS: 256 switch (csp->csp_cipher_klen * 8) { 257 case 256: 258 case 512: 259 break; 260 default: 261 CRYPTDEB("invalid XTS key length"); 262 return (false); 263 } 264 if (csp->csp_ivlen != AES_XTS_IV_LEN) 265 return (false); 266 break; 267 default: 268 return (false); 269 } 270 271 return (true); 272 } 273 274 #define SUPPORTED_SES (CSP_F_SEPARATE_OUTPUT | CSP_F_SEPARATE_AAD | CSP_F_ESN) 275 276 static int 277 aesni_probesession(device_t dev, const struct crypto_session_params *csp) 278 { 279 struct aesni_softc *sc; 280 281 sc = device_get_softc(dev); 282 if ((csp->csp_flags & ~(SUPPORTED_SES)) != 0) 283 return (EINVAL); 284 switch (csp->csp_mode) { 285 case CSP_MODE_DIGEST: 286 if (!aesni_auth_supported(sc, csp)) 287 return (EINVAL); 288 break; 289 case CSP_MODE_CIPHER: 290 if (!aesni_cipher_supported(sc, csp)) 291 return (EINVAL); 292 break; 293 case CSP_MODE_AEAD: 294 switch (csp->csp_cipher_alg) { 295 case CRYPTO_AES_NIST_GCM_16: 296 switch (csp->csp_cipher_klen * 8) { 297 case 128: 298 case 192: 299 case 256: 300 break; 301 default: 302 CRYPTDEB("invalid GCM key length"); 303 return (EINVAL); 304 } 305 if (csp->csp_auth_mlen != 0 && 306 csp->csp_auth_mlen != GMAC_DIGEST_LEN) 307 return (EINVAL); 308 if (csp->csp_ivlen != AES_GCM_IV_LEN || 309 !sc->has_aes) 310 return (EINVAL); 311 break; 312 case CRYPTO_AES_CCM_16: 313 switch (csp->csp_cipher_klen * 8) { 314 case 128: 315 case 192: 316 case 256: 317 break; 318 default: 319 CRYPTDEB("invalid CCM key length"); 320 return (EINVAL); 321 } 322 if (!sc->has_aes) 323 return (EINVAL); 324 break; 325 default: 326 return (EINVAL); 327 } 328 break; 329 case CSP_MODE_ETA: 330 if (!aesni_auth_supported(sc, csp) || 331 !aesni_cipher_supported(sc, csp)) 332 return (EINVAL); 333 break; 334 default: 335 return (EINVAL); 336 } 337 338 return (CRYPTODEV_PROBE_ACCEL_SOFTWARE); 339 } 340 341 static int 342 aesni_newsession(device_t dev, crypto_session_t cses, 343 const struct crypto_session_params *csp) 344 { 345 struct aesni_softc *sc; 346 struct aesni_session *ses; 347 int error; 348 349 sc = device_get_softc(dev); 350 351 ses = crypto_get_driver_session(cses); 352 353 switch (csp->csp_mode) { 354 case CSP_MODE_DIGEST: 355 case CSP_MODE_CIPHER: 356 case CSP_MODE_AEAD: 357 case CSP_MODE_ETA: 358 break; 359 default: 360 return (EINVAL); 361 } 362 error = aesni_cipher_setup(ses, csp); 363 if (error != 0) { 364 CRYPTDEB("setup failed"); 365 return (error); 366 } 367 368 return (0); 369 } 370 371 static int 372 aesni_process(device_t dev, struct cryptop *crp, int hint __unused) 373 { 374 struct aesni_session *ses; 375 int error; 376 377 ses = crypto_get_driver_session(crp->crp_session); 378 379 error = aesni_cipher_process(ses, crp); 380 381 crp->crp_etype = error; 382 crypto_done(crp); 383 return (0); 384 } 385 386 static uint8_t * 387 aesni_cipher_alloc(struct cryptop *crp, int start, int length, bool *allocated) 388 { 389 uint8_t *addr; 390 391 addr = crypto_contiguous_subsegment(crp, start, length); 392 if (addr != NULL) { 393 *allocated = false; 394 return (addr); 395 } 396 addr = malloc(length, M_AESNI, M_NOWAIT); 397 if (addr != NULL) { 398 *allocated = true; 399 crypto_copydata(crp, start, length, addr); 400 } else 401 *allocated = false; 402 return (addr); 403 } 404 405 static device_method_t aesni_methods[] = { 406 DEVMETHOD(device_identify, aesni_identify), 407 DEVMETHOD(device_probe, aesni_probe), 408 DEVMETHOD(device_attach, aesni_attach), 409 DEVMETHOD(device_detach, aesni_detach), 410 411 DEVMETHOD(cryptodev_probesession, aesni_probesession), 412 DEVMETHOD(cryptodev_newsession, aesni_newsession), 413 DEVMETHOD(cryptodev_process, aesni_process), 414 415 DEVMETHOD_END 416 }; 417 418 static driver_t aesni_driver = { 419 "aesni", 420 aesni_methods, 421 sizeof(struct aesni_softc), 422 }; 423 static devclass_t aesni_devclass; 424 425 DRIVER_MODULE(aesni, nexus, aesni_driver, aesni_devclass, 0, 0); 426 MODULE_VERSION(aesni, 1); 427 MODULE_DEPEND(aesni, crypto, 1, 1, 1); 428 429 static int 430 intel_sha1_update(void *vctx, const void *vdata, u_int datalen) 431 { 432 struct sha1_ctxt *ctx = vctx; 433 const char *data = vdata; 434 size_t gaplen; 435 size_t gapstart; 436 size_t off; 437 size_t copysiz; 438 u_int blocks; 439 440 off = 0; 441 /* Do any aligned blocks without redundant copying. */ 442 if (datalen >= 64 && ctx->count % 64 == 0) { 443 blocks = datalen / 64; 444 ctx->c.b64[0] += blocks * 64 * 8; 445 intel_sha1_step(ctx->h.b32, data + off, blocks); 446 off += blocks * 64; 447 } 448 449 while (off < datalen) { 450 gapstart = ctx->count % 64; 451 gaplen = 64 - gapstart; 452 453 copysiz = (gaplen < datalen - off) ? gaplen : datalen - off; 454 bcopy(&data[off], &ctx->m.b8[gapstart], copysiz); 455 ctx->count += copysiz; 456 ctx->count %= 64; 457 ctx->c.b64[0] += copysiz * 8; 458 if (ctx->count % 64 == 0) 459 intel_sha1_step(ctx->h.b32, (void *)ctx->m.b8, 1); 460 off += copysiz; 461 } 462 463 return (0); 464 } 465 466 static void 467 SHA1_Init_fn(void *ctx) 468 { 469 sha1_init(ctx); 470 } 471 472 static void 473 SHA1_Finalize_fn(void *digest, void *ctx) 474 { 475 sha1_result(ctx, digest); 476 } 477 478 static int 479 intel_sha256_update(void *vctx, const void *vdata, u_int len) 480 { 481 SHA256_CTX *ctx = vctx; 482 uint64_t bitlen; 483 uint32_t r; 484 u_int blocks; 485 const unsigned char *src = vdata; 486 487 /* Number of bytes left in the buffer from previous updates */ 488 r = (ctx->count >> 3) & 0x3f; 489 490 /* Convert the length into a number of bits */ 491 bitlen = len << 3; 492 493 /* Update number of bits */ 494 ctx->count += bitlen; 495 496 /* Handle the case where we don't need to perform any transforms */ 497 if (len < 64 - r) { 498 memcpy(&ctx->buf[r], src, len); 499 return (0); 500 } 501 502 /* Finish the current block */ 503 memcpy(&ctx->buf[r], src, 64 - r); 504 intel_sha256_step(ctx->state, ctx->buf, 1); 505 src += 64 - r; 506 len -= 64 - r; 507 508 /* Perform complete blocks */ 509 if (len >= 64) { 510 blocks = len / 64; 511 intel_sha256_step(ctx->state, src, blocks); 512 src += blocks * 64; 513 len -= blocks * 64; 514 } 515 516 /* Copy left over data into buffer */ 517 memcpy(ctx->buf, src, len); 518 519 return (0); 520 } 521 522 static void 523 SHA224_Init_fn(void *ctx) 524 { 525 SHA224_Init(ctx); 526 } 527 528 static void 529 SHA224_Finalize_fn(void *digest, void *ctx) 530 { 531 SHA224_Final(digest, ctx); 532 } 533 534 static void 535 SHA256_Init_fn(void *ctx) 536 { 537 SHA256_Init(ctx); 538 } 539 540 static void 541 SHA256_Finalize_fn(void *digest, void *ctx) 542 { 543 SHA256_Final(digest, ctx); 544 } 545 546 static int 547 aesni_authprepare(struct aesni_session *ses, int klen) 548 { 549 550 if (klen > SHA1_BLOCK_LEN) 551 return (EINVAL); 552 if ((ses->hmac && klen == 0) || (!ses->hmac && klen != 0)) 553 return (EINVAL); 554 return (0); 555 } 556 557 static int 558 aesni_cipher_setup(struct aesni_session *ses, 559 const struct crypto_session_params *csp) 560 { 561 struct fpu_kern_ctx *ctx; 562 uint8_t *schedbase; 563 int kt, ctxidx, error; 564 565 schedbase = (uint8_t *)roundup2((uintptr_t)ses->schedules, 566 AES_SCHED_ALIGN); 567 ses->enc_schedule = schedbase; 568 ses->dec_schedule = schedbase + AES_SCHED_LEN; 569 ses->xts_schedule = schedbase + AES_SCHED_LEN * 2; 570 571 switch (csp->csp_auth_alg) { 572 case CRYPTO_SHA1_HMAC: 573 ses->hmac = true; 574 /* FALLTHROUGH */ 575 case CRYPTO_SHA1: 576 ses->hash_len = SHA1_HASH_LEN; 577 ses->hash_init = SHA1_Init_fn; 578 ses->hash_update = intel_sha1_update; 579 ses->hash_finalize = SHA1_Finalize_fn; 580 break; 581 case CRYPTO_SHA2_224_HMAC: 582 ses->hmac = true; 583 /* FALLTHROUGH */ 584 case CRYPTO_SHA2_224: 585 ses->hash_len = SHA2_224_HASH_LEN; 586 ses->hash_init = SHA224_Init_fn; 587 ses->hash_update = intel_sha256_update; 588 ses->hash_finalize = SHA224_Finalize_fn; 589 break; 590 case CRYPTO_SHA2_256_HMAC: 591 ses->hmac = true; 592 /* FALLTHROUGH */ 593 case CRYPTO_SHA2_256: 594 ses->hash_len = SHA2_256_HASH_LEN; 595 ses->hash_init = SHA256_Init_fn; 596 ses->hash_update = intel_sha256_update; 597 ses->hash_finalize = SHA256_Finalize_fn; 598 break; 599 } 600 601 if (ses->hash_len != 0) { 602 if (csp->csp_auth_mlen == 0) 603 ses->mlen = ses->hash_len; 604 else 605 ses->mlen = csp->csp_auth_mlen; 606 607 error = aesni_authprepare(ses, csp->csp_auth_klen); 608 if (error != 0) 609 return (error); 610 } else if (csp->csp_cipher_alg == CRYPTO_AES_CCM_16) { 611 if (csp->csp_auth_mlen == 0) 612 ses->mlen = AES_CBC_MAC_HASH_LEN; 613 else 614 ses->mlen = csp->csp_auth_mlen; 615 } 616 617 kt = is_fpu_kern_thread(0) || (csp->csp_cipher_alg == 0); 618 if (!kt) { 619 ACQUIRE_CTX(ctxidx, ctx); 620 fpu_kern_enter(curthread, ctx, 621 FPU_KERN_NORMAL | FPU_KERN_KTHR); 622 } 623 624 error = 0; 625 if (csp->csp_cipher_key != NULL) 626 aesni_cipher_setup_common(ses, csp, csp->csp_cipher_key, 627 csp->csp_cipher_klen); 628 629 if (!kt) { 630 fpu_kern_leave(curthread, ctx); 631 RELEASE_CTX(ctxidx, ctx); 632 } 633 return (error); 634 } 635 636 static int 637 aesni_cipher_process(struct aesni_session *ses, struct cryptop *crp) 638 { 639 const struct crypto_session_params *csp; 640 struct fpu_kern_ctx *ctx; 641 int error, ctxidx; 642 bool kt; 643 644 csp = crypto_get_params(crp->crp_session); 645 switch (csp->csp_cipher_alg) { 646 case CRYPTO_AES_CCM_16: 647 if (crp->crp_payload_length > ccm_max_payload_length(csp)) 648 return (EMSGSIZE); 649 /* FALLTHROUGH */ 650 case CRYPTO_AES_ICM: 651 case CRYPTO_AES_NIST_GCM_16: 652 if ((crp->crp_flags & CRYPTO_F_IV_SEPARATE) == 0) 653 return (EINVAL); 654 break; 655 case CRYPTO_AES_CBC: 656 case CRYPTO_AES_XTS: 657 /* CBC & XTS can only handle full blocks for now */ 658 if ((crp->crp_payload_length % AES_BLOCK_LEN) != 0) 659 return (EINVAL); 660 break; 661 } 662 663 ctx = NULL; 664 ctxidx = 0; 665 error = 0; 666 kt = is_fpu_kern_thread(0); 667 if (!kt) { 668 ACQUIRE_CTX(ctxidx, ctx); 669 fpu_kern_enter(curthread, ctx, 670 FPU_KERN_NORMAL | FPU_KERN_KTHR); 671 } 672 673 /* Do work */ 674 if (csp->csp_mode == CSP_MODE_ETA) { 675 if (CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) { 676 error = aesni_cipher_crypt(ses, crp, csp); 677 if (error == 0) 678 error = aesni_cipher_mac(ses, crp, csp); 679 } else { 680 error = aesni_cipher_mac(ses, crp, csp); 681 if (error == 0) 682 error = aesni_cipher_crypt(ses, crp, csp); 683 } 684 } else if (csp->csp_mode == CSP_MODE_DIGEST) 685 error = aesni_cipher_mac(ses, crp, csp); 686 else 687 error = aesni_cipher_crypt(ses, crp, csp); 688 689 if (!kt) { 690 fpu_kern_leave(curthread, ctx); 691 RELEASE_CTX(ctxidx, ctx); 692 } 693 return (error); 694 } 695 696 static int 697 aesni_cipher_crypt(struct aesni_session *ses, struct cryptop *crp, 698 const struct crypto_session_params *csp) 699 { 700 uint8_t iv[AES_BLOCK_LEN], tag[GMAC_DIGEST_LEN]; 701 uint8_t *authbuf, *buf, *outbuf; 702 int error; 703 bool encflag, allocated, authallocated, outallocated, outcopy; 704 705 if (crp->crp_payload_length == 0) { 706 buf = NULL; 707 allocated = false; 708 } else { 709 buf = aesni_cipher_alloc(crp, crp->crp_payload_start, 710 crp->crp_payload_length, &allocated); 711 if (buf == NULL) 712 return (ENOMEM); 713 } 714 715 outallocated = false; 716 authallocated = false; 717 authbuf = NULL; 718 if (csp->csp_cipher_alg == CRYPTO_AES_NIST_GCM_16 || 719 csp->csp_cipher_alg == CRYPTO_AES_CCM_16) { 720 if (crp->crp_aad_length == 0) { 721 authbuf = NULL; 722 } else if (crp->crp_aad != NULL) { 723 authbuf = crp->crp_aad; 724 } else { 725 authbuf = aesni_cipher_alloc(crp, crp->crp_aad_start, 726 crp->crp_aad_length, &authallocated); 727 if (authbuf == NULL) { 728 error = ENOMEM; 729 goto out; 730 } 731 } 732 } 733 734 if (CRYPTO_HAS_OUTPUT_BUFFER(crp) && crp->crp_payload_length > 0) { 735 outbuf = crypto_buffer_contiguous_subsegment(&crp->crp_obuf, 736 crp->crp_payload_output_start, crp->crp_payload_length); 737 if (outbuf == NULL) { 738 outcopy = true; 739 if (allocated) 740 outbuf = buf; 741 else { 742 outbuf = malloc(crp->crp_payload_length, 743 M_AESNI, M_NOWAIT); 744 if (outbuf == NULL) { 745 error = ENOMEM; 746 goto out; 747 } 748 outallocated = true; 749 } 750 } else 751 outcopy = false; 752 } else { 753 outbuf = buf; 754 outcopy = allocated; 755 } 756 757 error = 0; 758 encflag = CRYPTO_OP_IS_ENCRYPT(crp->crp_op); 759 if (crp->crp_cipher_key != NULL) 760 aesni_cipher_setup_common(ses, csp, crp->crp_cipher_key, 761 csp->csp_cipher_klen); 762 763 crypto_read_iv(crp, iv); 764 765 switch (csp->csp_cipher_alg) { 766 case CRYPTO_AES_CBC: 767 if (encflag) 768 aesni_encrypt_cbc(ses->rounds, ses->enc_schedule, 769 crp->crp_payload_length, buf, outbuf, iv); 770 else { 771 if (buf != outbuf) 772 memcpy(outbuf, buf, crp->crp_payload_length); 773 aesni_decrypt_cbc(ses->rounds, ses->dec_schedule, 774 crp->crp_payload_length, outbuf, iv); 775 } 776 break; 777 case CRYPTO_AES_ICM: 778 /* encryption & decryption are the same */ 779 aesni_encrypt_icm(ses->rounds, ses->enc_schedule, 780 crp->crp_payload_length, buf, outbuf, iv); 781 break; 782 case CRYPTO_AES_XTS: 783 if (encflag) 784 aesni_encrypt_xts(ses->rounds, ses->enc_schedule, 785 ses->xts_schedule, crp->crp_payload_length, buf, 786 outbuf, iv); 787 else 788 aesni_decrypt_xts(ses->rounds, ses->dec_schedule, 789 ses->xts_schedule, crp->crp_payload_length, buf, 790 outbuf, iv); 791 break; 792 case CRYPTO_AES_NIST_GCM_16: 793 if (encflag) { 794 memset(tag, 0, sizeof(tag)); 795 AES_GCM_encrypt(buf, outbuf, authbuf, iv, tag, 796 crp->crp_payload_length, crp->crp_aad_length, 797 csp->csp_ivlen, ses->enc_schedule, ses->rounds); 798 crypto_copyback(crp, crp->crp_digest_start, sizeof(tag), 799 tag); 800 } else { 801 crypto_copydata(crp, crp->crp_digest_start, sizeof(tag), 802 tag); 803 if (!AES_GCM_decrypt(buf, outbuf, authbuf, iv, tag, 804 crp->crp_payload_length, crp->crp_aad_length, 805 csp->csp_ivlen, ses->enc_schedule, ses->rounds)) 806 error = EBADMSG; 807 } 808 break; 809 case CRYPTO_AES_CCM_16: 810 if (encflag) { 811 memset(tag, 0, sizeof(tag)); 812 AES_CCM_encrypt(buf, outbuf, authbuf, iv, tag, 813 crp->crp_payload_length, crp->crp_aad_length, 814 csp->csp_ivlen, ses->mlen, ses->enc_schedule, 815 ses->rounds); 816 crypto_copyback(crp, crp->crp_digest_start, ses->mlen, 817 tag); 818 } else { 819 crypto_copydata(crp, crp->crp_digest_start, ses->mlen, 820 tag); 821 if (!AES_CCM_decrypt(buf, outbuf, authbuf, iv, tag, 822 crp->crp_payload_length, crp->crp_aad_length, 823 csp->csp_ivlen, ses->mlen, ses->enc_schedule, 824 ses->rounds)) 825 error = EBADMSG; 826 } 827 break; 828 } 829 if (outcopy && error == 0) 830 crypto_copyback(crp, CRYPTO_HAS_OUTPUT_BUFFER(crp) ? 831 crp->crp_payload_output_start : crp->crp_payload_start, 832 crp->crp_payload_length, outbuf); 833 834 out: 835 if (allocated) 836 zfree(buf, M_AESNI); 837 if (authallocated) 838 zfree(authbuf, M_AESNI); 839 if (outallocated) 840 zfree(outbuf, M_AESNI); 841 explicit_bzero(iv, sizeof(iv)); 842 explicit_bzero(tag, sizeof(tag)); 843 return (error); 844 } 845 846 static int 847 aesni_cipher_mac(struct aesni_session *ses, struct cryptop *crp, 848 const struct crypto_session_params *csp) 849 { 850 union { 851 struct SHA256Context sha2 __aligned(16); 852 struct sha1_ctxt sha1 __aligned(16); 853 } sctx; 854 uint32_t res[SHA2_256_HASH_LEN / sizeof(uint32_t)]; 855 const uint8_t *key; 856 int i, keylen; 857 858 if (crp->crp_auth_key != NULL) 859 key = crp->crp_auth_key; 860 else 861 key = csp->csp_auth_key; 862 keylen = csp->csp_auth_klen; 863 864 if (ses->hmac) { 865 uint8_t hmac_key[SHA1_BLOCK_LEN] __aligned(16); 866 867 /* Inner hash: (K ^ IPAD) || data */ 868 ses->hash_init(&sctx); 869 for (i = 0; i < keylen; i++) 870 hmac_key[i] = key[i] ^ HMAC_IPAD_VAL; 871 for (i = keylen; i < sizeof(hmac_key); i++) 872 hmac_key[i] = 0 ^ HMAC_IPAD_VAL; 873 ses->hash_update(&sctx, hmac_key, sizeof(hmac_key)); 874 875 if (crp->crp_aad != NULL) 876 ses->hash_update(&sctx, crp->crp_aad, 877 crp->crp_aad_length); 878 else 879 crypto_apply(crp, crp->crp_aad_start, 880 crp->crp_aad_length, ses->hash_update, &sctx); 881 if (CRYPTO_HAS_OUTPUT_BUFFER(crp) && 882 CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) 883 crypto_apply_buf(&crp->crp_obuf, 884 crp->crp_payload_output_start, 885 crp->crp_payload_length, 886 ses->hash_update, &sctx); 887 else 888 crypto_apply(crp, crp->crp_payload_start, 889 crp->crp_payload_length, ses->hash_update, &sctx); 890 891 if (csp->csp_flags & CSP_F_ESN) 892 ses->hash_update(&sctx, crp->crp_esn, 4); 893 894 ses->hash_finalize(res, &sctx); 895 896 /* Outer hash: (K ^ OPAD) || inner hash */ 897 ses->hash_init(&sctx); 898 for (i = 0; i < keylen; i++) 899 hmac_key[i] = key[i] ^ HMAC_OPAD_VAL; 900 for (i = keylen; i < sizeof(hmac_key); i++) 901 hmac_key[i] = 0 ^ HMAC_OPAD_VAL; 902 ses->hash_update(&sctx, hmac_key, sizeof(hmac_key)); 903 ses->hash_update(&sctx, res, ses->hash_len); 904 ses->hash_finalize(res, &sctx); 905 explicit_bzero(hmac_key, sizeof(hmac_key)); 906 } else { 907 ses->hash_init(&sctx); 908 909 if (crp->crp_aad != NULL) 910 ses->hash_update(&sctx, crp->crp_aad, 911 crp->crp_aad_length); 912 else 913 crypto_apply(crp, crp->crp_aad_start, 914 crp->crp_aad_length, ses->hash_update, &sctx); 915 if (CRYPTO_HAS_OUTPUT_BUFFER(crp) && 916 CRYPTO_OP_IS_ENCRYPT(crp->crp_op)) 917 crypto_apply_buf(&crp->crp_obuf, 918 crp->crp_payload_output_start, 919 crp->crp_payload_length, 920 ses->hash_update, &sctx); 921 else 922 crypto_apply(crp, crp->crp_payload_start, 923 crp->crp_payload_length, 924 ses->hash_update, &sctx); 925 926 ses->hash_finalize(res, &sctx); 927 } 928 929 if (crp->crp_op & CRYPTO_OP_VERIFY_DIGEST) { 930 uint32_t res2[SHA2_256_HASH_LEN / sizeof(uint32_t)]; 931 932 crypto_copydata(crp, crp->crp_digest_start, ses->mlen, res2); 933 if (timingsafe_bcmp(res, res2, ses->mlen) != 0) 934 return (EBADMSG); 935 explicit_bzero(res2, sizeof(res2)); 936 } else 937 crypto_copyback(crp, crp->crp_digest_start, ses->mlen, res); 938 explicit_bzero(res, sizeof(res)); 939 return (0); 940 } 941