1 /* 2 * Copyright 2008-2012 Freescale Semiconductor Inc. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright 9 * notice, this list of conditions and the following disclaimer in the 10 * documentation and/or other materials provided with the distribution. 11 * * Neither the name of Freescale Semiconductor nor the 12 * names of its contributors may be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * 16 * ALTERNATIVELY, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") as published by the Free Software 18 * Foundation, either version 2 of that License or (at your option) any 19 * later version. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 34 #ifndef __MEMAC_MII_ACC_H 35 #define __MEMAC_MII_ACC_H 36 37 #include "std_ext.h" 38 39 40 /* MII Management Registers */ 41 #define MDIO_CFG_CLK_DIV_MASK 0x0080ff80 42 #define MDIO_CFG_CLK_DIV_SHIFT 7 43 #define MDIO_CFG_HOLD_MASK 0x0000001c 44 #define MDIO_CFG_ENC45 0x00000040 45 #define MDIO_CFG_READ_ERR 0x00000002 46 #define MDIO_CFG_BSY 0x00000001 47 48 #define MDIO_CTL_PHY_ADDR_SHIFT 5 49 #define MDIO_CTL_READ 0x00008000 50 51 #define MDIO_DATA_BSY 0x80000000 52 53 #if defined(__MWERKS__) && !defined(__GNUC__) 54 #pragma pack(push,1) 55 #endif /* defined(__MWERKS__) && ... */ 56 57 /*----------------------------------------------------*/ 58 /* MII Configuration Control Memory Map Registers */ 59 /*----------------------------------------------------*/ 60 typedef struct t_MemacMiiAccessMemMap 61 { 62 volatile uint32_t mdio_cfg; /* 0x030 */ 63 volatile uint32_t mdio_ctrl; /* 0x034 */ 64 volatile uint32_t mdio_data; /* 0x038 */ 65 volatile uint32_t mdio_addr; /* 0x03c */ 66 } t_MemacMiiAccessMemMap ; 67 68 #if defined(__MWERKS__) && !defined(__GNUC__) 69 #pragma pack(pop) 70 #endif /* defined(__MWERKS__) && ... */ 71 72 73 #endif /* __MEMAC_MII_ACC_H */ 74