1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Device Tree file for the AM62P5-SK 4 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 5 * 6 * Schematics: https://www.ti.com/lit/zip/sprr487 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/net/ti-dp83867.h> 14#include "k3-am62p5.dtsi" 15 16/ { 17 compatible = "ti,am62p5-sk", "ti,am62p5"; 18 model = "Texas Instruments AM62P5 SK"; 19 20 aliases { 21 serial0 = &wkup_uart0; 22 serial1 = &mcu_uart0; 23 serial2 = &main_uart0; 24 serial3 = &main_uart1; 25 mmc0 = &sdhci0; 26 mmc1 = &sdhci1; 27 mmc2 = &sdhci2; 28 spi0 = &ospi0; 29 ethernet0 = &cpsw_port1; 30 ethernet1 = &cpsw_port2; 31 usb0 = &usb0; 32 usb1 = &usb1; 33 }; 34 35 chosen { 36 stdout-path = &main_uart0; 37 }; 38 39 memory@80000000 { 40 /* 8G RAM */ 41 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 42 <0x00000008 0x80000000 0x00000001 0x80000000>; 43 device_type = "memory"; 44 bootph-pre-ram; 45 }; 46 47 reserved-memory { 48 #address-cells = <2>; 49 #size-cells = <2>; 50 ranges; 51 52 mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 { 53 compatible = "shared-dma-pool"; 54 reg = <0x00 0x9b800000 0x00 0x100000>; 55 no-map; 56 }; 57 58 mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 { 59 compatible = "shared-dma-pool"; 60 reg = <0x00 0x9b900000 0x00 0xf00000>; 61 no-map; 62 }; 63 64 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { 65 compatible = "shared-dma-pool"; 66 reg = <0x00 0x9c800000 0x00 0x100000>; 67 no-map; 68 }; 69 70 wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 { 71 compatible = "shared-dma-pool"; 72 reg = <0x00 0x9c900000 0x00 0xf00000>; 73 no-map; 74 }; 75 76 secure_tfa_ddr: tfa@9e780000 { 77 reg = <0x00 0x9e780000 0x00 0x80000>; 78 no-map; 79 }; 80 81 secure_ddr: optee@9e800000 { 82 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 83 no-map; 84 }; 85 }; 86 87 vmain_pd: regulator-0 { 88 /* TPS65988 PD CONTROLLER OUTPUT */ 89 compatible = "regulator-fixed"; 90 regulator-name = "vmain_pd"; 91 regulator-min-microvolt = <5000000>; 92 regulator-max-microvolt = <5000000>; 93 regulator-always-on; 94 regulator-boot-on; 95 bootph-all; 96 }; 97 98 vcc_5v0: regulator-1 { 99 /* Output of TPS630702RNMR */ 100 compatible = "regulator-fixed"; 101 regulator-name = "vcc_5v0"; 102 regulator-min-microvolt = <5000000>; 103 regulator-max-microvolt = <5000000>; 104 vin-supply = <&vmain_pd>; 105 regulator-always-on; 106 regulator-boot-on; 107 bootph-all; 108 }; 109 110 vdd_mmc1: regulator-2 { 111 /* TPS22918DBVR */ 112 compatible = "regulator-fixed"; 113 regulator-name = "vdd_mmc1"; 114 regulator-min-microvolt = <3300000>; 115 regulator-max-microvolt = <3300000>; 116 regulator-boot-on; 117 enable-active-high; 118 gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 119 bootph-all; 120 }; 121 122 vddshv_sdio: regulator-3 { 123 compatible = "regulator-gpio"; 124 regulator-name = "vddshv_sdio"; 125 pinctrl-names = "default"; 126 pinctrl-0 = <&vddshv_sdio_pins_default>; 127 regulator-min-microvolt = <1800000>; 128 regulator-max-microvolt = <3300000>; 129 regulator-boot-on; 130 gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; 131 states = <1800000 0x0>, 132 <3300000 0x1>; 133 bootph-all; 134 }; 135 136 vcc_3v3_main: regulator-4 { 137 /* output of LM5141-Q1 */ 138 compatible = "regulator-fixed"; 139 regulator-name = "vcc_3v3_main"; 140 regulator-min-microvolt = <3300000>; 141 regulator-max-microvolt = <3300000>; 142 vin-supply = <&vmain_pd>; 143 regulator-always-on; 144 regulator-boot-on; 145 }; 146 147 vcc_3v3_sys: regulator-5 { 148 /* output of TPS222965DSGT */ 149 compatible = "regulator-fixed"; 150 regulator-name = "vcc_3v3_sys"; 151 regulator-min-microvolt = <3300000>; 152 regulator-max-microvolt = <3300000>; 153 vin-supply = <&vcc_3v3_main>; 154 regulator-always-on; 155 regulator-boot-on; 156 }; 157 158 leds { 159 compatible = "gpio-leds"; 160 pinctrl-names = "default"; 161 pinctrl-0 = <&usr_led_pins_default>; 162 163 led-0 { 164 label = "am62-sk:green:heartbeat"; 165 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 166 linux,default-trigger = "heartbeat"; 167 function = LED_FUNCTION_HEARTBEAT; 168 default-state = "off"; 169 }; 170 }; 171 172 opp-table { 173 /* Requires VDD_CORE at 0v85 */ 174 opp-1400000000 { 175 opp-hz = /bits/ 64 <1400000000>; 176 opp-supported-hw = <0x01 0x0004>; 177 clock-latency-ns = <6000000>; 178 }; 179 }; 180 181 tlv320_mclk: clk-0 { 182 #clock-cells = <0>; 183 compatible = "fixed-clock"; 184 clock-frequency = <12288000>; 185 }; 186 187 codec_audio: sound { 188 compatible = "simple-audio-card"; 189 simple-audio-card,name = "AM62x-SKEVM"; 190 simple-audio-card,widgets = 191 "Headphone", "Headphone Jack", 192 "Line", "Line In", 193 "Microphone", "Microphone Jack"; 194 simple-audio-card,routing = 195 "Headphone Jack", "HPLOUT", 196 "Headphone Jack", "HPROUT", 197 "LINE1L", "Line In", 198 "LINE1R", "Line In", 199 "MIC3R", "Microphone Jack", 200 "Microphone Jack", "Mic Bias"; 201 simple-audio-card,format = "dsp_b"; 202 simple-audio-card,bitclock-master = <&sound_master>; 203 simple-audio-card,frame-master = <&sound_master>; 204 simple-audio-card,bitclock-inversion; 205 206 simple-audio-card,cpu { 207 sound-dai = <&mcasp1>; 208 }; 209 210 sound_master: simple-audio-card,codec { 211 sound-dai = <&tlv320aic3106>; 212 clocks = <&tlv320_mclk>; 213 }; 214 }; 215}; 216 217&cpsw_mac_syscon { 218 bootph-all; 219}; 220 221&phy_gmii_sel { 222 bootph-all; 223}; 224 225&main_gpio0 { 226 bootph-all; 227}; 228 229&main_gpio1 { 230 bootph-all; 231}; 232 233&main_pmx0 { 234 bootph-all; 235 236 main_i2c0_pins_default: main-i2c0-default-pins { 237 pinctrl-single,pins = < 238 AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */ 239 AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */ 240 >; 241 }; 242 243 main_i2c1_pins_default: main-i2c1-default-pins { 244 pinctrl-single,pins = < 245 AM62PX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */ 246 AM62PX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B24) I2C1_SDA */ 247 >; 248 bootph-all; 249 }; 250 251 main_i2c2_pins_default: main-i2c2-default-pins { 252 pinctrl-single,pins = < 253 AM62PX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (T22) GPMC0_CSn2.I2C2_SCL */ 254 AM62PX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (U25) GPMC0_CSn3.I2C2_SDA */ 255 >; 256 }; 257 258 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { 259 pinctrl-single,pins = < 260 AM62PX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C22) UART0_RTSn.GPIO1_23 */ 261 >; 262 }; 263 264 main_mcasp1_pins_default: main-mcasp1-default-pins { 265 pinctrl-single,pins = < 266 AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX */ 267 AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */ 268 AM62PX_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */ 269 AM62PX_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 */ 270 >; 271 }; 272 273 main_mdio1_pins_default: main-mdio1-default-pins { 274 pinctrl-single,pins = < 275 AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */ 276 AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */ 277 >; 278 bootph-all; 279 }; 280 281 main_mmc1_pins_default: main-mmc1-default-pins { 282 pinctrl-single,pins = < 283 AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */ 284 AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */ 285 AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */ 286 AM62PX_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H23) MMC1_DAT1 */ 287 AM62PX_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (H22) MMC1_DAT2 */ 288 AM62PX_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */ 289 AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */ 290 >; 291 bootph-all; 292 }; 293 294 main_mmc2_pins_default: main-mmc2-default-pins { 295 pinctrl-single,pins = < 296 AM62PX_IOPAD(0x0120, PIN_INPUT, 0) /* (K24) MMC2_CMD */ 297 AM62PX_IOPAD(0x0118, PIN_OUTPUT, 0) /* (K21) MMC2_CLK */ 298 AM62PX_IOPAD(0x011C, PIN_INPUT, 0) /* () MMC2_CLKLB */ 299 AM62PX_IOPAD(0x0114, PIN_INPUT, 0) /* (K23) MMC2_DAT0 */ 300 AM62PX_IOPAD(0x0110, PIN_INPUT_PULLUP, 0) /* (K22) MMC2_DAT1 */ 301 AM62PX_IOPAD(0x010c, PIN_INPUT_PULLUP, 0) /* (L20) MMC2_DAT2 */ 302 AM62PX_IOPAD(0x0108, PIN_INPUT_PULLUP, 0) /* (L21) MMC2_DAT3 */ 303 >; 304 bootph-all; 305 }; 306 307 main_rgmii1_pins_default: main-rgmii1-default-pins { 308 pinctrl-single,pins = < 309 AM62PX_IOPAD(0x014c, PIN_INPUT, 0) /* (B15) RGMII1_RD0 */ 310 AM62PX_IOPAD(0x0150, PIN_INPUT, 0) /* (B16) RGMII1_RD1 */ 311 AM62PX_IOPAD(0x0154, PIN_INPUT, 0) /* (A14) RGMII1_RD2 */ 312 AM62PX_IOPAD(0x0158, PIN_INPUT, 0) /* (B14) RGMII1_RD3 */ 313 AM62PX_IOPAD(0x0148, PIN_INPUT, 0) /* (A16) RGMII1_RXC */ 314 AM62PX_IOPAD(0x0144, PIN_INPUT, 0) /* (A15) RGMII1_RX_CTL */ 315 AM62PX_IOPAD(0x0134, PIN_INPUT, 0) /* (A18) RGMII1_TD0 */ 316 AM62PX_IOPAD(0x0138, PIN_INPUT, 0) /* (C17) RGMII1_TD1 */ 317 AM62PX_IOPAD(0x013c, PIN_INPUT, 0) /* (A17) RGMII1_TD2 */ 318 AM62PX_IOPAD(0x0140, PIN_INPUT, 0) /* (C16) RGMII1_TD3 */ 319 AM62PX_IOPAD(0x0130, PIN_INPUT, 0) /* (B17) RGMII1_TXC */ 320 AM62PX_IOPAD(0x012c, PIN_INPUT, 0) /* (B18) RGMII1_TX_CTL */ 321 >; 322 bootph-all; 323 }; 324 325 main_rgmii2_pins_default: main-rgmii2-default-pins { 326 pinctrl-single,pins = < 327 AM62PX_IOPAD(0x0184, PIN_INPUT, 0) /* (E19) RGMII2_RD0 */ 328 AM62PX_IOPAD(0x0188, PIN_INPUT, 0) /* (E16) RGMII2_RD1 */ 329 AM62PX_IOPAD(0x018c, PIN_INPUT, 0) /* (E17) RGMII2_RD2 */ 330 AM62PX_IOPAD(0x0190, PIN_INPUT, 0) /* (C19) RGMII2_RD3 */ 331 AM62PX_IOPAD(0x0180, PIN_INPUT, 0) /* (D19) RGMII2_RXC */ 332 AM62PX_IOPAD(0x017c, PIN_INPUT, 0) /* (F19) RGMII2_RX_CTL */ 333 AM62PX_IOPAD(0x016c, PIN_INPUT, 0) /* (B19) RGMII2_TD0 */ 334 AM62PX_IOPAD(0x0170, PIN_INPUT, 0) /* (A21) RGMII2_TD1 */ 335 AM62PX_IOPAD(0x0174, PIN_INPUT, 0) /* (D17) RGMII2_TD2 */ 336 AM62PX_IOPAD(0x0178, PIN_INPUT, 0) /* (A19) RGMII2_TD3 */ 337 AM62PX_IOPAD(0x0168, PIN_INPUT, 0) /* (D16) RGMII2_TXC */ 338 AM62PX_IOPAD(0x0164, PIN_INPUT, 0) /* (A20) RGMII2_TX_CTL */ 339 >; 340 bootph-all; 341 }; 342 343 main_uart0_pins_default: main-uart0-default-pins { 344 pinctrl-single,pins = < 345 AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ 346 AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ 347 >; 348 bootph-all; 349 }; 350 351 main_uart1_pins_default: main-uart1-default-pins { 352 pinctrl-single,pins = < 353 AM62PX_IOPAD(0x0194, PIN_INPUT, 2) /* (D25) MCASP0_AXR3.UART1_CTSn */ 354 AM62PX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2.UART1_RTSn */ 355 AM62PX_IOPAD(0x01ac, PIN_INPUT, 2) /* (G23) MCASP0_AFSR.UART1_RXD */ 356 AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */ 357 >; 358 bootph-all; 359 }; 360 361 main_usb1_pins_default: main-usb1-default-pins { 362 pinctrl-single,pins = < 363 AM62PX_IOPAD(0x0258, PIN_INPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP, 0) /* (G21) USB1_DRVVBUS */ 364 >; 365 }; 366 367 main_wlirq_pins_default: main-wlirq-default-pins { 368 pinctrl-single,pins = < 369 AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */ 370 >; 371 }; 372 373 ospi0_pins_default: ospi0-default-pins { 374 pinctrl-single,pins = < 375 AM62PX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK */ 376 AM62PX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */ 377 AM62PX_IOPAD(0x000c, PIN_INPUT, 0) /* (L25) OSPI0_D0 */ 378 AM62PX_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) OSPI0_D1 */ 379 AM62PX_IOPAD(0x0014, PIN_INPUT, 0) /* (N25) OSPI0_D2 */ 380 AM62PX_IOPAD(0x0018, PIN_INPUT, 0) /* (M24) OSPI0_D3 */ 381 AM62PX_IOPAD(0x001c, PIN_INPUT, 0) /* (N21) OSPI0_D4 */ 382 AM62PX_IOPAD(0x0020, PIN_INPUT, 0) /* (N22) OSPI0_D5 */ 383 AM62PX_IOPAD(0x0024, PIN_INPUT, 0) /* (P21) OSPI0_D6 */ 384 AM62PX_IOPAD(0x0028, PIN_INPUT, 0) /* (N20) OSPI0_D7 */ 385 AM62PX_IOPAD(0x0008, PIN_INPUT, 0) /* (P22) OSPI0_DQS */ 386 >; 387 bootph-all; 388 }; 389 390 usr_led_pins_default: usr-led-default-pins { 391 pinctrl-single,pins = < 392 AM62PX_IOPAD(0x0244, PIN_INPUT, 7) /* (D24) MMC1_SDWP.GPIO1_49 */ 393 >; 394 }; 395 396 vddshv_sdio_pins_default: vddshvr-sdio-default-pins { 397 pinctrl-single,pins = < 398 AM62PX_IOPAD(0x007c, PIN_INPUT, 7) /* (Y25) GPMC0_CLK.GPIO0_31 */ 399 >; 400 bootph-all; 401 }; 402 403 wlan_en_pins_default: wlan-en-default-pins { 404 pinctrl-single,pins = < 405 AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */ 406 >; 407 }; 408 409 main_ecap1_pins_default: main-ecap1-default-pins { 410 pinctrl-single,pins = < 411 AM62PX_IOPAD(0x019c, PIN_OUTPUT, 2) /* (E24) MCASP0_AXR1.ECAP1_IN_APWM_OUT */ 412 >; 413 }; 414 415 main_ecap2_pins_default: main-ecap2-default-pins { 416 pinctrl-single,pins = < 417 AM62PX_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (F24) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */ 418 >; 419 }; 420 421 main_epwm0_pins_default: main-epwm0-default-pins { 422 pinctrl-single,pins = < 423 AM62PX_IOPAD(0x01b4, PIN_OUTPUT, 2) /* (D20) SPI0_CS0.EHRPWM0_A */ 424 AM62PX_IOPAD(0x01b8, PIN_OUTPUT, 2) /* (E20) SPI0_CS1.EHRPWM0_B */ 425 >; 426 }; 427 428 main_epwm1_pins_default: main-epwm1-default-pins { 429 pinctrl-single,pins = < 430 AM62PX_IOPAD(0x01bc, PIN_OUTPUT, 2) /* (B21) SPI0_CLK.EHRPWM1_A */ 431 AM62PX_IOPAD(0x01c0, PIN_OUTPUT, 2) /* (B20) SPI0_D0.EHRPWM1_B */ 432 >; 433 }; 434}; 435 436&main_i2c0 { 437 status = "okay"; 438 pinctrl-names = "default"; 439 pinctrl-0 = <&main_i2c0_pins_default>; 440 clock-frequency = <400000>; 441 442 typec_pd0: usb-power-controller@3f { 443 compatible = "ti,tps6598x"; 444 reg = <0x3f>; 445 446 connector { 447 compatible = "usb-c-connector"; 448 label = "USB-C"; 449 self-powered; 450 data-role = "dual"; 451 power-role = "sink"; 452 port { 453 usb_con_hs: endpoint { 454 remote-endpoint = <&usb0_hs_ep>; 455 }; 456 }; 457 }; 458 }; 459}; 460 461&main_i2c1 { 462 status = "okay"; 463 pinctrl-names = "default"; 464 pinctrl-0 = <&main_i2c1_pins_default>; 465 clock-frequency = <100000>; 466 bootph-all; 467 468 tlv320aic3106: audio-codec@1b { 469 #sound-dai-cells = <0>; 470 compatible = "ti,tlv320aic3106"; 471 reg = <0x1b>; 472 ai3x-micbias-vg = <1>; /* 2.0V */ 473 }; 474 475 exp1: gpio@22 { 476 compatible = "ti,tca6424"; 477 reg = <0x22>; 478 gpio-controller; 479 #gpio-cells = <2>; 480 gpio-line-names = "OLDI_INT#", "x8_NAND_DETECT", 481 "UART1_FET_SEL", "MMC1_SD_EN", 482 "VPP_EN", "EXP_PS_3V3_EN", 483 "UART1_FET_BUF_EN", "EXP_HAT_DETECT", 484 "DSI_GPIO0", "DSI_GPIO1", 485 "OLDI_EDID", "BT_UART_WAKE_SOC_3V3", 486 "USB_TYPEA_OC_INDICATION", "CSI_GPIO0", 487 "CSI_GPIO1", "WLAN_ALERTn", 488 "HDMI_INTn", "TEST_GPIO2", 489 "MCASP1_FET_EN", "MCASP1_BUF_BT_EN", 490 "MCASP1_FET_SEL", "DSI_EDID", 491 "PD_I2C_IRQ", "IO_EXP_TEST_LED"; 492 493 interrupt-parent = <&main_gpio1>; 494 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; 495 interrupt-controller; 496 #interrupt-cells = <2>; 497 498 pinctrl-names = "default"; 499 pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; 500 bootph-all; 501 }; 502 503 exp2: gpio@23 { 504 compatible = "ti,tca6424"; 505 reg = <0x23>; 506 gpio-controller; 507 #gpio-cells = <2>; 508 gpio-line-names = "BT_EN_SOC", "EXP_PS_5V0_EN", 509 "", "", 510 "", "", 511 "", "", 512 "WL_LT_EN", "", 513 "TP3", "TP6", 514 "TP4", "TP7", 515 "TP5", "TP8", 516 "SoC_I2C2_MCAN_SEL", "GPIO_HDMI_RSTn", 517 "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 518 "GPIO_OLDI_RSTn", "GPIO_AUD_RSTn", 519 "GPIO_eMMC_RSTn", "SoC_WLAN_SDIO_RST"; 520 }; 521}; 522 523&main_i2c2 { 524 status = "okay"; 525 pinctrl-names = "default"; 526 pinctrl-0 = <&main_i2c2_pins_default>; 527 clock-frequency = <400000>; 528}; 529 530&sdhci0 { 531 status = "okay"; 532 non-removable; 533 ti,driver-strength-ohm = <50>; 534 bootph-all; 535}; 536 537&sdhci1 { 538 /* SD/MMC */ 539 status = "okay"; 540 vmmc-supply = <&vdd_mmc1>; 541 vqmmc-supply = <&vddshv_sdio>; 542 pinctrl-names = "default"; 543 pinctrl-0 = <&main_mmc1_pins_default>; 544 disable-wp; 545 bootph-all; 546}; 547 548&cpsw3g { 549 pinctrl-names = "default"; 550 pinctrl-0 = <&main_rgmii1_pins_default>, 551 <&main_rgmii2_pins_default>; 552 status = "okay"; 553}; 554 555&cpsw_port1 { 556 phy-mode = "rgmii-rxid"; 557 phy-handle = <&cpsw3g_phy0>; 558 status = "okay"; 559 bootph-all; 560}; 561 562&cpsw_port2 { 563 phy-mode = "rgmii-rxid"; 564 phy-handle = <&cpsw3g_phy1>; 565 status = "okay"; 566}; 567 568&cpsw3g_mdio { 569 pinctrl-names = "default"; 570 pinctrl-0 = <&main_mdio1_pins_default>; 571 status = "okay"; 572 573 cpsw3g_phy0: ethernet-phy@0 { 574 reg = <0>; 575 bootph-all; 576 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 577 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 578 ti,min-output-impedance; 579 }; 580 581 cpsw3g_phy1: ethernet-phy@1 { 582 reg = <1>; 583 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 584 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 585 ti,min-output-impedance; 586 }; 587}; 588 589&usbss0 { 590 status = "okay"; 591 ti,vbus-divider; 592}; 593 594&usbss1 { 595 status = "okay"; 596 ti,vbus-divider; 597}; 598 599&usb0 { 600 bootph-all; 601 usb-role-switch; 602 603 port { 604 usb0_hs_ep: endpoint { 605 remote-endpoint = <&usb_con_hs>; 606 }; 607 }; 608}; 609 610&usb1 { 611 dr_mode = "host"; 612 pinctrl-names = "default"; 613 pinctrl-0 = <&main_usb1_pins_default>; 614}; 615 616&mcasp1 { 617 status = "okay"; 618 #sound-dai-cells = <0>; 619 620 pinctrl-names = "default"; 621 pinctrl-0 = <&main_mcasp1_pins_default>; 622 623 op-mode = <0>; /* MCASP_IIS_MODE */ 624 tdm-slots = <2>; 625 626 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 627 1 0 2 0 628 0 0 0 0 629 0 0 0 0 630 0 0 0 0 631 >; 632}; 633 634&fss { 635 bootph-all; 636}; 637 638&ospi0 { 639 status = "okay"; 640 pinctrl-names = "default"; 641 pinctrl-0 = <&ospi0_pins_default>; 642 bootph-all; 643 644 flash@0 { 645 compatible = "jedec,spi-nor"; 646 reg = <0x0>; 647 spi-tx-bus-width = <8>; 648 spi-rx-bus-width = <8>; 649 spi-max-frequency = <25000000>; 650 cdns,tshsl-ns = <60>; 651 cdns,tsd2d-ns = <60>; 652 cdns,tchsh-ns = <60>; 653 cdns,tslch-ns = <60>; 654 cdns,read-delay = <4>; 655 bootph-all; 656 657 partitions { 658 compatible = "fixed-partitions"; 659 #address-cells = <1>; 660 #size-cells = <1>; 661 bootph-all; 662 663 partition@0 { 664 label = "ospi.tiboot3"; 665 reg = <0x00 0x80000>; 666 }; 667 668 partition@80000 { 669 label = "ospi.tispl"; 670 reg = <0x80000 0x200000>; 671 }; 672 673 partition@280000 { 674 label = "ospi.u-boot"; 675 reg = <0x280000 0x400000>; 676 }; 677 678 partition@680000 { 679 label = "ospi.env"; 680 reg = <0x680000 0x40000>; 681 }; 682 683 partition@6c0000 { 684 label = "ospi.env.backup"; 685 reg = <0x6c0000 0x40000>; 686 }; 687 688 partition@800000 { 689 label = "ospi.rootfs"; 690 reg = <0x800000 0x37c0000>; 691 }; 692 693 partition@3fc0000 { 694 label = "ospi.phypattern"; 695 reg = <0x3fc0000 0x40000>; 696 bootph-all; 697 }; 698 }; 699 }; 700}; 701 702&mailbox0_cluster0 { 703 status = "okay"; 704 705 mbox_r5_0: mbox-r5-0 { 706 ti,mbox-rx = <0 0 0>; 707 ti,mbox-tx = <1 0 0>; 708 }; 709}; 710 711&mailbox0_cluster1 { 712 status = "okay"; 713 714 mbox_mcu_r5_0: mbox-mcu-r5-0 { 715 ti,mbox-rx = <0 0 0>; 716 ti,mbox-tx = <1 0 0>; 717 }; 718}; 719 720&wkup_r5fss0 { 721 status = "okay"; 722}; 723 724&wkup_r5fss0_core0 { 725 mboxes = <&mailbox0_cluster0 &mbox_r5_0>; 726 memory-region = <&wkup_r5fss0_core0_dma_memory_region>, 727 <&wkup_r5fss0_core0_memory_region>; 728}; 729 730&mcu_r5fss0 { 731 status = "okay"; 732}; 733 734&mcu_r5fss0_core0 { 735 mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>; 736 memory-region = <&mcu_r5fss0_core0_dma_memory_region>, 737 <&mcu_r5fss0_core0_memory_region>; 738}; 739 740&main_uart0 { 741 pinctrl-names = "default"; 742 pinctrl-0 = <&main_uart0_pins_default>; 743 status = "okay"; 744 bootph-all; 745}; 746 747&main_uart1 { 748 pinctrl-names = "default"; 749 pinctrl-0 = <&main_uart1_pins_default>; 750 /* Main UART1 is used by TIFS firmware */ 751 status = "reserved"; 752 bootph-all; 753}; 754 755&mcu_pmx0 { 756 bootph-all; 757 758 wkup_uart0_pins_default: wkup-uart0-default-pins { 759 pinctrl-single,pins = < 760 AM62PX_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (D8) WKUP_UART0_RXD */ 761 AM62PX_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (D7) WKUP_UART0_TXD */ 762 >; 763 bootph-all; 764 }; 765}; 766 767&wkup_uart0 { 768 /* WKUP UART0 is used by DM firmware */ 769 pinctrl-names = "default"; 770 pinctrl-0 = <&wkup_uart0_pins_default>; 771 status = "reserved"; 772 bootph-all; 773}; 774 775/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ 776&mcu_gpio0 { 777 status = "reserved"; 778}; 779 780&mcu_gpio_intr { 781 status = "reserved"; 782}; 783 784&ecap1 { 785 /* P36 of J4 */ 786 pinctrl-names = "default"; 787 pinctrl-0 = <&main_ecap1_pins_default>; 788 status = "okay"; 789}; 790 791&ecap2 { 792 /* P11 of J4 */ 793 pinctrl-names = "default"; 794 pinctrl-0 = <&main_ecap2_pins_default>; 795 status = "okay"; 796}; 797 798&epwm0 { 799 /* P24/P26 of J4 */ 800 pinctrl-names = "default"; 801 pinctrl-0 = <&main_epwm0_pins_default>; 802 status = "okay"; 803}; 804 805&epwm1 { 806 /* P23/P19 of J4 */ 807 pinctrl-names = "default"; 808 pinctrl-0 = <&main_epwm1_pins_default>; 809 status = "okay"; 810}; 811