1*833e5d42SEmmanuel Vadot /* SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) */ 2*833e5d42SEmmanuel Vadot /* 3*833e5d42SEmmanuel Vadot * Device Tree defines for Rockchip RK8xx PMICs 4*833e5d42SEmmanuel Vadot * 5*833e5d42SEmmanuel Vadot * Copyright 2025 Cherry Embedded Solutions GmbH 6*833e5d42SEmmanuel Vadot * 7*833e5d42SEmmanuel Vadot * Author: Quentin Schulz <quentin.schulz@cherry.de> 8*833e5d42SEmmanuel Vadot */ 9*833e5d42SEmmanuel Vadot 10*833e5d42SEmmanuel Vadot #ifndef _DT_MFD_ROCKCHIP_RK8XX_H 11*833e5d42SEmmanuel Vadot #define _DT_MFD_ROCKCHIP_RK8XX_H 12*833e5d42SEmmanuel Vadot 13*833e5d42SEmmanuel Vadot /* For use with rockchip,reset-mode property */ 14*833e5d42SEmmanuel Vadot #define RK806_RESTART 0 15*833e5d42SEmmanuel Vadot #define RK806_RESET 1 16*833e5d42SEmmanuel Vadot #define RK806_RESET_NOTIFY 2 17*833e5d42SEmmanuel Vadot 18*833e5d42SEmmanuel Vadot #endif 19