xref: /freebsd/sys/contrib/device-tree/src/arm64/freescale/imx943-evk.dts (revision 833e5d42ab135b0238e61c5b3c19b8619677cbfa)

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2024-2025 NXP
 */

/dts-v1/;

#include "imx943.dtsi"

/ {
	compatible = "fsl,imx943-evk", "fsl,imx94";
	model = "NXP i.MX943 EVK board";

	aliases {
		i2c2 = &lpi2c3;
		i2c3 = &lpi2c4;
		i2c5 = &lpi2c6;
		mmc0 = &usdhc1;
		mmc1 = &usdhc2;
		serial0 = &lpuart1;
	};

	bt_sco_codec: bt-sco-codec {
		compatible = "linux,bt-sco";
		#sound-dai-cells = <1>;
	};

	chosen {
		stdout-path = &lpuart1;
	};

	dmic: dmic {
		compatible = "dmic-codec";
		#sound-dai-cells = <0>;
	};

	reg_usdhc2_vmmc: regulator-usdhc2 {
		compatible = "regulator-fixed";
		off-on-delay-us = <12000>;
		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
		pinctrl-names = "default";
		regulator-max-microvolt = <3300000>;
		regulator-min-microvolt = <3300000>;
		regulator-name = "VDD_SD2_3V3";
		gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_audio_pwr: regulator-wm8962-pwr {
		compatible = "regulator-fixed";
		regulator-max-microvolt = <3300000>;
		regulator-min-microvolt = <3300000>;
		regulator-name = "audio-pwr";
		gpio = <&pcal6416_i2c3_u171 12 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reserved-memory {
		ranges;
		#address-cells = <2>;
		#size-cells = <2>;

		linux,cma {
			compatible = "shared-dma-pool";
			alloc-ranges = <0 0x80000000 0 0x7f000000>;
			reusable;
			size = <0 0x10000000>;
			linux,cma-default;
		};
	};

	sound-bt-sco {
		compatible = "simple-audio-card";
		simple-audio-card,bitclock-inversion;
		simple-audio-card,bitclock-master = <&btcpu>;
		simple-audio-card,format = "dsp_a";
		simple-audio-card,frame-master = <&btcpu>;
		simple-audio-card,name = "bt-sco-audio";

		simple-audio-card,codec {
			sound-dai = <&bt_sco_codec 1>;
		};

		btcpu: simple-audio-card,cpu {
			dai-tdm-slot-num = <2>;
			dai-tdm-slot-width = <16>;
			sound-dai = <&sai3>;
		};
	};

	sound-micfil {
		compatible = "fsl,imx-audio-card";
		model = "micfil-audio";

		pri-dai-link {
			format = "i2s";
			link-name = "micfil hifi";

			codec {
				sound-dai = <&dmic>;
			};

			cpu {
				sound-dai = <&micfil>;
			};
		};
	};

	sound-wm8962 {
		compatible = "fsl,imx-audio-wm8962";
		audio-codec = <&wm8962>;
		audio-cpu = <&sai1>;
		audio-routing = "Headphone Jack", "HPOUTL",
			"Headphone Jack", "HPOUTR",
			"Ext Spk", "SPKOUTL",
			"Ext Spk", "SPKOUTR",
			"AMIC", "MICBIAS",
			"IN3R", "AMIC",
			"IN1R", "AMIC";
		hp-det-gpio = <&pcal6416_i2c3_u48 14 GPIO_ACTIVE_HIGH>;
		model = "wm8962-audio";
	};

	memory@80000000 {
		reg = <0x0 0x80000000 0x0 0x80000000>;
		device_type = "memory";
	};
};

&lpi2c3 {
	clock-frequency = <400000>;
	pinctrl-0 = <&pinctrl_lpi2c3>;
	pinctrl-names = "default";
	status = "okay";

	pca9670_i2c3: gpio@23 {
		compatible = "nxp,pca9670";
		reg = <0x23>;
		#gpio-cells = <2>;
		gpio-controller;
	};

	pca9548_i2c3: i2c-mux@77 {
		compatible = "nxp,pca9548";
		reg = <0x77>;
		#address-cells = <1>;
		#size-cells = <0>;

		i2c@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c@2 {
			reg = <2>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c@3 {
			reg = <3>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c@4 {
			reg = <4>;
			#address-cells = <1>;
			#size-cells = <0>;

			wm8962: codec@1a {
				compatible = "wlf,wm8962";
				reg = <0x1a>;
				clocks = <&scmi_clk IMX94_CLK_SAI1>;
				AVDD-supply = <&reg_audio_pwr>;
				CPVDD-supply = <&reg_audio_pwr>;
				DBVDD-supply = <&reg_audio_pwr>;
				DCVDD-supply = <&reg_audio_pwr>;
				gpio-cfg = <
					0x0000 /* 0:Default */
					0x0000 /* 1:Default */
					0x0000 /* 2:FN_DMICCLK */
					0x0000 /* 3:Default */
					0x0000 /* 4:FN_DMICCDAT */
					0x0000 /* 5:Default */
				>;
				MICVDD-supply = <&reg_audio_pwr>;
				PLLVDD-supply = <&reg_audio_pwr>;
				SPKVDD1-supply = <&reg_audio_pwr>;
				SPKVDD2-supply = <&reg_audio_pwr>;
			};
		};

		i2c@5 {
			reg = <5>;
			#address-cells = <1>;
			#size-cells = <0>;

			pcal6416_i2c3_u46: gpio@20 {
				compatible = "nxp,pcal6416";
				reg = <0x20>;
				#gpio-cells = <2>;
				gpio-controller;

				sd-card-on-hog {
					gpios = <13 GPIO_ACTIVE_HIGH>;
					gpio-hog;
					output-high;
				};
			};

			pcal6416_i2c3_u171: gpio@21 {
				compatible = "nxp,pcal6416";
				reg = <0x21>;
				#gpio-cells = <2>;
				gpio-controller;

				audio-pwren-hog {
					gpios = <12 GPIO_ACTIVE_HIGH>;
					gpio-hog;
					output-high;
				};

				mqs-mic-sel-hog {
					gpios = <11 GPIO_ACTIVE_HIGH>;
					gpio-hog;
					output-low;
				};
			};
		};

		i2c@6 {
			reg = <6>;
			#address-cells = <1>;
			#size-cells = <0>;

			pcal6416_i2c3_u48: gpio@20 {
				compatible = "nxp,pcal6416";
				reg = <0x20>;
				#interrupt-cells = <2>;
				interrupt-controller;
				interrupt-parent = <&gpio3>;
				interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
				#gpio-cells = <2>;
				gpio-controller;
				pinctrl-0 = <&pinctrl_ioexpander_int>;
				pinctrl-names = "default";
			};
		};

		i2c@7 {
			reg = <7>;
			#address-cells = <1>;
			#size-cells = <0>;

			pcal6408_i2c3_u172: gpio@20 {
				compatible = "nxp,pcal6408";
				reg = <0x20>;
				#interrupt-cells = <2>;
				interrupt-controller;
				interrupt-parent = <&gpio3>;
				/* shared int pin with u48 */
				interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
				#gpio-cells = <2>;
				gpio-controller;
			};
		};
	};
};

&lpi2c4 {
	clock-frequency = <400000>;
	pinctrl-0 = <&pinctrl_lpi2c4>;
	pinctrl-names = "default";
	status = "okay";
};

&lpi2c6 {
	clock-frequency = <400000>;
	pinctrl-0 = <&pinctrl_lpi2c6>;
	pinctrl-names = "default";
	status = "okay";

	pca9544_i2c6: i2c-mux@77 {
		compatible = "nxp,pca9544";
		reg = <0x77>;
		#address-cells = <1>;
		#size-cells = <0>;

		i2c@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};

		i2c@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			pcal6416_i2c6_u50: gpio@21 {
				compatible = "nxp,pcal6416";
				reg = <0x21>;
				#gpio-cells = <2>;
				gpio-controller;
			};
		};

		i2c@2 {
			reg = <2>;
			#address-cells = <1>;
			#size-cells = <0>;

			pcal6408_i2c6_u170: gpio@20 {
				compatible = "nxp,pcal6408";
				reg = <0x20>;
				#interrupt-cells = <2>;
				interrupt-controller;
				interrupt-parent = <&gpio4>;
				interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
				#gpio-cells = <2>;
				gpio-controller;
				pinctrl-0 = <&pinctrl_ioexpander_int2>;
				pinctrl-names = "default";
			};
		};

		i2c@3 {
			reg = <3>;
			#address-cells = <1>;
			#size-cells = <0>;

			pcal6416_i2c6_u44: gpio@20 {
				compatible = "nxp,pcal6416";
				reg = <0x20>;
				#gpio-cells = <2>;
				gpio-controller;

				/* pdm selection */
				can-pdm-sel-hog {
					gpios = <12 GPIO_ACTIVE_HIGH>;
					gpio-hog;
					output-low;
				};

				sai3-sel-hog {
					gpios = <11 GPIO_ACTIVE_HIGH>;
					gpio-hog;
					output-high;
				};

				/* eMMC IOMUX selection */
				sd1-sel-hog {
					gpios = <0 GPIO_ACTIVE_HIGH>;
					gpio-hog;
					output-high;
				};

				/* SD card IOMUX selection */
				sd2-sel-hog {
					gpios = <1 GPIO_ACTIVE_HIGH>;
					gpio-hog;
					output-high;
				};
			};
		};
	};
};

&lpuart1 {
	pinctrl-0 = <&pinctrl_uart1>;
	pinctrl-names = "default";
	status = "okay";
};

&micfil {
	assigned-clocks = <&scmi_clk IMX94_CLK_AUDIOPLL1_VCO>,
			  <&scmi_clk IMX94_CLK_AUDIOPLL2_VCO>,
			  <&scmi_clk IMX94_CLK_AUDIOPLL1>,
			  <&scmi_clk IMX94_CLK_AUDIOPLL2>,
			  <&scmi_clk IMX94_CLK_PDM>;
	assigned-clock-parents = <0>, <0>, <0>, <0>,
				 <&scmi_clk IMX94_CLK_AUDIOPLL1>;
	assigned-clock-rates = <3932160000>,
			       <3612672000>, <393216000>,
			       <361267200>, <49152000>;
	pinctrl-0 = <&pinctrl_pdm>;
	pinctrl-names = "default";
	status = "okay";
};

&sai1 {
	assigned-clocks = <&scmi_clk IMX94_CLK_AUDIOPLL1_VCO>,
			  <&scmi_clk IMX94_CLK_AUDIOPLL2_VCO>,
			  <&scmi_clk IMX94_CLK_AUDIOPLL1>,
			  <&scmi_clk IMX94_CLK_AUDIOPLL2>,
			  <&scmi_clk IMX94_CLK_SAI1>;
	assigned-clock-parents = <0>, <0>, <0>, <0>,
				 <&scmi_clk IMX94_CLK_AUDIOPLL1>;
	assigned-clock-rates = <3932160000>,
			       <3612672000>, <393216000>,
			       <361267200>, <12288000>;
	pinctrl-0 = <&pinctrl_sai1>;
	pinctrl-names = "default";
	fsl,sai-mclk-direction-output;
	status = "okay";
};

&sai3 {
	assigned-clocks = <&scmi_clk IMX94_CLK_AUDIOPLL1_VCO>,
			  <&scmi_clk IMX94_CLK_AUDIOPLL2_VCO>,
			  <&scmi_clk IMX94_CLK_AUDIOPLL1>,
			  <&scmi_clk IMX94_CLK_AUDIOPLL2>,
			  <&scmi_clk IMX94_CLK_SAI3>;
	assigned-clock-parents = <0>, <0>, <0>, <0>,
				 <&scmi_clk IMX94_CLK_AUDIOPLL1>;
	assigned-clock-rates = <3932160000>,
			       <3612672000>, <393216000>,
			       <361267200>, <12288000>;
	pinctrl-0 = <&pinctrl_sai3>;
	pinctrl-names = "default";
	fsl,sai-mclk-direction-output;
	status = "okay";
};

&scmi_iomuxc {

	pinctrl_ioexpander_int2: ioexpanderint2grp {
		fsl,pins = <
			IMX94_PAD_CCM_CLKO4__GPIO4_IO3		0x31e
		>;
	};

	pinctrl_ioexpander_int: ioexpanderintgrp {
		fsl,pins = <
			IMX94_PAD_GPIO_IO45__GPIO3_IO13		0x31e
		>;
	};

	pinctrl_lpi2c3: lpi2c3grp {
		fsl,pins = <
			IMX94_PAD_GPIO_IO16__LPI2C3_SDA		0x40000b9e
			IMX94_PAD_GPIO_IO17__LPI2C3_SCL		0x40000b9e
		>;
	};

	pinctrl_lpi2c4: lpi2c4grp {
		fsl,pins = <
			IMX94_PAD_GPIO_IO18__LPI2C4_SDA		0x40000b9e
			IMX94_PAD_GPIO_IO19__LPI2C4_SCL		0x40000b9e
		>;
	};

	pinctrl_lpi2c6: lpi2c6grp {
		fsl,pins = <
			IMX94_PAD_GPIO_IO29__LPI2C6_SDA		0x40000b9e
			IMX94_PAD_GPIO_IO28__LPI2C6_SCL		0x40000b9e
		>;
	};

	pinctrl_pdm: pdmgrp {
		fsl,pins = <
			IMX94_PAD_PDM_CLK__PDM_CLK			0x31e
			IMX94_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM0	0x31e
			IMX94_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM1	0x31e
		>;
	};

	pinctrl_sai1: sai1grp {
		fsl,pins = <
			IMX94_PAD_SAI1_TXFS__SAI1_TX_SYNC	0x31e
			IMX94_PAD_SAI1_TXC__SAI1_TX_BCLK	0x31e
			IMX94_PAD_SAI1_TXD0__SAI1_TX_DATA0	0x31e
			IMX94_PAD_SAI1_RXD0__SAI1_RX_DATA0	0x31e
			IMX94_PAD_I2C2_SDA__SAI1_MCLK		0x31e
		>;
	};

	pinctrl_sai3: sai3grp {
		fsl,pins = <
			IMX94_PAD_GPIO_IO42__SAI3_TX_BCLK	0x31e
			IMX94_PAD_GPIO_IO56__SAI3_TX_SYNC	0x31e
			IMX94_PAD_GPIO_IO46__SAI3_RX_DATA0	0x31e
			IMX94_PAD_GPIO_IO47__SAI3_TX_DATA0	0x31e
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			IMX94_PAD_UART1_TXD__LPUART1_TX		0x31e
			IMX94_PAD_UART1_RXD__LPUART1_RX		0x31e
		>;
	};

	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
		fsl,pins = <
			IMX94_PAD_SD1_CLK__USDHC1_CLK		0x158e
			IMX94_PAD_SD1_CMD__USDHC1_CMD		0x138e
			IMX94_PAD_SD1_DATA0__USDHC1_DATA0	0x138e
			IMX94_PAD_SD1_DATA1__USDHC1_DATA1	0x138e
			IMX94_PAD_SD1_DATA2__USDHC1_DATA2	0x138e
			IMX94_PAD_SD1_DATA3__USDHC1_DATA3	0x138e
			IMX94_PAD_SD1_DATA4__USDHC1_DATA4	0x138e
			IMX94_PAD_SD1_DATA5__USDHC1_DATA5	0x138e
			IMX94_PAD_SD1_DATA6__USDHC1_DATA6	0x138e
			IMX94_PAD_SD1_DATA7__USDHC1_DATA7	0x138e
			IMX94_PAD_SD1_STROBE__USDHC1_STROBE	0x158e
		>;
	};

	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
		fsl,pins = <
			IMX94_PAD_SD1_CLK__USDHC1_CLK		0x15fe
			IMX94_PAD_SD1_CMD__USDHC1_CMD		0x13fe
			IMX94_PAD_SD1_DATA0__USDHC1_DATA0	0x13fe
			IMX94_PAD_SD1_DATA1__USDHC1_DATA1	0x13fe
			IMX94_PAD_SD1_DATA2__USDHC1_DATA2	0x13fe
			IMX94_PAD_SD1_DATA3__USDHC1_DATA3	0x13fe
			IMX94_PAD_SD1_DATA4__USDHC1_DATA4	0x13fe
			IMX94_PAD_SD1_DATA5__USDHC1_DATA5	0x13fe
			IMX94_PAD_SD1_DATA6__USDHC1_DATA6	0x13fe
			IMX94_PAD_SD1_DATA7__USDHC1_DATA7	0x13fe
			IMX94_PAD_SD1_STROBE__USDHC1_STROBE	0x15fe
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			IMX94_PAD_SD1_CLK__USDHC1_CLK		0x158e
			IMX94_PAD_SD1_CMD__USDHC1_CMD		0x138e
			IMX94_PAD_SD1_DATA0__USDHC1_DATA0	0x138e
			IMX94_PAD_SD1_DATA1__USDHC1_DATA1	0x138e
			IMX94_PAD_SD1_DATA2__USDHC1_DATA2	0x138e
			IMX94_PAD_SD1_DATA3__USDHC1_DATA3	0x138e
			IMX94_PAD_SD1_DATA4__USDHC1_DATA4	0x138e
			IMX94_PAD_SD1_DATA5__USDHC1_DATA5	0x138e
			IMX94_PAD_SD1_DATA6__USDHC1_DATA6	0x138e
			IMX94_PAD_SD1_DATA7__USDHC1_DATA7	0x138e
			IMX94_PAD_SD1_STROBE__USDHC1_STROBE	0x158e
		>;
	};

	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
		fsl,pins = <
			IMX94_PAD_SD2_CLK__USDHC2_CLK		0x158e
			IMX94_PAD_SD2_CMD__USDHC2_CMD		0x138e
			IMX94_PAD_SD2_DATA0__USDHC2_DATA0	0x138e
			IMX94_PAD_SD2_DATA1__USDHC2_DATA1	0x138e
			IMX94_PAD_SD2_DATA2__USDHC2_DATA2	0x138e
			IMX94_PAD_SD2_DATA3__USDHC2_DATA3	0x138e
			IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
		>;
	};

	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
		fsl,pins = <
			IMX94_PAD_SD2_CLK__USDHC2_CLK		0x15fe
			IMX94_PAD_SD2_CMD__USDHC2_CMD		0x13fe
			IMX94_PAD_SD2_DATA0__USDHC2_DATA0	0x13fe
			IMX94_PAD_SD2_DATA1__USDHC2_DATA1	0x13fe
			IMX94_PAD_SD2_DATA2__USDHC2_DATA2	0x13fe
			IMX94_PAD_SD2_DATA3__USDHC2_DATA3	0x13fe
			IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
		>;
	};

	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
		fsl,pins = <
			IMX94_PAD_SD2_CD_B__GPIO4_IO20		0x31e
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			IMX94_PAD_SD2_CLK__USDHC2_CLK		0x158e
			IMX94_PAD_SD2_CMD__USDHC2_CMD		0x138e
			IMX94_PAD_SD2_DATA0__USDHC2_DATA0	0x138e
			IMX94_PAD_SD2_DATA1__USDHC2_DATA1	0x138e
			IMX94_PAD_SD2_DATA2__USDHC2_DATA2	0x138e
			IMX94_PAD_SD2_DATA3__USDHC2_DATA3	0x138e
			IMX94_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
		>;
	};

	pinctrl_reg_usdhc2_vmmc: usdhc2regvmmcgrp {
		fsl,pins = <
			IMX94_PAD_SD2_RESET_B__GPIO4_IO27	0x31e
		>;
	};
};

&usdhc1 {
	pinctrl-0 = <&pinctrl_usdhc1>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	bus-width = <8>;
	non-removable;
	no-sdio;
	no-sd;
	status = "okay";
};

&usdhc2 {
	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	bus-width = <4>;
	no-mmc;
	no-sdio;
	cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_usdhc2_vmmc>;
	status = "okay";
};

&wdog3 {
	fsl,ext-reset-output;
	status = "okay";
};