1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2025 PHYTEC Messtechnik GmbH 4 * Author: Teresa Remmet <t.remmet@phytec.de> 5 */ 6 7/dts-v1/; 8/plugin/; 9 10#include <dt-bindings/clock/imx8mm-clock.h> 11#include <dt-bindings/gpio/gpio.h> 12#include "imx8mm-pinfunc.h" 13 14&{/} { 15 backlight: backlight { 16 compatible = "pwm-backlight"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&pinctrl_lcd>; 19 default-brightness-level = <6>; 20 pwms = <&pwm4 0 50000 0>; 21 power-supply = <®_vdd_3v3_s>; 22 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 23 brightness-levels= <0 4 8 16 32 64 128 255>; 24 }; 25 26 panel { 27 compatible = "edt,etml1010g3dra"; 28 backlight = <&backlight>; 29 power-supply = <®_vcc_3v3>; 30 31 port { 32 panel_in: endpoint { 33 remote-endpoint = <&bridge_out>; 34 }; 35 }; 36 }; 37 38 reg_sound_1v8: regulator-1v8 { 39 compatible = "regulator-fixed"; 40 regulator-name = "VCC_1V8_Audio"; 41 regulator-min-microvolt = <1800000>; 42 regulator-max-microvolt = <1800000>; 43 }; 44 45 reg_sound_3v3: regulator-3v3 { 46 compatible = "regulator-fixed"; 47 regulator-name = "VCC_3V3_Analog"; 48 regulator-min-microvolt = <3300000>; 49 regulator-max-microvolt = <3300000>; 50 }; 51 52 sound-peb-av-10 { 53 compatible = "simple-audio-card"; 54 simple-audio-card,name = "snd-peb-av-10"; 55 simple-audio-card,format = "i2s"; 56 simple-audio-card,bitclock-master = <&dailink_master>; 57 simple-audio-card,frame-master = <&dailink_master>; 58 simple-audio-card,mclk-fs = <32>; 59 simple-audio-card,widgets = 60 "Line", "Line In", 61 "Speaker", "Speaker", 62 "Microphone", "Microphone Jack", 63 "Headphone", "Headphone Jack"; 64 simple-audio-card,routing = 65 "Speaker", "SPOP", 66 "Speaker", "SPOM", 67 "Headphone Jack", "HPLOUT", 68 "Headphone Jack", "HPROUT", 69 "LINE1L", "Line In", 70 "LINE1R", "Line In", 71 "MIC3R", "Microphone Jack", 72 "Microphone Jack", "Mic Bias"; 73 74 simple-audio-card,cpu { 75 sound-dai = <&sai5>; 76 }; 77 78 dailink_master: simple-audio-card,codec { 79 sound-dai = <&codec>; 80 clocks = <&clk IMX8MM_CLK_SAI5>; 81 }; 82 }; 83}; 84 85&i2c3 { 86 clock-frequency = <400000>; 87 pinctrl-names = "default", "gpio"; 88 pinctrl-0 = <&pinctrl_i2c3>; 89 pinctrl-1 = <&pinctrl_i2c3_gpio>; 90 sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 91 scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 92 #address-cells = <1>; 93 #size-cells = <0>; 94 status = "okay"; 95 96 codec: codec@18 { 97 compatible = "ti,tlv320aic3007"; 98 pinctrl-names = "default"; 99 pinctrl-0 = <&pinctrl_tlv320>; 100 #sound-dai-cells = <0>; 101 reg = <0x18>; 102 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; 103 ai3x-gpio-func = <0xd 0x0>; 104 ai3x-micbias-vg = <2>; 105 AVDD-supply = <®_sound_3v3>; 106 IOVDD-supply = <®_sound_3v3>; 107 DRVDD-supply = <®_sound_3v3>; 108 DVDD-supply = <®_sound_1v8>; 109 }; 110 111 eeprom@57 { 112 compatible = "atmel,24c32"; 113 pagesize = <32>; 114 reg = <0x57>; 115 vcc-supply = <®_vdd_3v3_s>; 116 }; 117 118 eeprom@5f { 119 compatible = "atmel,24c32"; 120 pagesize = <32>; 121 reg = <0x5f>; 122 size = <32>; 123 vcc-supply = <®_vdd_3v3_s>; 124 }; 125}; 126 127&lcdif { 128 status = "okay"; 129}; 130 131&mipi_dsi { 132 samsung,esc-clock-frequency = <10000000>; 133 status = "okay"; 134 135 ports { 136 #address-cells = <1>; 137 #size-cells = <0>; 138 port@1 { 139 reg = <1>; 140 dsi_out: endpoint { 141 remote-endpoint = <&bridge_in>; 142 }; 143 }; 144 }; 145}; 146 147&pwm4 { 148 pinctrl-names = "default"; 149 pinctrl-0 = <&pinctrl_pwm4>; 150 status = "okay"; 151}; 152 153&sai5 { 154 assigned-clocks = <&clk IMX8MM_CLK_SAI5>; 155 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL2_OUT>; 156 assigned-clock-rates = <11289600>; 157 clocks = <&clk IMX8MM_CLK_SAI5_IPG>, <&clk IMX8MM_CLK_DUMMY>, 158 <&clk IMX8MM_CLK_SAI5_ROOT>, <&clk IMX8MM_CLK_DUMMY>, 159 <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>, 160 <&clk IMX8MM_AUDIO_PLL2_OUT>; 161 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", 162 "pll11k"; 163 fsl,sai-mclk-direction-output; 164 pinctrl-names = "default"; 165 pinctrl-0 = <&pinctrl_sai5>; 166 #sound-dai-cells = <0>; 167 status = "okay"; 168}; 169 170&sn65dsi83 { 171 status = "okay"; 172 173 ports { 174 #address-cells = <1>; 175 #size-cells = <0>; 176 177 port@0 { 178 reg = <0>; 179 bridge_in: endpoint { 180 remote-endpoint = <&dsi_out>; 181 data-lanes = <1 2 3 4>; 182 }; 183 }; 184 185 port@2 { 186 reg = <2>; 187 bridge_out: endpoint { 188 remote-endpoint = <&panel_in>; 189 ti,lvds-vod-swing-clock-microvolt = <200000 600000>; 190 ti,lvds-vod-swing-data-microvolt = <200000 600000>; 191 }; 192 }; 193 }; 194}; 195 196&iomuxc { 197 198 pinctrl_i2c3: i2c3grp { 199 fsl,pins = < 200 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c2 201 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c2 202 >; 203 }; 204 205 pinctrl_i2c3_gpio: i2c3gpiogrp { 206 fsl,pins = < 207 MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x1e2 208 MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x1e2 209 >; 210 }; 211 pinctrl_lcd: lcd0grp { 212 fsl,pins = < 213 MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x12 214 >; 215 }; 216 217 pinctrl_pwm4: pwm4grp { 218 fsl,pins = < 219 MX8MM_IOMUXC_SAI3_MCLK_PWM4_OUT 0x12 220 >; 221 }; 222 223 pinctrl_sai5: sai5grp { 224 fsl,pins = < 225 MX8MM_IOMUXC_SAI5_MCLK_SAI5_MCLK 0xd6 226 MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0xd6 227 MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0xd6 228 MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0xd6 229 MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0xd6 230 >; 231 }; 232 233 pinctrl_tlv320: tlv320grp { 234 fsl,pins = < 235 MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x16 236 MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16 237 >; 238 }; 239}; 240