1/* 2 * BSD LICENSE 3 * 4 * Copyright(c) 2015 Broadcom Corporation. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in 14 * the documentation and/or other materials provided with the 15 * distribution. 16 * * Neither the name of Broadcom Corporation nor the names of its 17 * contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33/dts-v1/; 34 35#include "ns2.dtsi" 36 37/ { 38 model = "Broadcom NS2 SVK"; 39 compatible = "brcm,ns2-svk", "brcm,ns2"; 40 41 aliases { 42 serial0 = &uart3; 43 serial1 = &uart0; 44 serial2 = &uart1; 45 serial3 = &uart2; 46 }; 47 48 chosen { 49 stdout-path = "serial0:115200n8"; 50 bootargs = "earlycon=uart8250,mmio32,0x66130000"; 51 }; 52 53 memory { 54 device_type = "memory"; 55 reg = <0x000000000 0x80000000 0x00000000 0x40000000>; 56 }; 57}; 58 59&enet { 60 status = "okay"; 61}; 62 63&pci_phy0 { 64 status = "okay"; 65}; 66 67&pci_phy1 { 68 status = "okay"; 69}; 70 71&pcie0 { 72 status = "okay"; 73}; 74 75&pcie4 { 76 status = "okay"; 77}; 78 79&pcie8 { 80 status = "okay"; 81}; 82 83&i2c0 { 84 status = "okay"; 85}; 86 87&i2c1 { 88 status = "okay"; 89}; 90 91&uart0 { 92 status = "okay"; 93}; 94 95&uart1 { 96 status = "okay"; 97}; 98 99&uart2 { 100 status = "okay"; 101}; 102 103&uart3 { 104 status = "okay"; 105}; 106 107&ssp0 { 108 status = "okay"; 109 110 slic@0 { 111 compatible = "silabs,si3226x"; 112 reg = <0>; 113 spi-max-frequency = <5000000>; 114 spi-cpha = <1>; 115 spi-cpol = <1>; 116 pl022,hierarchy = <0>; 117 pl022,interface = <0>; 118 pl022,slave-tx-disable = <0>; 119 pl022,com-mode = <0>; 120 pl022,rx-level-trig = <1>; 121 pl022,tx-level-trig = <1>; 122 pl022,ctrl-len = <11>; 123 pl022,wait-state = <0>; 124 pl022,duplex = <0>; 125 }; 126}; 127 128&ssp1 { 129 status = "okay"; 130 131 at25@0 { 132 compatible = "atmel,at25"; 133 reg = <0>; 134 spi-max-frequency = <5000000>; 135 at25,byte-len = <0x8000>; 136 at25,addr-mode = <2>; 137 at25,page-size = <64>; 138 spi-cpha = <1>; 139 spi-cpol = <1>; 140 pl022,hierarchy = <0>; 141 pl022,interface = <0>; 142 pl022,slave-tx-disable = <0>; 143 pl022,com-mode = <0>; 144 pl022,rx-level-trig = <1>; 145 pl022,tx-level-trig = <1>; 146 pl022,ctrl-len = <11>; 147 pl022,wait-state = <0>; 148 pl022,duplex = <0>; 149 }; 150}; 151 152&sata_phy0 { 153 status = "okay"; 154}; 155 156&sata_phy1 { 157 status = "okay"; 158}; 159 160&sata { 161 status = "okay"; 162}; 163 164&sdio0 { 165 status = "okay"; 166}; 167 168&sdio1 { 169 status = "okay"; 170}; 171 172&nand { 173 nandcs@0 { 174 compatible = "brcm,nandcs"; 175 reg = <0>; 176 nand-ecc-mode = "hw"; 177 nand-ecc-strength = <8>; 178 nand-ecc-step-size = <512>; 179 nand-bus-width = <16>; 180 brcm,nand-oob-sector-size = <16>; 181 #address-cells = <1>; 182 #size-cells = <1>; 183 }; 184}; 185 186&mdio_mux_iproc { 187 mdio@10 { 188 gphy0: eth-phy@10 { 189 enet-phy-lane-swap; 190 reg = <0x10>; 191 }; 192 }; 193}; 194 195&pinctrl { 196 pinctrl-names = "default"; 197 pinctrl-0 = <&nand_sel>; 198 nand_sel: nand_sel { 199 function = "nand"; 200 groups = "nand_grp"; 201 }; 202}; 203 204&qspi { 205 bspi-sel = <0>; 206 flash: m25p80@0 { 207 #address-cells = <1>; 208 #size-cells = <1>; 209 compatible = "m25p80"; 210 reg = <0x0>; 211 spi-max-frequency = <12500000>; 212 m25p,fast-read; 213 spi-cpol; 214 spi-cpha; 215 216 partition@0 { 217 label = "boot"; 218 reg = <0x00000000 0x000a0000>; 219 }; 220 221 partition@a0000 { 222 label = "env"; 223 reg = <0x000a0000 0x00060000>; 224 }; 225 226 partition@100000 { 227 label = "system"; 228 reg = <0x00100000 0x00600000>; 229 }; 230 231 partition@700000 { 232 label = "rootfs"; 233 reg = <0x00700000 0x01900000>; 234 }; 235 }; 236}; 237