1*8ccc0d23SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 2*8ccc0d23SEmmanuel Vadot/* 3*8ccc0d23SEmmanuel Vadot * Copyright (c) 2021-2024, Arm Limited. All rights reserved. 4*8ccc0d23SEmmanuel Vadot */ 5*8ccc0d23SEmmanuel Vadot 6*8ccc0d23SEmmanuel Vadot/dts-v1/; 7*8ccc0d23SEmmanuel Vadot#include "morello.dtsi" 8*8ccc0d23SEmmanuel Vadot 9*8ccc0d23SEmmanuel Vadot/ { 10*8ccc0d23SEmmanuel Vadot model = "Arm Morello Fixed Virtual Platform"; 11*8ccc0d23SEmmanuel Vadot compatible = "arm,morello-fvp", "arm,morello"; 12*8ccc0d23SEmmanuel Vadot 13*8ccc0d23SEmmanuel Vadot aliases { 14*8ccc0d23SEmmanuel Vadot serial0 = &uart0; 15*8ccc0d23SEmmanuel Vadot }; 16*8ccc0d23SEmmanuel Vadot 17*8ccc0d23SEmmanuel Vadot chosen { 18*8ccc0d23SEmmanuel Vadot stdout-path = "serial0:115200n8"; 19*8ccc0d23SEmmanuel Vadot }; 20*8ccc0d23SEmmanuel Vadot 21*8ccc0d23SEmmanuel Vadot bp_refclock24mhz: clock-24000000 { 22*8ccc0d23SEmmanuel Vadot compatible = "fixed-clock"; 23*8ccc0d23SEmmanuel Vadot #clock-cells = <0>; 24*8ccc0d23SEmmanuel Vadot clock-frequency = <24000000>; 25*8ccc0d23SEmmanuel Vadot clock-output-names = "bp:clock24mhz"; 26*8ccc0d23SEmmanuel Vadot }; 27*8ccc0d23SEmmanuel Vadot 28*8ccc0d23SEmmanuel Vadot block_0: virtio_block@1c170000 { 29*8ccc0d23SEmmanuel Vadot compatible = "virtio,mmio"; 30*8ccc0d23SEmmanuel Vadot reg = <0x0 0x1c170000 0x0 0x200>; 31*8ccc0d23SEmmanuel Vadot interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 32*8ccc0d23SEmmanuel Vadot }; 33*8ccc0d23SEmmanuel Vadot 34*8ccc0d23SEmmanuel Vadot net_0: virtio_net@1c180000 { 35*8ccc0d23SEmmanuel Vadot compatible = "virtio,mmio"; 36*8ccc0d23SEmmanuel Vadot reg = <0x0 0x1c180000 0x0 0x200>; 37*8ccc0d23SEmmanuel Vadot interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 38*8ccc0d23SEmmanuel Vadot }; 39*8ccc0d23SEmmanuel Vadot 40*8ccc0d23SEmmanuel Vadot rng_0: virtio_rng@1c190000 { 41*8ccc0d23SEmmanuel Vadot compatible = "virtio,mmio"; 42*8ccc0d23SEmmanuel Vadot reg = <0x0 0x1c190000 0x0 0x200>; 43*8ccc0d23SEmmanuel Vadot interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 44*8ccc0d23SEmmanuel Vadot }; 45*8ccc0d23SEmmanuel Vadot 46*8ccc0d23SEmmanuel Vadot p9_0: virtio_p9@1c1a0000 { 47*8ccc0d23SEmmanuel Vadot compatible = "virtio,mmio"; 48*8ccc0d23SEmmanuel Vadot reg = <0x0 0x1c1a0000 0x0 0x200>; 49*8ccc0d23SEmmanuel Vadot interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 50*8ccc0d23SEmmanuel Vadot }; 51*8ccc0d23SEmmanuel Vadot 52*8ccc0d23SEmmanuel Vadot kmi_0: kmi@1c150000 { 53*8ccc0d23SEmmanuel Vadot compatible = "arm,pl050", "arm,primecell"; 54*8ccc0d23SEmmanuel Vadot reg = <0x0 0x1c150000 0x0 0x1000>; 55*8ccc0d23SEmmanuel Vadot interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; 56*8ccc0d23SEmmanuel Vadot clocks = <&bp_refclock24mhz>, <&bp_refclock24mhz>; 57*8ccc0d23SEmmanuel Vadot clock-names = "KMIREFCLK", "apb_pclk"; 58*8ccc0d23SEmmanuel Vadot }; 59*8ccc0d23SEmmanuel Vadot 60*8ccc0d23SEmmanuel Vadot kmi_1: kmi@1c160000 { 61*8ccc0d23SEmmanuel Vadot compatible = "arm,pl050", "arm,primecell"; 62*8ccc0d23SEmmanuel Vadot reg = <0x0 0x1c160000 0x0 0x1000>; 63*8ccc0d23SEmmanuel Vadot interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 64*8ccc0d23SEmmanuel Vadot clocks = <&bp_refclock24mhz>, <&bp_refclock24mhz>; 65*8ccc0d23SEmmanuel Vadot clock-names = "KMIREFCLK", "apb_pclk"; 66*8ccc0d23SEmmanuel Vadot }; 67*8ccc0d23SEmmanuel Vadot 68*8ccc0d23SEmmanuel Vadot eth_0: ethernet@1d100000 { 69*8ccc0d23SEmmanuel Vadot compatible = "smsc,lan91c111"; 70*8ccc0d23SEmmanuel Vadot reg = <0x0 0x1d100000 0x0 0x10000>; 71*8ccc0d23SEmmanuel Vadot interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 72*8ccc0d23SEmmanuel Vadot }; 73*8ccc0d23SEmmanuel Vadot}; 74*8ccc0d23SEmmanuel Vadot 75*8ccc0d23SEmmanuel Vadot&uart0 { 76*8ccc0d23SEmmanuel Vadot status = "okay"; 77*8ccc0d23SEmmanuel Vadot}; 78