15f62a964SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0+ OR MIT 25f62a964SEmmanuel Vadot/* 35f62a964SEmmanuel Vadot * Apple S8003 "A9" (TSMC) SoC 45f62a964SEmmanuel Vadot * 55f62a964SEmmanuel Vadot * Other names: H8P, "Malta" 65f62a964SEmmanuel Vadot * 7*8ccc0d23SEmmanuel Vadot * Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com> 85f62a964SEmmanuel Vadot */ 95f62a964SEmmanuel Vadot 10*8ccc0d23SEmmanuel Vadot#include "s800-0-3.dtsi" 11*8ccc0d23SEmmanuel Vadot 12*8ccc0d23SEmmanuel Vadot/ { 13*8ccc0d23SEmmanuel Vadot twister_opp: opp-table { 14*8ccc0d23SEmmanuel Vadot compatible = "operating-points-v2"; 15*8ccc0d23SEmmanuel Vadot 16*8ccc0d23SEmmanuel Vadot opp01 { 17*8ccc0d23SEmmanuel Vadot opp-hz = /bits/ 64 <300000000>; 18*8ccc0d23SEmmanuel Vadot opp-level = <1>; 19*8ccc0d23SEmmanuel Vadot clock-latency-ns = <500>; 20*8ccc0d23SEmmanuel Vadot }; 21*8ccc0d23SEmmanuel Vadot opp02 { 22*8ccc0d23SEmmanuel Vadot opp-hz = /bits/ 64 <396000000>; 23*8ccc0d23SEmmanuel Vadot opp-level = <2>; 24*8ccc0d23SEmmanuel Vadot clock-latency-ns = <45000>; 25*8ccc0d23SEmmanuel Vadot }; 26*8ccc0d23SEmmanuel Vadot opp03 { 27*8ccc0d23SEmmanuel Vadot opp-hz = /bits/ 64 <600000000>; 28*8ccc0d23SEmmanuel Vadot opp-level = <3>; 29*8ccc0d23SEmmanuel Vadot clock-latency-ns = <22000>; 30*8ccc0d23SEmmanuel Vadot }; 31*8ccc0d23SEmmanuel Vadot opp04 { 32*8ccc0d23SEmmanuel Vadot opp-hz = /bits/ 64 <912000000>; 33*8ccc0d23SEmmanuel Vadot opp-level = <4>; 34*8ccc0d23SEmmanuel Vadot clock-latency-ns = <25000>; 35*8ccc0d23SEmmanuel Vadot }; 36*8ccc0d23SEmmanuel Vadot opp05 { 37*8ccc0d23SEmmanuel Vadot opp-hz = /bits/ 64 <1200000000>; 38*8ccc0d23SEmmanuel Vadot opp-level = <5>; 39*8ccc0d23SEmmanuel Vadot clock-latency-ns = <28000>; 40*8ccc0d23SEmmanuel Vadot }; 41*8ccc0d23SEmmanuel Vadot opp06 { 42*8ccc0d23SEmmanuel Vadot opp-hz = /bits/ 64 <1512000000>; 43*8ccc0d23SEmmanuel Vadot opp-level = <6>; 44*8ccc0d23SEmmanuel Vadot clock-latency-ns = <35000>; 45*8ccc0d23SEmmanuel Vadot }; 46*8ccc0d23SEmmanuel Vadot opp07 { 47*8ccc0d23SEmmanuel Vadot opp-hz = /bits/ 64 <1800000000>; 48*8ccc0d23SEmmanuel Vadot opp-level = <7>; 49*8ccc0d23SEmmanuel Vadot clock-latency-ns = <38000>; 50*8ccc0d23SEmmanuel Vadot }; 51*8ccc0d23SEmmanuel Vadot#if 0 52*8ccc0d23SEmmanuel Vadot /* Not available until CPU deep sleep is implemented */ 53*8ccc0d23SEmmanuel Vadot opp08 { 54*8ccc0d23SEmmanuel Vadot opp-hz = /bits/ 64 <1844000000>; 55*8ccc0d23SEmmanuel Vadot opp-level = <8>; 56*8ccc0d23SEmmanuel Vadot clock-latency-ns = <38000>; 57*8ccc0d23SEmmanuel Vadot turbo-mode; 58*8ccc0d23SEmmanuel Vadot }; 59*8ccc0d23SEmmanuel Vadot#endif 60*8ccc0d23SEmmanuel Vadot }; 61*8ccc0d23SEmmanuel Vadot}; 625f62a964SEmmanuel Vadot 635f62a964SEmmanuel Vadot/* 645f62a964SEmmanuel Vadot * The A9 was made by two separate fabs on two different process 655f62a964SEmmanuel Vadot * nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made 66*8ccc0d23SEmmanuel Vadot * the S8003 (APL1022) on 16nm. There are some minor differences 67*8ccc0d23SEmmanuel Vadot * such as timing in cpufreq state transistions. 685f62a964SEmmanuel Vadot */ 69