xref: /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/imx7d-zii-rmu2.dts (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*f126890aSEmmanuel Vadot/*
3*f126890aSEmmanuel Vadot * Device tree file for ZII's RMU2 board
4*f126890aSEmmanuel Vadot *
5*f126890aSEmmanuel Vadot * RMU - Remote Modem Unit
6*f126890aSEmmanuel Vadot *
7*f126890aSEmmanuel Vadot * Copyright (C) 2019 Zodiac Inflight Innovations
8*f126890aSEmmanuel Vadot */
9*f126890aSEmmanuel Vadot
10*f126890aSEmmanuel Vadot/dts-v1/;
11*f126890aSEmmanuel Vadot#include <dt-bindings/thermal/thermal.h>
12*f126890aSEmmanuel Vadot#include "imx7d.dtsi"
13*f126890aSEmmanuel Vadot
14*f126890aSEmmanuel Vadot/ {
15*f126890aSEmmanuel Vadot	model = "ZII RMU2 Board";
16*f126890aSEmmanuel Vadot	compatible = "zii,imx7d-rmu2", "fsl,imx7d";
17*f126890aSEmmanuel Vadot
18*f126890aSEmmanuel Vadot	chosen {
19*f126890aSEmmanuel Vadot		stdout-path = &uart2;
20*f126890aSEmmanuel Vadot	};
21*f126890aSEmmanuel Vadot
22*f126890aSEmmanuel Vadot	gpio-leds {
23*f126890aSEmmanuel Vadot		compatible = "gpio-leds";
24*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_leds_debug>;
25*f126890aSEmmanuel Vadot		pinctrl-names = "default";
26*f126890aSEmmanuel Vadot
27*f126890aSEmmanuel Vadot		led-debug {
28*f126890aSEmmanuel Vadot			label = "zii:green:debug1";
29*f126890aSEmmanuel Vadot			gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
30*f126890aSEmmanuel Vadot			linux,default-trigger = "heartbeat";
31*f126890aSEmmanuel Vadot		};
32*f126890aSEmmanuel Vadot	};
33*f126890aSEmmanuel Vadot};
34*f126890aSEmmanuel Vadot
35*f126890aSEmmanuel Vadot&cpu0 {
36*f126890aSEmmanuel Vadot	cpu-supply = <&sw1a_reg>;
37*f126890aSEmmanuel Vadot};
38*f126890aSEmmanuel Vadot
39*f126890aSEmmanuel Vadot&ecspi1 {
40*f126890aSEmmanuel Vadot	pinctrl-names = "default";
41*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_ecspi1>;
42*f126890aSEmmanuel Vadot	cs-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
43*f126890aSEmmanuel Vadot	status = "okay";
44*f126890aSEmmanuel Vadot
45*f126890aSEmmanuel Vadot	flash@0 {
46*f126890aSEmmanuel Vadot		compatible = "jedec,spi-nor";
47*f126890aSEmmanuel Vadot		spi-max-frequency = <20000000>;
48*f126890aSEmmanuel Vadot		reg = <0>;
49*f126890aSEmmanuel Vadot		#address-cells = <1>;
50*f126890aSEmmanuel Vadot		#size-cells = <1>;
51*f126890aSEmmanuel Vadot	};
52*f126890aSEmmanuel Vadot};
53*f126890aSEmmanuel Vadot
54*f126890aSEmmanuel Vadot&fec1 {
55*f126890aSEmmanuel Vadot	pinctrl-names = "default";
56*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_enet1>;
57*f126890aSEmmanuel Vadot	assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
58*f126890aSEmmanuel Vadot			  <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
59*f126890aSEmmanuel Vadot	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
60*f126890aSEmmanuel Vadot	assigned-clock-rates = <0>, <100000000>;
61*f126890aSEmmanuel Vadot	phy-mode = "rgmii-id";
62*f126890aSEmmanuel Vadot	phy-handle = <&fec1_phy>;
63*f126890aSEmmanuel Vadot	status = "okay";
64*f126890aSEmmanuel Vadot
65*f126890aSEmmanuel Vadot	mdio {
66*f126890aSEmmanuel Vadot		#address-cells = <1>;
67*f126890aSEmmanuel Vadot		#size-cells = <0>;
68*f126890aSEmmanuel Vadot
69*f126890aSEmmanuel Vadot		fec1_phy: ethernet-phy@0 {
70*f126890aSEmmanuel Vadot			pinctrl-names = "default";
71*f126890aSEmmanuel Vadot			pinctrl-0 = <&pinctrl_enet1_phy_reset>,
72*f126890aSEmmanuel Vadot				    <&pinctrl_enet1_phy_interrupt>;
73*f126890aSEmmanuel Vadot			reg = <0>;
74*f126890aSEmmanuel Vadot			interrupt-parent = <&gpio1>;
75*f126890aSEmmanuel Vadot			interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
76*f126890aSEmmanuel Vadot			reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
77*f126890aSEmmanuel Vadot		};
78*f126890aSEmmanuel Vadot	};
79*f126890aSEmmanuel Vadot};
80*f126890aSEmmanuel Vadot
81*f126890aSEmmanuel Vadot&i2c1 {
82*f126890aSEmmanuel Vadot	clock-frequency = <100000>;
83*f126890aSEmmanuel Vadot	pinctrl-names = "default";
84*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c1>;
85*f126890aSEmmanuel Vadot	status = "okay";
86*f126890aSEmmanuel Vadot
87*f126890aSEmmanuel Vadot	pmic@8 {
88*f126890aSEmmanuel Vadot		compatible = "fsl,pfuze3000";
89*f126890aSEmmanuel Vadot		reg = <0x08>;
90*f126890aSEmmanuel Vadot
91*f126890aSEmmanuel Vadot		regulators {
92*f126890aSEmmanuel Vadot			sw1a_reg: sw1a {
93*f126890aSEmmanuel Vadot				regulator-min-microvolt = <700000>;
94*f126890aSEmmanuel Vadot				regulator-max-microvolt = <3300000>;
95*f126890aSEmmanuel Vadot				regulator-boot-on;
96*f126890aSEmmanuel Vadot				regulator-always-on;
97*f126890aSEmmanuel Vadot				regulator-ramp-delay = <6250>;
98*f126890aSEmmanuel Vadot			};
99*f126890aSEmmanuel Vadot
100*f126890aSEmmanuel Vadot			sw1c_reg: sw1b {
101*f126890aSEmmanuel Vadot				regulator-min-microvolt = <700000>;
102*f126890aSEmmanuel Vadot				regulator-max-microvolt = <1475000>;
103*f126890aSEmmanuel Vadot				regulator-boot-on;
104*f126890aSEmmanuel Vadot				regulator-always-on;
105*f126890aSEmmanuel Vadot				regulator-ramp-delay = <6250>;
106*f126890aSEmmanuel Vadot			};
107*f126890aSEmmanuel Vadot
108*f126890aSEmmanuel Vadot			sw2_reg: sw2 {
109*f126890aSEmmanuel Vadot				regulator-min-microvolt = <1500000>;
110*f126890aSEmmanuel Vadot				regulator-max-microvolt = <1850000>;
111*f126890aSEmmanuel Vadot				regulator-boot-on;
112*f126890aSEmmanuel Vadot				regulator-always-on;
113*f126890aSEmmanuel Vadot			};
114*f126890aSEmmanuel Vadot
115*f126890aSEmmanuel Vadot			sw3a_reg: sw3 {
116*f126890aSEmmanuel Vadot				regulator-min-microvolt = <900000>;
117*f126890aSEmmanuel Vadot				regulator-max-microvolt = <1650000>;
118*f126890aSEmmanuel Vadot				regulator-boot-on;
119*f126890aSEmmanuel Vadot				regulator-always-on;
120*f126890aSEmmanuel Vadot			};
121*f126890aSEmmanuel Vadot
122*f126890aSEmmanuel Vadot			swbst_reg: swbst {
123*f126890aSEmmanuel Vadot				regulator-min-microvolt = <5000000>;
124*f126890aSEmmanuel Vadot				regulator-max-microvolt = <5150000>;
125*f126890aSEmmanuel Vadot			};
126*f126890aSEmmanuel Vadot
127*f126890aSEmmanuel Vadot			snvs_reg: vsnvs {
128*f126890aSEmmanuel Vadot				regulator-min-microvolt = <1000000>;
129*f126890aSEmmanuel Vadot				regulator-max-microvolt = <3000000>;
130*f126890aSEmmanuel Vadot				regulator-boot-on;
131*f126890aSEmmanuel Vadot				regulator-always-on;
132*f126890aSEmmanuel Vadot			};
133*f126890aSEmmanuel Vadot
134*f126890aSEmmanuel Vadot			vref_reg: vrefddr {
135*f126890aSEmmanuel Vadot				regulator-boot-on;
136*f126890aSEmmanuel Vadot				regulator-always-on;
137*f126890aSEmmanuel Vadot			};
138*f126890aSEmmanuel Vadot
139*f126890aSEmmanuel Vadot			vgen1_reg: vldo1 {
140*f126890aSEmmanuel Vadot				regulator-min-microvolt = <1800000>;
141*f126890aSEmmanuel Vadot				regulator-max-microvolt = <3300000>;
142*f126890aSEmmanuel Vadot				regulator-always-on;
143*f126890aSEmmanuel Vadot			};
144*f126890aSEmmanuel Vadot
145*f126890aSEmmanuel Vadot			vgen2_reg: vldo2 {
146*f126890aSEmmanuel Vadot				regulator-min-microvolt = <800000>;
147*f126890aSEmmanuel Vadot				regulator-max-microvolt = <1550000>;
148*f126890aSEmmanuel Vadot				regulator-always-on;
149*f126890aSEmmanuel Vadot			};
150*f126890aSEmmanuel Vadot
151*f126890aSEmmanuel Vadot			vgen3_reg: vccsd {
152*f126890aSEmmanuel Vadot				regulator-min-microvolt = <2850000>;
153*f126890aSEmmanuel Vadot				regulator-max-microvolt = <3300000>;
154*f126890aSEmmanuel Vadot				regulator-always-on;
155*f126890aSEmmanuel Vadot			};
156*f126890aSEmmanuel Vadot
157*f126890aSEmmanuel Vadot			vgen4_reg: v33 {
158*f126890aSEmmanuel Vadot				regulator-min-microvolt = <2850000>;
159*f126890aSEmmanuel Vadot				regulator-max-microvolt = <3300000>;
160*f126890aSEmmanuel Vadot				regulator-always-on;
161*f126890aSEmmanuel Vadot			};
162*f126890aSEmmanuel Vadot
163*f126890aSEmmanuel Vadot			vgen5_reg: vldo3 {
164*f126890aSEmmanuel Vadot				regulator-min-microvolt = <1800000>;
165*f126890aSEmmanuel Vadot				regulator-max-microvolt = <3300000>;
166*f126890aSEmmanuel Vadot				regulator-always-on;
167*f126890aSEmmanuel Vadot			};
168*f126890aSEmmanuel Vadot
169*f126890aSEmmanuel Vadot			vgen6_reg: vldo4 {
170*f126890aSEmmanuel Vadot				regulator-min-microvolt = <1800000>;
171*f126890aSEmmanuel Vadot				regulator-max-microvolt = <3300000>;
172*f126890aSEmmanuel Vadot				regulator-always-on;
173*f126890aSEmmanuel Vadot			};
174*f126890aSEmmanuel Vadot		};
175*f126890aSEmmanuel Vadot	};
176*f126890aSEmmanuel Vadot
177*f126890aSEmmanuel Vadot	eeprom@50 {
178*f126890aSEmmanuel Vadot		compatible = "atmel,24c04";
179*f126890aSEmmanuel Vadot		reg = <0x50>;
180*f126890aSEmmanuel Vadot	};
181*f126890aSEmmanuel Vadot
182*f126890aSEmmanuel Vadot	eeprom@52 {
183*f126890aSEmmanuel Vadot		compatible = "atmel,24c04";
184*f126890aSEmmanuel Vadot		reg = <0x52>;
185*f126890aSEmmanuel Vadot	};
186*f126890aSEmmanuel Vadot};
187*f126890aSEmmanuel Vadot
188*f126890aSEmmanuel Vadot&snvs_rtc {
189*f126890aSEmmanuel Vadot	status = "disabled";
190*f126890aSEmmanuel Vadot};
191*f126890aSEmmanuel Vadot
192*f126890aSEmmanuel Vadot&uart2 {
193*f126890aSEmmanuel Vadot	pinctrl-names = "default";
194*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart2>;
195*f126890aSEmmanuel Vadot	assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
196*f126890aSEmmanuel Vadot	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
197*f126890aSEmmanuel Vadot	status = "okay";
198*f126890aSEmmanuel Vadot};
199*f126890aSEmmanuel Vadot
200*f126890aSEmmanuel Vadot&uart4 {
201*f126890aSEmmanuel Vadot	pinctrl-names = "default";
202*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart4>;
203*f126890aSEmmanuel Vadot	assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
204*f126890aSEmmanuel Vadot	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
205*f126890aSEmmanuel Vadot	status = "okay";
206*f126890aSEmmanuel Vadot
207*f126890aSEmmanuel Vadot	mcu {
208*f126890aSEmmanuel Vadot		compatible = "zii,rave-sp-rdu2";
209*f126890aSEmmanuel Vadot		current-speed = <1000000>;
210*f126890aSEmmanuel Vadot		#address-cells = <1>;
211*f126890aSEmmanuel Vadot		#size-cells = <1>;
212*f126890aSEmmanuel Vadot
213*f126890aSEmmanuel Vadot		watchdog {
214*f126890aSEmmanuel Vadot			compatible = "zii,rave-sp-watchdog";
215*f126890aSEmmanuel Vadot		};
216*f126890aSEmmanuel Vadot
217*f126890aSEmmanuel Vadot		eeprom@a3 {
218*f126890aSEmmanuel Vadot			compatible = "zii,rave-sp-eeprom";
219*f126890aSEmmanuel Vadot			reg = <0xa3 0x4000>;
220*f126890aSEmmanuel Vadot			#address-cells = <1>;
221*f126890aSEmmanuel Vadot			#size-cells = <1>;
222*f126890aSEmmanuel Vadot			zii,eeprom-name = "main-eeprom";
223*f126890aSEmmanuel Vadot		};
224*f126890aSEmmanuel Vadot	};
225*f126890aSEmmanuel Vadot};
226*f126890aSEmmanuel Vadot
227*f126890aSEmmanuel Vadot&usbotg2 {
228*f126890aSEmmanuel Vadot	dr_mode = "host";
229*f126890aSEmmanuel Vadot	disable-over-current;
230*f126890aSEmmanuel Vadot	status = "okay";
231*f126890aSEmmanuel Vadot};
232*f126890aSEmmanuel Vadot
233*f126890aSEmmanuel Vadot&usdhc1 {
234*f126890aSEmmanuel Vadot	pinctrl-names = "default";
235*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc1>;
236*f126890aSEmmanuel Vadot	bus-width = <4>;
237*f126890aSEmmanuel Vadot	no-1-8-v;
238*f126890aSEmmanuel Vadot	no-sdio;
239*f126890aSEmmanuel Vadot	keep-power-in-suspend;
240*f126890aSEmmanuel Vadot	status = "okay";
241*f126890aSEmmanuel Vadot};
242*f126890aSEmmanuel Vadot
243*f126890aSEmmanuel Vadot&usdhc3 {
244*f126890aSEmmanuel Vadot	pinctrl-names = "default";
245*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc3>;
246*f126890aSEmmanuel Vadot	bus-width = <8>;
247*f126890aSEmmanuel Vadot	no-1-8-v;
248*f126890aSEmmanuel Vadot	non-removable;
249*f126890aSEmmanuel Vadot	no-sdio;
250*f126890aSEmmanuel Vadot	no-sd;
251*f126890aSEmmanuel Vadot	keep-power-in-suspend;
252*f126890aSEmmanuel Vadot	status = "okay";
253*f126890aSEmmanuel Vadot};
254*f126890aSEmmanuel Vadot
255*f126890aSEmmanuel Vadot&wdog1 {
256*f126890aSEmmanuel Vadot	status = "disabled";
257*f126890aSEmmanuel Vadot};
258*f126890aSEmmanuel Vadot
259*f126890aSEmmanuel Vadot&iomuxc {
260*f126890aSEmmanuel Vadot	pinctrl_ecspi1: ecspi1grp {
261*f126890aSEmmanuel Vadot		fsl,pins = <
262*f126890aSEmmanuel Vadot			MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK	0x2
263*f126890aSEmmanuel Vadot			MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI	0x2
264*f126890aSEmmanuel Vadot			MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO	0x2
265*f126890aSEmmanuel Vadot			MX7D_PAD_ECSPI1_SS0__GPIO4_IO19         0x59
266*f126890aSEmmanuel Vadot		>;
267*f126890aSEmmanuel Vadot	};
268*f126890aSEmmanuel Vadot
269*f126890aSEmmanuel Vadot	pinctrl_enet1: enet1grp {
270*f126890aSEmmanuel Vadot		fsl,pins = <
271*f126890aSEmmanuel Vadot			MX7D_PAD_SD2_CD_B__ENET1_MDIO				0x3
272*f126890aSEmmanuel Vadot			MX7D_PAD_SD2_WP__ENET1_MDC				0x3
273*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC		0x1
274*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0		0x1
275*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1		0x1
276*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2		0x1
277*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3		0x1
278*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL		0x1
279*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC		0x1
280*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0		0x1
281*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1		0x1
282*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2		0x1
283*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3		0x1
284*f126890aSEmmanuel Vadot			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL		0x1
285*f126890aSEmmanuel Vadot		>;
286*f126890aSEmmanuel Vadot	};
287*f126890aSEmmanuel Vadot
288*f126890aSEmmanuel Vadot	pinctrl_enet1_phy_reset: enet1phyresetgrp {
289*f126890aSEmmanuel Vadot		fsl,pins = <
290*f126890aSEmmanuel Vadot			MX7D_PAD_SD2_RESET_B__GPIO5_IO11	0x14
291*f126890aSEmmanuel Vadot
292*f126890aSEmmanuel Vadot		>;
293*f126890aSEmmanuel Vadot	};
294*f126890aSEmmanuel Vadot
295*f126890aSEmmanuel Vadot	pinctrl_i2c1: i2c1grp {
296*f126890aSEmmanuel Vadot		fsl,pins = <
297*f126890aSEmmanuel Vadot			MX7D_PAD_I2C1_SDA__I2C1_SDA		0x4000007f
298*f126890aSEmmanuel Vadot			MX7D_PAD_I2C1_SCL__I2C1_SCL		0x4000007f
299*f126890aSEmmanuel Vadot		>;
300*f126890aSEmmanuel Vadot	};
301*f126890aSEmmanuel Vadot
302*f126890aSEmmanuel Vadot	pinctrl_leds_debug: ledsgrp {
303*f126890aSEmmanuel Vadot		fsl,pins = <
304*f126890aSEmmanuel Vadot			MX7D_PAD_EPDC_DATA08__GPIO2_IO8		0x59
305*f126890aSEmmanuel Vadot		>;
306*f126890aSEmmanuel Vadot	};
307*f126890aSEmmanuel Vadot
308*f126890aSEmmanuel Vadot
309*f126890aSEmmanuel Vadot	pinctrl_uart2: uart2grp {
310*f126890aSEmmanuel Vadot		fsl,pins = <
311*f126890aSEmmanuel Vadot			MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX	0x79
312*f126890aSEmmanuel Vadot			MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX	0x79
313*f126890aSEmmanuel Vadot		>;
314*f126890aSEmmanuel Vadot	};
315*f126890aSEmmanuel Vadot
316*f126890aSEmmanuel Vadot	pinctrl_uart4: uart4grp {
317*f126890aSEmmanuel Vadot		fsl,pins = <
318*f126890aSEmmanuel Vadot			MX7D_PAD_SD2_DATA0__UART4_DCE_RX	0x79
319*f126890aSEmmanuel Vadot			MX7D_PAD_SD2_DATA1__UART4_DCE_TX	0x79
320*f126890aSEmmanuel Vadot		>;
321*f126890aSEmmanuel Vadot	};
322*f126890aSEmmanuel Vadot
323*f126890aSEmmanuel Vadot	pinctrl_usdhc1: usdhc1grp {
324*f126890aSEmmanuel Vadot		fsl,pins = <
325*f126890aSEmmanuel Vadot			MX7D_PAD_SD1_CMD__SD1_CMD		0x59
326*f126890aSEmmanuel Vadot			MX7D_PAD_SD1_CLK__SD1_CLK		0x19
327*f126890aSEmmanuel Vadot			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
328*f126890aSEmmanuel Vadot			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
329*f126890aSEmmanuel Vadot			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
330*f126890aSEmmanuel Vadot			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
331*f126890aSEmmanuel Vadot		>;
332*f126890aSEmmanuel Vadot	};
333*f126890aSEmmanuel Vadot
334*f126890aSEmmanuel Vadot	pinctrl_usdhc3: usdhc3grp {
335*f126890aSEmmanuel Vadot		fsl,pins = <
336*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
337*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
338*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
339*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
340*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
341*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
342*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
343*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
344*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
345*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
346*f126890aSEmmanuel Vadot			MX7D_PAD_SD3_RESET_B__SD3_RESET_B	0x59
347*f126890aSEmmanuel Vadot		>;
348*f126890aSEmmanuel Vadot	};
349*f126890aSEmmanuel Vadot};
350*f126890aSEmmanuel Vadot
351*f126890aSEmmanuel Vadot&iomuxc_lpsr {
352*f126890aSEmmanuel Vadot	pinctrl_enet1_phy_interrupt: enet1phyinterruptgrp {
353*f126890aSEmmanuel Vadot		fsl,phy = <
354*f126890aSEmmanuel Vadot			MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2	0x08
355*f126890aSEmmanuel Vadot		>;
356*f126890aSEmmanuel Vadot	};
357*f126890aSEmmanuel Vadot};
358