1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Device Tree file for Marvell Armada 375 evaluation board 4*f126890aSEmmanuel Vadot * (DB-88F6720) 5*f126890aSEmmanuel Vadot * 6*f126890aSEmmanuel Vadot * Copyright (C) 2014 Marvell 7*f126890aSEmmanuel Vadot * 8*f126890aSEmmanuel Vadot * Gregory CLEMENT <gregory.clement@free-electrons.com> 9*f126890aSEmmanuel Vadot * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 10*f126890aSEmmanuel Vadot */ 11*f126890aSEmmanuel Vadot 12*f126890aSEmmanuel Vadot/dts-v1/; 13*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 14*f126890aSEmmanuel Vadot#include "armada-375.dtsi" 15*f126890aSEmmanuel Vadot 16*f126890aSEmmanuel Vadot/ { 17*f126890aSEmmanuel Vadot model = "Marvell Armada 375 Development Board"; 18*f126890aSEmmanuel Vadot compatible = "marvell,a375-db", "marvell,armada375"; 19*f126890aSEmmanuel Vadot 20*f126890aSEmmanuel Vadot chosen { 21*f126890aSEmmanuel Vadot stdout-path = "serial0:115200n8"; 22*f126890aSEmmanuel Vadot }; 23*f126890aSEmmanuel Vadot 24*f126890aSEmmanuel Vadot memory@0 { 25*f126890aSEmmanuel Vadot device_type = "memory"; 26*f126890aSEmmanuel Vadot reg = <0x00000000 0x40000000>; /* 1 GB */ 27*f126890aSEmmanuel Vadot }; 28*f126890aSEmmanuel Vadot 29*f126890aSEmmanuel Vadot soc { 30*f126890aSEmmanuel Vadot ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 31*f126890aSEmmanuel Vadot MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 32*f126890aSEmmanuel Vadot MBUS_ID(0x09, 0x09) 0 0xf1100000 0x10000 33*f126890aSEmmanuel Vadot MBUS_ID(0x09, 0x05) 0 0xf1110000 0x10000>; 34*f126890aSEmmanuel Vadot 35*f126890aSEmmanuel Vadot }; 36*f126890aSEmmanuel Vadot}; 37*f126890aSEmmanuel Vadot&pciec { 38*f126890aSEmmanuel Vadot status = "okay"; 39*f126890aSEmmanuel Vadot}; 40*f126890aSEmmanuel Vadot 41*f126890aSEmmanuel Vadot/* 42*f126890aSEmmanuel Vadot * The two PCIe units are accessible through 43*f126890aSEmmanuel Vadot * standard PCIe slots on the board. 44*f126890aSEmmanuel Vadot */ 45*f126890aSEmmanuel Vadot&pcie0 { 46*f126890aSEmmanuel Vadot /* Port 0, Lane 0 */ 47*f126890aSEmmanuel Vadot status = "okay"; 48*f126890aSEmmanuel Vadot}; 49*f126890aSEmmanuel Vadot 50*f126890aSEmmanuel Vadot&pcie1 { 51*f126890aSEmmanuel Vadot /* Port 1, Lane 0 */ 52*f126890aSEmmanuel Vadot status = "okay"; 53*f126890aSEmmanuel Vadot}; 54*f126890aSEmmanuel Vadot 55*f126890aSEmmanuel Vadot 56*f126890aSEmmanuel Vadot&spi0 { 57*f126890aSEmmanuel Vadot pinctrl-0 = <&spi0_pins>; 58*f126890aSEmmanuel Vadot pinctrl-names = "default"; 59*f126890aSEmmanuel Vadot 60*f126890aSEmmanuel Vadot /* 61*f126890aSEmmanuel Vadot * SPI conflicts with NAND, so we disable it here, and 62*f126890aSEmmanuel Vadot * select NAND as the enabled device by default. 63*f126890aSEmmanuel Vadot */ 64*f126890aSEmmanuel Vadot 65*f126890aSEmmanuel Vadot status = "disabled"; 66*f126890aSEmmanuel Vadot 67*f126890aSEmmanuel Vadot flash@0 { 68*f126890aSEmmanuel Vadot #address-cells = <1>; 69*f126890aSEmmanuel Vadot #size-cells = <1>; 70*f126890aSEmmanuel Vadot compatible = "n25q128a13", "jedec,spi-nor"; 71*f126890aSEmmanuel Vadot reg = <0>; /* Chip select 0 */ 72*f126890aSEmmanuel Vadot spi-max-frequency = <108000000>; 73*f126890aSEmmanuel Vadot }; 74*f126890aSEmmanuel Vadot}; 75*f126890aSEmmanuel Vadot 76*f126890aSEmmanuel Vadot&i2c0 { 77*f126890aSEmmanuel Vadot status = "okay"; 78*f126890aSEmmanuel Vadot clock-frequency = <100000>; 79*f126890aSEmmanuel Vadot pinctrl-0 = <&i2c0_pins>; 80*f126890aSEmmanuel Vadot pinctrl-names = "default"; 81*f126890aSEmmanuel Vadot}; 82*f126890aSEmmanuel Vadot 83*f126890aSEmmanuel Vadot&i2c1 { 84*f126890aSEmmanuel Vadot status = "okay"; 85*f126890aSEmmanuel Vadot clock-frequency = <100000>; 86*f126890aSEmmanuel Vadot pinctrl-0 = <&i2c1_pins>; 87*f126890aSEmmanuel Vadot pinctrl-names = "default"; 88*f126890aSEmmanuel Vadot}; 89*f126890aSEmmanuel Vadot 90*f126890aSEmmanuel Vadot&uart0 { 91*f126890aSEmmanuel Vadot status = "okay"; 92*f126890aSEmmanuel Vadot}; 93*f126890aSEmmanuel Vadot 94*f126890aSEmmanuel Vadot&pinctrl { 95*f126890aSEmmanuel Vadot sdio_st_pins: sdio-st-pins { 96*f126890aSEmmanuel Vadot marvell,pins = "mpp44", "mpp45"; 97*f126890aSEmmanuel Vadot marvell,function = "gpio"; 98*f126890aSEmmanuel Vadot }; 99*f126890aSEmmanuel Vadot}; 100*f126890aSEmmanuel Vadot 101*f126890aSEmmanuel Vadot&sata { 102*f126890aSEmmanuel Vadot status = "okay"; 103*f126890aSEmmanuel Vadot nr-ports = <2>; 104*f126890aSEmmanuel Vadot}; 105*f126890aSEmmanuel Vadot 106*f126890aSEmmanuel Vadot&nand_controller { 107*f126890aSEmmanuel Vadot status = "okay"; 108*f126890aSEmmanuel Vadot pinctrl-0 = <&nand_pins>; 109*f126890aSEmmanuel Vadot pinctrl-names = "default"; 110*f126890aSEmmanuel Vadot 111*f126890aSEmmanuel Vadot nand@0 { 112*f126890aSEmmanuel Vadot reg = <0>; 113*f126890aSEmmanuel Vadot label = "pxa3xx_nand-0"; 114*f126890aSEmmanuel Vadot nand-rb = <0>; 115*f126890aSEmmanuel Vadot marvell,nand-keep-config; 116*f126890aSEmmanuel Vadot nand-on-flash-bbt; 117*f126890aSEmmanuel Vadot nand-ecc-strength = <4>; 118*f126890aSEmmanuel Vadot nand-ecc-step-size = <512>; 119*f126890aSEmmanuel Vadot 120*f126890aSEmmanuel Vadot partitions { 121*f126890aSEmmanuel Vadot compatible = "fixed-partitions"; 122*f126890aSEmmanuel Vadot #address-cells = <1>; 123*f126890aSEmmanuel Vadot #size-cells = <1>; 124*f126890aSEmmanuel Vadot 125*f126890aSEmmanuel Vadot partition@0 { 126*f126890aSEmmanuel Vadot label = "U-Boot"; 127*f126890aSEmmanuel Vadot reg = <0 0x800000>; 128*f126890aSEmmanuel Vadot }; 129*f126890aSEmmanuel Vadot partition@800000 { 130*f126890aSEmmanuel Vadot label = "Linux"; 131*f126890aSEmmanuel Vadot reg = <0x800000 0x800000>; 132*f126890aSEmmanuel Vadot }; 133*f126890aSEmmanuel Vadot partition@1000000 { 134*f126890aSEmmanuel Vadot label = "Filesystem"; 135*f126890aSEmmanuel Vadot reg = <0x1000000 0x3f000000>; 136*f126890aSEmmanuel Vadot }; 137*f126890aSEmmanuel Vadot }; 138*f126890aSEmmanuel Vadot }; 139*f126890aSEmmanuel Vadot}; 140*f126890aSEmmanuel Vadot 141*f126890aSEmmanuel Vadot&usb1 { 142*f126890aSEmmanuel Vadot status = "okay"; 143*f126890aSEmmanuel Vadot}; 144*f126890aSEmmanuel Vadot 145*f126890aSEmmanuel Vadot&usb2 { 146*f126890aSEmmanuel Vadot status = "okay"; 147*f126890aSEmmanuel Vadot}; 148*f126890aSEmmanuel Vadot 149*f126890aSEmmanuel Vadot&sdio { 150*f126890aSEmmanuel Vadot pinctrl-0 = <&sdio_pins &sdio_st_pins>; 151*f126890aSEmmanuel Vadot pinctrl-names = "default"; 152*f126890aSEmmanuel Vadot status = "okay"; 153*f126890aSEmmanuel Vadot cd-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; 154*f126890aSEmmanuel Vadot wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; 155*f126890aSEmmanuel Vadot}; 156*f126890aSEmmanuel Vadot 157*f126890aSEmmanuel Vadot&mdio { 158*f126890aSEmmanuel Vadot phy0: ethernet-phy@0 { 159*f126890aSEmmanuel Vadot reg = <0>; 160*f126890aSEmmanuel Vadot }; 161*f126890aSEmmanuel Vadot 162*f126890aSEmmanuel Vadot phy3: ethernet-phy@3 { 163*f126890aSEmmanuel Vadot reg = <3>; 164*f126890aSEmmanuel Vadot }; 165*f126890aSEmmanuel Vadot}; 166*f126890aSEmmanuel Vadot 167*f126890aSEmmanuel Vadotðernet { 168*f126890aSEmmanuel Vadot status = "okay"; 169*f126890aSEmmanuel Vadot}; 170*f126890aSEmmanuel Vadot 171*f126890aSEmmanuel Vadot 172*f126890aSEmmanuel Vadotð0 { 173*f126890aSEmmanuel Vadot status = "okay"; 174*f126890aSEmmanuel Vadot phy = <&phy0>; 175*f126890aSEmmanuel Vadot phy-mode = "rgmii-id"; 176*f126890aSEmmanuel Vadot}; 177*f126890aSEmmanuel Vadot 178*f126890aSEmmanuel Vadotð1 { 179*f126890aSEmmanuel Vadot status = "okay"; 180*f126890aSEmmanuel Vadot phy = <&phy3>; 181*f126890aSEmmanuel Vadot phy-mode = "gmii"; 182*f126890aSEmmanuel Vadot}; 183