1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org> 4*f126890aSEmmanuel Vadot */ 5*f126890aSEmmanuel Vadot 6*f126890aSEmmanuel Vadot#include "sunxi-bananapi-m2-plus.dtsi" 7*f126890aSEmmanuel Vadot 8*f126890aSEmmanuel Vadot/ { 9*f126890aSEmmanuel Vadot /* 10*f126890aSEmmanuel Vadot * Bananapi M2+ v1.2 uses a GPIO line to change the effective 11*f126890aSEmmanuel Vadot * resistance on the CPU regulator's feedback pin. 12*f126890aSEmmanuel Vadot */ 13*f126890aSEmmanuel Vadot reg_vdd_cpux: vdd-cpux { 14*f126890aSEmmanuel Vadot compatible = "regulator-gpio"; 15*f126890aSEmmanuel Vadot regulator-name = "vdd-cpux"; 16*f126890aSEmmanuel Vadot regulator-type = "voltage"; 17*f126890aSEmmanuel Vadot regulator-boot-on; 18*f126890aSEmmanuel Vadot regulator-always-on; 19*f126890aSEmmanuel Vadot regulator-min-microvolt = <1108475>; 20*f126890aSEmmanuel Vadot regulator-max-microvolt = <1308475>; 21*f126890aSEmmanuel Vadot regulator-ramp-delay = <50>; /* 4ms */ 22*f126890aSEmmanuel Vadot gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */ 23*f126890aSEmmanuel Vadot gpios-states = <0x1>; 24*f126890aSEmmanuel Vadot states = <1108475 0>, <1308475 1>; 25*f126890aSEmmanuel Vadot }; 26*f126890aSEmmanuel Vadot}; 27*f126890aSEmmanuel Vadot 28*f126890aSEmmanuel Vadot&cpu0 { 29*f126890aSEmmanuel Vadot cpu-supply = <®_vdd_cpux>; 30*f126890aSEmmanuel Vadot}; 31*f126890aSEmmanuel Vadot 32*f126890aSEmmanuel Vadot&cpu1 { 33*f126890aSEmmanuel Vadot cpu-supply = <®_vdd_cpux>; 34*f126890aSEmmanuel Vadot}; 35*f126890aSEmmanuel Vadot 36*f126890aSEmmanuel Vadot&cpu2 { 37*f126890aSEmmanuel Vadot cpu-supply = <®_vdd_cpux>; 38*f126890aSEmmanuel Vadot}; 39*f126890aSEmmanuel Vadot 40*f126890aSEmmanuel Vadot&cpu3 { 41*f126890aSEmmanuel Vadot cpu-supply = <®_vdd_cpux>; 42*f126890aSEmmanuel Vadot}; 43