1*c66ec88fSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*c66ec88fSEmmanuel Vadot /* 3*c66ec88fSEmmanuel Vadot * Device Tree defines for Lochnagar clocking 4*c66ec88fSEmmanuel Vadot * 5*c66ec88fSEmmanuel Vadot * Copyright (c) 2017-2018 Cirrus Logic, Inc. and 6*c66ec88fSEmmanuel Vadot * Cirrus Logic International Semiconductor Ltd. 7*c66ec88fSEmmanuel Vadot * 8*c66ec88fSEmmanuel Vadot * Author: Charles Keepax <ckeepax@opensource.cirrus.com> 9*c66ec88fSEmmanuel Vadot */ 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot #ifndef DT_BINDINGS_CLK_LOCHNAGAR_H 12*c66ec88fSEmmanuel Vadot #define DT_BINDINGS_CLK_LOCHNAGAR_H 13*c66ec88fSEmmanuel Vadot 14*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_CDC_MCLK1 0 15*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_CDC_MCLK2 1 16*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_DSP_CLKIN 2 17*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_GF_CLKOUT1 3 18*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_GF_CLKOUT2 4 19*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_PSIA1_MCLK 5 20*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_PSIA2_MCLK 6 21*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_SPDIF_MCLK 7 22*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_ADAT_MCLK 8 23*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_SOUNDCARD_MCLK 9 24*c66ec88fSEmmanuel Vadot #define LOCHNAGAR_SPDIF_CLKOUT 10 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadot #endif 27