1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner A31 SPI Controller Device Tree Bindings 8 9allOf: 10 - $ref: "spi-controller.yaml" 11 12maintainers: 13 - Chen-Yu Tsai <wens@csie.org> 14 - Maxime Ripard <mripard@kernel.org> 15 16properties: 17 "#address-cells": true 18 "#size-cells": true 19 20 compatible: 21 oneOf: 22 - const: allwinner,sun6i-a31-spi 23 - const: allwinner,sun8i-h3-spi 24 - items: 25 - enum: 26 - allwinner,sun8i-r40-spi 27 - allwinner,sun50i-h6-spi 28 - allwinner,sun50i-h616-spi 29 - allwinner,suniv-f1c100s-spi 30 - const: allwinner,sun8i-h3-spi 31 32 reg: 33 maxItems: 1 34 35 interrupts: 36 maxItems: 1 37 38 clocks: 39 items: 40 - description: Bus Clock 41 - description: Module Clock 42 43 clock-names: 44 items: 45 - const: ahb 46 - const: mod 47 48 resets: 49 maxItems: 1 50 51 dmas: 52 items: 53 - description: RX DMA Channel 54 - description: TX DMA Channel 55 56 dma-names: 57 items: 58 - const: rx 59 - const: tx 60 61 num-cs: true 62 63patternProperties: 64 "^.*@[0-9a-f]+": 65 type: object 66 properties: 67 reg: 68 items: 69 minimum: 0 70 maximum: 4 71 72 spi-rx-bus-width: 73 const: 1 74 75 spi-tx-bus-width: 76 const: 1 77 78required: 79 - compatible 80 - reg 81 - interrupts 82 - clocks 83 - clock-names 84 85additionalProperties: false 86 87examples: 88 - | 89 spi1: spi@1c69000 { 90 compatible = "allwinner,sun6i-a31-spi"; 91 reg = <0x01c69000 0x1000>; 92 interrupts = <0 66 4>; 93 clocks = <&ahb1_gates 21>, <&spi1_clk>; 94 clock-names = "ahb", "mod"; 95 resets = <&ahb1_rst 21>; 96 #address-cells = <1>; 97 #size-cells = <0>; 98 }; 99 100 - | 101 spi0: spi@1c68000 { 102 compatible = "allwinner,sun8i-h3-spi"; 103 reg = <0x01c68000 0x1000>; 104 interrupts = <0 65 4>; 105 clocks = <&ccu 30>, <&ccu 82>; 106 clock-names = "ahb", "mod"; 107 dmas = <&dma 23>, <&dma 23>; 108 dma-names = "rx", "tx"; 109 resets = <&ccu 15>; 110 #address-cells = <1>; 111 #size-cells = <0>; 112 }; 113 114... 115