xref: /freebsd/sys/contrib/device-tree/Bindings/pwm/nvidia,tegra20-pwm.yaml (revision 8aac90f18aef7c9eea906c3ff9a001ca7b94f375) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/nvidia,tegra20-pwm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra PWFM controller
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Jon Hunter <jonathanh@nvidia.com>
12
13properties:
14  compatible:
15    oneOf:
16      - enum:
17          - nvidia,tegra20-pwm
18          - nvidia,tegra186-pwm
19
20      - items:
21          - enum:
22              - nvidia,tegra30-pwm
23              - nvidia,tegra114-pwm
24              - nvidia,tegra124-pwm
25              - nvidia,tegra132-pwm
26              - nvidia,tegra210-pwm
27          - enum:
28              - nvidia,tegra20-pwm
29
30      - items:
31          - const: nvidia,tegra194-pwm
32          - const: nvidia,tegra186-pwm
33
34      - items:
35          - const: nvidia,tegra234-pwm
36          - const: nvidia,tegra194-pwm
37
38  reg:
39    maxItems: 1
40
41  clocks:
42    maxItems: 1
43
44  resets:
45    items:
46      - description: module reset
47
48  reset-names:
49    items:
50      - const: pwm
51
52  "#pwm-cells":
53    const: 2
54
55  pinctrl-names:
56    items:
57      - const: default
58      - const: sleep
59
60  pinctrl-0:
61    description: configuration for the default/active state
62
63  pinctrl-1:
64    description: configuration for the sleep state
65
66  operating-points-v2: true
67
68  power-domains:
69    items:
70      - description: phandle to the core power domain
71
72allOf:
73  - $ref: pwm.yaml
74
75required:
76  - compatible
77  - reg
78  - clocks
79  - resets
80  - reset-names
81
82additionalProperties: false
83
84examples:
85  - |
86    #include <dt-bindings/clock/tegra20-car.h>
87
88    pwm: pwm@7000a000 {
89        compatible = "nvidia,tegra20-pwm";
90        reg = <0x7000a000 0x100>;
91        #pwm-cells = <2>;
92        clocks = <&tegra_car TEGRA20_CLK_PWM>;
93        resets = <&tegra_car 17>;
94        reset-names = "pwm";
95    };
96