1Freescale L2 Cache Controller 2 3L2 cache is present in Freescale's QorIQ and QorIQ Qonverge platforms. 4The cache bindings explained below are Devicetree Specification compliant 5 6Required Properties: 7 8- compatible : Should include one of the following: 9 "fsl,8540-l2-cache-controller" 10 "fsl,8541-l2-cache-controller" 11 "fsl,8544-l2-cache-controller" 12 "fsl,8548-l2-cache-controller" 13 "fsl,8555-l2-cache-controller" 14 "fsl,8568-l2-cache-controller" 15 "fsl,b4420-l2-cache-controller" 16 "fsl,b4860-l2-cache-controller" 17 "fsl,bsc9131-l2-cache-controller" 18 "fsl,bsc9132-l2-cache-controller" 19 "fsl,c293-l2-cache-controller" 20 "fsl,mpc8536-l2-cache-controller" 21 "fsl,mpc8540-l2-cache-controller" 22 "fsl,mpc8541-l2-cache-controller" 23 "fsl,mpc8544-l2-cache-controller" 24 "fsl,mpc8548-l2-cache-controller" 25 "fsl,mpc8555-l2-cache-controller" 26 "fsl,mpc8560-l2-cache-controller" 27 "fsl,mpc8568-l2-cache-controller" 28 "fsl,mpc8569-l2-cache-controller" 29 "fsl,mpc8572-l2-cache-controller" 30 "fsl,p1010-l2-cache-controller" 31 "fsl,p1011-l2-cache-controller" 32 "fsl,p1012-l2-cache-controller" 33 "fsl,p1013-l2-cache-controller" 34 "fsl,p1014-l2-cache-controller" 35 "fsl,p1015-l2-cache-controller" 36 "fsl,p1016-l2-cache-controller" 37 "fsl,p1020-l2-cache-controller" 38 "fsl,p1021-l2-cache-controller" 39 "fsl,p1022-l2-cache-controller" 40 "fsl,p1023-l2-cache-controller" 41 "fsl,p1024-l2-cache-controller" 42 "fsl,p1025-l2-cache-controller" 43 "fsl,p2010-l2-cache-controller" 44 "fsl,p2020-l2-cache-controller" 45 "fsl,t2080-l2-cache-controller" 46 "fsl,t4240-l2-cache-controller" 47 and "cache". 48- reg : Address and size of L2 cache controller registers 49- cache-size : Size of the entire L2 cache 50- interrupts : Error interrupt of L2 controller 51- cache-line-size : Size of L2 cache lines 52 53Example: 54 55 L2: l2-cache-controller@20000 { 56 compatible = "fsl,bsc9132-l2-cache-controller", "cache"; 57 reg = <0x20000 0x1000>; 58 cache-line-size = <32>; // 32 bytes 59 cache-size = <0x40000>; // L2,256K 60 interrupts = <16 2 1 0>; 61 }; 62