1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Qualcomm eDP PHY 9 10maintainers: 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 13description: 14 The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides 15 the physical interface for Embedded Display Port. 16 17properties: 18 compatible: 19 enum: 20 - qcom,sc7280-edp-phy 21 - qcom,sc8180x-edp-phy 22 - qcom,sc8280xp-dp-phy 23 - qcom,sc8280xp-edp-phy 24 25 reg: 26 items: 27 - description: PHY base register block 28 - description: tx0 register block 29 - description: tx1 register block 30 - description: PLL register block 31 32 clocks: 33 maxItems: 2 34 35 clock-names: 36 items: 37 - const: aux 38 - const: cfg_ahb 39 40 "#clock-cells": 41 const: 1 42 43 "#phy-cells": 44 const: 0 45 46 vdda-phy-supply: true 47 vdda-pll-supply: true 48 49required: 50 - compatible 51 - reg 52 - clocks 53 - clock-names 54 - "#clock-cells" 55 - "#phy-cells" 56 57additionalProperties: false 58 59examples: 60 - | 61 phy@aec2a00 { 62 compatible = "qcom,sc8180x-edp-phy"; 63 reg = <0x0aec2a00 0x1c0>, 64 <0x0aec2200 0xa0>, 65 <0x0aec2600 0xa0>, 66 <0x0aec2000 0x19c>; 67 68 clocks = <&dispcc 0>, <&dispcc 1>; 69 clock-names = "aux", "cfg_ahb"; 70 71 #clock-cells = <1>; 72 #phy-cells = <0>; 73 74 vdda-phy-supply = <&vdd_a_edp_0_1p2>; 75 vdda-pll-supply = <&vdd_a_edp_0_0p9>; 76 }; 77... 78