1* Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX 2 3The Enhanced Secure Digital Host Controller on Freescale i.MX family 4provides an interface for MMC, SD, and SDIO types of memory cards. 5 6This file documents differences between the core properties described 7by mmc.txt and the properties used by the sdhci-esdhc-imx driver. 8 9Required properties: 10- compatible : Should be "fsl,<chip>-esdhc", the supported chips include 11 "fsl,imx25-esdhc" 12 "fsl,imx35-esdhc" 13 "fsl,imx51-esdhc" 14 "fsl,imx53-esdhc" 15 "fsl,imx6q-usdhc" 16 "fsl,imx6sl-usdhc" 17 "fsl,imx6sx-usdhc" 18 "fsl,imx6ull-usdhc" 19 "fsl,imx7d-usdhc" 20 "fsl,imx7ulp-usdhc" 21 "fsl,imx8mq-usdhc" 22 "fsl,imx8mm-usdhc" 23 "fsl,imx8mn-usdhc" 24 "fsl,imx8mp-usdhc" 25 "fsl,imx8qm-usdhc" 26 "fsl,imx8qxp-usdhc" 27 28Optional properties: 29- fsl,wp-controller : Indicate to use controller internal write protection 30- fsl,delay-line : Specify the number of delay cells for override mode. 31 This is used to set the clock delay for DLL(Delay Line) on override mode 32 to select a proper data sampling window in case the clock quality is not good 33 due to signal path is too long on the board. Please refer to eSDHC/uSDHC 34 chapter, DLL (Delay Line) section in RM for details. 35- voltage-ranges : Specify the voltage range in case there are software 36 transparent level shifters on the outputs of the controller. Two cells are 37 required, first cell specifies minimum slot voltage (mV), second cell 38 specifies maximum slot voltage (mV). Several ranges could be specified. 39- fsl,tuning-start-tap: Specify the start dealy cell point when send first CMD19 40 in tuning procedure. 41- fsl,tuning-step: Specify the increasing delay cell steps in tuning procedure. 42 The uSDHC use one delay cell as default increasing step to do tuning process. 43 This property allows user to change the tuning step to more than one delay 44 cells which is useful for some special boards or cards when the default 45 tuning step can't find the proper delay window within limited tuning retries. 46- fsl,strobe-dll-delay-target: Specify the strobe dll control slave delay target. 47 This delay target programming host controller loopback read clock, and this 48 property allows user to change the delay target for the strobe input read clock. 49 If not use this property, driver default set the delay target to value 7. 50 Only eMMC HS400 mode need to take care of this property. 51 52Examples: 53 54esdhc@70004000 { 55 compatible = "fsl,imx51-esdhc"; 56 reg = <0x70004000 0x4000>; 57 interrupts = <1>; 58 fsl,wp-controller; 59}; 60 61esdhc@70008000 { 62 compatible = "fsl,imx51-esdhc"; 63 reg = <0x70008000 0x4000>; 64 interrupts = <2>; 65 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */ 66 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */ 67}; 68