1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interconnect/qcom,qcs404.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm QCS404 Network-On-Chip interconnect 8 9maintainers: 10 - Georgi Djakov <georgi.djakov@linaro.org> 11 12description: | 13 The Qualcomm QCS404 interconnect providers support adjusting the 14 bandwidth requirements between the various NoC fabrics. 15 16properties: 17 reg: 18 maxItems: 1 19 20 compatible: 21 enum: 22 - qcom,qcs404-bimc 23 - qcom,qcs404-pcnoc 24 - qcom,qcs404-snoc 25 26 '#interconnect-cells': 27 const: 1 28 29 clock-names: 30 items: 31 - const: bus 32 - const: bus_a 33 34 clocks: 35 items: 36 - description: Bus Clock 37 - description: Bus A Clock 38 39required: 40 - compatible 41 - reg 42 - '#interconnect-cells' 43 - clock-names 44 - clocks 45 46additionalProperties: false 47 48examples: 49 - | 50 #include <dt-bindings/clock/qcom,rpmcc.h> 51 52 bimc: interconnect@400000 { 53 reg = <0x00400000 0x80000>; 54 compatible = "qcom,qcs404-bimc"; 55 #interconnect-cells = <1>; 56 clock-names = "bus", "bus_a"; 57 clocks = <&rpmcc RPM_SMD_BIMC_CLK>, 58 <&rpmcc RPM_SMD_BIMC_A_CLK>; 59 }; 60 61 pnoc: interconnect@500000 { 62 reg = <0x00500000 0x15080>; 63 compatible = "qcom,qcs404-pcnoc"; 64 #interconnect-cells = <1>; 65 clock-names = "bus", "bus_a"; 66 clocks = <&rpmcc RPM_SMD_PNOC_CLK>, 67 <&rpmcc RPM_SMD_PNOC_A_CLK>; 68 }; 69 70 snoc: interconnect@580000 { 71 reg = <0x00580000 0x23080>; 72 compatible = "qcom,qcs404-snoc"; 73 #interconnect-cells = <1>; 74 clock-names = "bus", "bus_a"; 75 clocks = <&rpmcc RPM_SMD_SNOC_CLK>, 76 <&rpmcc RPM_SMD_SNOC_A_CLK>; 77 }; 78