1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/dma/ingenic,dma.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Ingenic SoCs DMA Controller DT bindings 8 9maintainers: 10 - Paul Cercueil <paul@crapouillou.net> 11 12allOf: 13 - $ref: "dma-controller.yaml#" 14 15properties: 16 compatible: 17 enum: 18 - ingenic,jz4740-dma 19 - ingenic,jz4725b-dma 20 - ingenic,jz4760-dma 21 - ingenic,jz4760b-dma 22 - ingenic,jz4770-dma 23 - ingenic,jz4780-dma 24 - ingenic,x1000-dma 25 - ingenic,x1830-dma 26 27 reg: 28 items: 29 - description: Channel-specific registers 30 - description: System control registers 31 32 interrupts: 33 maxItems: 1 34 35 clocks: 36 maxItems: 1 37 38 "#dma-cells": 39 const: 2 40 description: > 41 DMA clients must use the format described in dma.txt, giving a phandle 42 to the DMA controller plus the following 2 integer cells: 43 44 - Request type: The DMA request type for transfers to/from the 45 device on the allocated channel, as defined in the SoC documentation. 46 47 - Channel: If set to 0xffffffff, any available channel will be allocated 48 for the client. Otherwise, the exact channel specified will be used. 49 The channel should be reserved on the DMA controller using the 50 ingenic,reserved-channels property. 51 52 ingenic,reserved-channels: 53 $ref: /schemas/types.yaml#/definitions/uint32 54 description: > 55 Bitmask of channels to reserve for devices that need a specific 56 channel. These channels will only be assigned when explicitely 57 requested by a client. The primary use for this is channels 0 and 58 1, which can be configured to have special behaviour for NAND/BCH 59 when using programmable firmware. 60 61required: 62 - compatible 63 - reg 64 - interrupts 65 - clocks 66 67unevaluatedProperties: false 68 69examples: 70 - | 71 #include <dt-bindings/clock/jz4780-cgu.h> 72 dma: dma-controller@13420000 { 73 compatible = "ingenic,jz4780-dma"; 74 reg = <0x13420000 0x400>, <0x13421000 0x40>; 75 76 interrupt-parent = <&intc>; 77 interrupts = <10>; 78 79 clocks = <&cgu JZ4780_CLK_PDMA>; 80 81 #dma-cells = <2>; 82 83 ingenic,reserved-channels = <0x3>; 84 }; 85