1*c66ec88fSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*c66ec88fSEmmanuel Vadot%YAML 1.2 3*c66ec88fSEmmanuel Vadot--- 4*c66ec88fSEmmanuel Vadot$id: http://devicetree.org/schemas/display/bridge/thine,thc63lvd1024.yaml# 5*c66ec88fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadottitle: Thine Electronics THC63LVD1024 LVDS Decoder 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadotmaintainers: 10*c66ec88fSEmmanuel Vadot - Jacopo Mondi <jacopo+renesas@jmondi.org> 11*c66ec88fSEmmanuel Vadot - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel Vadotdescription: | 14*c66ec88fSEmmanuel Vadot The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS 15*c66ec88fSEmmanuel Vadot streams to parallel data outputs. The chip supports single/dual input/output 16*c66ec88fSEmmanuel Vadot modes, handling up to two LVDS input streams and up to two digital CMOS/TTL 17*c66ec88fSEmmanuel Vadot outputs. 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel Vadot Single or dual operation mode, output data mapping and DDR output modes are 20*c66ec88fSEmmanuel Vadot configured through input signals and the chip does not expose any control 21*c66ec88fSEmmanuel Vadot bus. 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadotproperties: 24*c66ec88fSEmmanuel Vadot compatible: 25*c66ec88fSEmmanuel Vadot const: thine,thc63lvd1024 26*c66ec88fSEmmanuel Vadot 27*c66ec88fSEmmanuel Vadot ports: 28*c66ec88fSEmmanuel Vadot type: object 29*c66ec88fSEmmanuel Vadot description: | 30*c66ec88fSEmmanuel Vadot This device has four video ports. Their connections are modeled using the 31*c66ec88fSEmmanuel Vadot OF graph bindings specified in Documentation/devicetree/bindings/graph.txt. 32*c66ec88fSEmmanuel Vadot 33*c66ec88fSEmmanuel Vadot The device can operate in single-link mode or dual-link mode. In 34*c66ec88fSEmmanuel Vadot single-link mode, all pixels are received on port@0, and port@1 shall not 35*c66ec88fSEmmanuel Vadot contain any endpoint. In dual-link mode, even-numbered pixels are 36*c66ec88fSEmmanuel Vadot received on port@0 and odd-numbered pixels on port@1, and both port@0 and 37*c66ec88fSEmmanuel Vadot port@1 shall contain endpoints. 38*c66ec88fSEmmanuel Vadot 39*c66ec88fSEmmanuel Vadot properties: 40*c66ec88fSEmmanuel Vadot '#address-cells': 41*c66ec88fSEmmanuel Vadot const: 1 42*c66ec88fSEmmanuel Vadot 43*c66ec88fSEmmanuel Vadot '#size-cells': 44*c66ec88fSEmmanuel Vadot const: 0 45*c66ec88fSEmmanuel Vadot 46*c66ec88fSEmmanuel Vadot port@0: 47*c66ec88fSEmmanuel Vadot type: object 48*c66ec88fSEmmanuel Vadot description: First LVDS input port 49*c66ec88fSEmmanuel Vadot 50*c66ec88fSEmmanuel Vadot port@1: 51*c66ec88fSEmmanuel Vadot type: object 52*c66ec88fSEmmanuel Vadot description: Second LVDS input port 53*c66ec88fSEmmanuel Vadot 54*c66ec88fSEmmanuel Vadot port@2: 55*c66ec88fSEmmanuel Vadot type: object 56*c66ec88fSEmmanuel Vadot description: First digital CMOS/TTL parallel output 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel Vadot port@3: 59*c66ec88fSEmmanuel Vadot type: object 60*c66ec88fSEmmanuel Vadot description: Second digital CMOS/TTL parallel output 61*c66ec88fSEmmanuel Vadot 62*c66ec88fSEmmanuel Vadot required: 63*c66ec88fSEmmanuel Vadot - port@0 64*c66ec88fSEmmanuel Vadot - port@2 65*c66ec88fSEmmanuel Vadot 66*c66ec88fSEmmanuel Vadot additionalProperties: false 67*c66ec88fSEmmanuel Vadot 68*c66ec88fSEmmanuel Vadot oe-gpios: 69*c66ec88fSEmmanuel Vadot maxItems: 1 70*c66ec88fSEmmanuel Vadot description: Output enable GPIO signal, pin name "OE", active high. 71*c66ec88fSEmmanuel Vadot 72*c66ec88fSEmmanuel Vadot powerdown-gpios: 73*c66ec88fSEmmanuel Vadot maxItems: 1 74*c66ec88fSEmmanuel Vadot description: Power down GPIO signal, pin name "/PDWN", active low. 75*c66ec88fSEmmanuel Vadot 76*c66ec88fSEmmanuel Vadot vcc-supply: 77*c66ec88fSEmmanuel Vadot maxItems: 1 78*c66ec88fSEmmanuel Vadot description: 79*c66ec88fSEmmanuel Vadot Power supply for the TTL output, TTL CLOCKOUT signal, LVDS input, PLL and 80*c66ec88fSEmmanuel Vadot digital circuitry. 81*c66ec88fSEmmanuel Vadot 82*c66ec88fSEmmanuel Vadotrequired: 83*c66ec88fSEmmanuel Vadot - compatible 84*c66ec88fSEmmanuel Vadot - ports 85*c66ec88fSEmmanuel Vadot - vcc-supply 86*c66ec88fSEmmanuel Vadot 87*c66ec88fSEmmanuel VadotadditionalProperties: false 88*c66ec88fSEmmanuel Vadot 89*c66ec88fSEmmanuel Vadotexamples: 90*c66ec88fSEmmanuel Vadot - | 91*c66ec88fSEmmanuel Vadot #include <dt-bindings/gpio/gpio.h> 92*c66ec88fSEmmanuel Vadot 93*c66ec88fSEmmanuel Vadot lvds-decoder { 94*c66ec88fSEmmanuel Vadot compatible = "thine,thc63lvd1024"; 95*c66ec88fSEmmanuel Vadot 96*c66ec88fSEmmanuel Vadot vcc-supply = <®_lvds_vcc>; 97*c66ec88fSEmmanuel Vadot powerdown-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; 98*c66ec88fSEmmanuel Vadot 99*c66ec88fSEmmanuel Vadot ports { 100*c66ec88fSEmmanuel Vadot #address-cells = <1>; 101*c66ec88fSEmmanuel Vadot #size-cells = <0>; 102*c66ec88fSEmmanuel Vadot 103*c66ec88fSEmmanuel Vadot port@0 { 104*c66ec88fSEmmanuel Vadot reg = <0>; 105*c66ec88fSEmmanuel Vadot 106*c66ec88fSEmmanuel Vadot lvds_dec_in_0: endpoint { 107*c66ec88fSEmmanuel Vadot remote-endpoint = <&lvds_out>; 108*c66ec88fSEmmanuel Vadot }; 109*c66ec88fSEmmanuel Vadot }; 110*c66ec88fSEmmanuel Vadot 111*c66ec88fSEmmanuel Vadot port@2 { 112*c66ec88fSEmmanuel Vadot reg = <2>; 113*c66ec88fSEmmanuel Vadot 114*c66ec88fSEmmanuel Vadot lvds_dec_out_2: endpoint { 115*c66ec88fSEmmanuel Vadot remote-endpoint = <&adv7511_in>; 116*c66ec88fSEmmanuel Vadot }; 117*c66ec88fSEmmanuel Vadot }; 118*c66ec88fSEmmanuel Vadot }; 119*c66ec88fSEmmanuel Vadot }; 120*c66ec88fSEmmanuel Vadot 121*c66ec88fSEmmanuel Vadot... 122