1*c66ec88fSEmmanuel VadotMediaTek cryptographic accelerators 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible: Should be "mediatek,eip97-crypto" 5*c66ec88fSEmmanuel Vadot- reg: Address and length of the register set for the device 6*c66ec88fSEmmanuel Vadot- interrupts: Should contain the five crypto engines interrupts in numeric 7*c66ec88fSEmmanuel Vadot order. These are global system and four descriptor rings. 8*c66ec88fSEmmanuel Vadot- clocks: the clock used by the core 9*c66ec88fSEmmanuel Vadot- clock-names: Must contain "cryp". 10*c66ec88fSEmmanuel Vadot- power-domains: Must contain a reference to the PM domain. 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel VadotExample: 14*c66ec88fSEmmanuel Vadot crypto: crypto@1b240000 { 15*c66ec88fSEmmanuel Vadot compatible = "mediatek,eip97-crypto"; 16*c66ec88fSEmmanuel Vadot reg = <0 0x1b240000 0 0x20000>; 17*c66ec88fSEmmanuel Vadot interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>, 18*c66ec88fSEmmanuel Vadot <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>, 19*c66ec88fSEmmanuel Vadot <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>, 20*c66ec88fSEmmanuel Vadot <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>, 21*c66ec88fSEmmanuel Vadot <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>; 22*c66ec88fSEmmanuel Vadot clocks = <ðsys CLK_ETHSYS_CRYPTO>; 23*c66ec88fSEmmanuel Vadot clock-names = "cryp"; 24*c66ec88fSEmmanuel Vadot power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; 25*c66ec88fSEmmanuel Vadot }; 26