xref: /freebsd/sys/contrib/device-tree/Bindings/clock/qcom,gcc-sdx55.yaml (revision 8ddb146abcdf061be9f2c0db7e391697dafad85c) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-sdx55.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller Binding for SDX55
8
9maintainers:
10  - Vinod Koul <vkoul@kernel.org>
11  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
12
13description: |
14  Qualcomm global clock control module which supports the clocks, resets and
15  power domains on SDX55
16
17  See also:
18  - dt-bindings/clock/qcom,gcc-sdx55.h
19
20properties:
21  compatible:
22    const: qcom,gcc-sdx55
23
24  clocks:
25    items:
26      - description: Board XO source
27      - description: Sleep clock source
28      - description: PLL test clock source (Optional clock)
29    minItems: 2
30
31  clock-names:
32    items:
33      - const: bi_tcxo
34      - const: sleep_clk
35      - const: core_bi_pll_test_se # Optional clock
36    minItems: 2
37
38  '#clock-cells':
39    const: 1
40
41  '#reset-cells':
42    const: 1
43
44  '#power-domain-cells':
45    const: 1
46
47  reg:
48    maxItems: 1
49
50required:
51  - compatible
52  - clocks
53  - clock-names
54  - reg
55  - '#clock-cells'
56  - '#reset-cells'
57  - '#power-domain-cells'
58
59additionalProperties: false
60
61examples:
62  - |
63    #include <dt-bindings/clock/qcom,rpmh.h>
64    clock-controller@100000 {
65      compatible = "qcom,gcc-sdx55";
66      reg = <0x00100000 0x1f0000>;
67      clocks = <&rpmhcc RPMH_CXO_CLK>,
68               <&sleep_clk>, <&pll_test_clk>;
69      clock-names = "bi_tcxo", "sleep_clk", "core_bi_pll_test_se";
70      #clock-cells = <1>;
71      #reset-cells = <1>;
72      #power-domain-cells = <1>;
73    };
74
75...
76