1*833e5d42SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*833e5d42SEmmanuel Vadot%YAML 1.2 3*833e5d42SEmmanuel Vadot--- 4*833e5d42SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/qcom,milos-videocc.yaml# 5*833e5d42SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*833e5d42SEmmanuel Vadot 7*833e5d42SEmmanuel Vadottitle: Qualcomm Video Clock & Reset Controller on Milos 8*833e5d42SEmmanuel Vadot 9*833e5d42SEmmanuel Vadotmaintainers: 10*833e5d42SEmmanuel Vadot - Luca Weiss <luca.weiss@fairphone.com> 11*833e5d42SEmmanuel Vadot 12*833e5d42SEmmanuel Vadotdescription: | 13*833e5d42SEmmanuel Vadot Qualcomm video clock control module provides the clocks, resets and power 14*833e5d42SEmmanuel Vadot domains on Milos. 15*833e5d42SEmmanuel Vadot 16*833e5d42SEmmanuel Vadot See also: include/dt-bindings/clock/qcom,milos-videocc.h 17*833e5d42SEmmanuel Vadot 18*833e5d42SEmmanuel Vadotproperties: 19*833e5d42SEmmanuel Vadot compatible: 20*833e5d42SEmmanuel Vadot const: qcom,milos-videocc 21*833e5d42SEmmanuel Vadot 22*833e5d42SEmmanuel Vadot clocks: 23*833e5d42SEmmanuel Vadot items: 24*833e5d42SEmmanuel Vadot - description: Board XO source 25*833e5d42SEmmanuel Vadot - description: Board active XO source 26*833e5d42SEmmanuel Vadot - description: Sleep clock source 27*833e5d42SEmmanuel Vadot - description: Video AHB clock from GCC 28*833e5d42SEmmanuel Vadot 29*833e5d42SEmmanuel Vadotrequired: 30*833e5d42SEmmanuel Vadot - compatible 31*833e5d42SEmmanuel Vadot - clocks 32*833e5d42SEmmanuel Vadot 33*833e5d42SEmmanuel VadotallOf: 34*833e5d42SEmmanuel Vadot - $ref: qcom,gcc.yaml# 35*833e5d42SEmmanuel Vadot 36*833e5d42SEmmanuel VadotunevaluatedProperties: false 37*833e5d42SEmmanuel Vadot 38*833e5d42SEmmanuel Vadotexamples: 39*833e5d42SEmmanuel Vadot - | 40*833e5d42SEmmanuel Vadot #include <dt-bindings/clock/qcom,milos-gcc.h> 41*833e5d42SEmmanuel Vadot clock-controller@aaf0000 { 42*833e5d42SEmmanuel Vadot compatible = "qcom,milos-videocc"; 43*833e5d42SEmmanuel Vadot reg = <0x0aaf0000 0x10000>; 44*833e5d42SEmmanuel Vadot clocks = <&bi_tcxo_div2>, 45*833e5d42SEmmanuel Vadot <&bi_tcxo_ao_div2>, 46*833e5d42SEmmanuel Vadot <&sleep_clk>, 47*833e5d42SEmmanuel Vadot <&gcc GCC_VIDEO_AHB_CLK>; 48*833e5d42SEmmanuel Vadot #clock-cells = <1>; 49*833e5d42SEmmanuel Vadot #reset-cells = <1>; 50*833e5d42SEmmanuel Vadot #power-domain-cells = <1>; 51*833e5d42SEmmanuel Vadot }; 52*833e5d42SEmmanuel Vadot 53*833e5d42SEmmanuel Vadot... 54