1*c66ec88fSEmmanuel VadotDevice Tree Clock bindings for cpu clock of Marvell EBU platforms 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible : shall be one of the following: 5*c66ec88fSEmmanuel Vadot "marvell,armada-xp-cpu-clock" - cpu clocks for Armada XP 6*c66ec88fSEmmanuel Vadot "marvell,mv98dx3236-cpu-clock" - cpu clocks for 98DX3236 SoC 7*c66ec88fSEmmanuel Vadot- reg : Address and length of the clock complex register set, followed 8*c66ec88fSEmmanuel Vadot by address and length of the PMU DFS registers 9*c66ec88fSEmmanuel Vadot- #clock-cells : should be set to 1. 10*c66ec88fSEmmanuel Vadot- clocks : shall be the input parent clock phandle for the clock. 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadotcpuclk: clock-complex@d0018700 { 13*c66ec88fSEmmanuel Vadot #clock-cells = <1>; 14*c66ec88fSEmmanuel Vadot compatible = "marvell,armada-xp-cpu-clock"; 15*c66ec88fSEmmanuel Vadot reg = <0xd0018700 0xA0>, <0x1c054 0x10>; 16*c66ec88fSEmmanuel Vadot clocks = <&coreclk 1>; 17*c66ec88fSEmmanuel Vadot} 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel Vadotcpu@0 { 20*c66ec88fSEmmanuel Vadot compatible = "marvell,sheeva-v7"; 21*c66ec88fSEmmanuel Vadot reg = <0>; 22*c66ec88fSEmmanuel Vadot clocks = <&cpuclk 0>; 23*c66ec88fSEmmanuel Vadot}; 24