1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 * 22 * $FreeBSD$ 23 */ 24/* 25 * Copyright 2004 Sun Microsystems, Inc. All rights reserved. 26 * Use is subject to license terms. 27 */ 28 29#define _ASM 30#define _LOCORE 31 32#include <sys/cpuvar_defs.h> 33#include <sys/dtrace.h> 34 35#include <machine/asm.h> 36#include <machine/armreg.h> 37 38#include "assym.inc" 39 40/* 41void dtrace_membar_producer(void) 42*/ 43ENTRY(dtrace_membar_producer) 44 RET 45END(dtrace_membar_producer) 46 47/* 48void dtrace_membar_consumer(void) 49*/ 50ENTRY(dtrace_membar_consumer) 51 RET 52END(dtrace_membar_consumer) 53 54/* 55dtrace_icookie_t dtrace_interrupt_disable(void) 56*/ 57ENTRY(dtrace_interrupt_disable) 58 mrs r0, cpsr 59 mov r1, r0 60 orr r1, r1, #(PSR_I | PSR_F) 61 msr cpsr_c, r1 62 RET 63END(dtrace_interrupt_disable) 64 65/* 66void dtrace_interrupt_enable(dtrace_icookie_t cookie) 67*/ 68ENTRY(dtrace_interrupt_enable) 69 and r0, r0, #(PSR_I | PSR_F) 70 mrs r1, cpsr 71 bic r1, r1, #(PSR_I | PSR_F) 72 orr r1, r1, r0 73 msr cpsr_c, r1 74 RET 75END(dtrace_interrupt_enable) 76/* 77uint8_t 78dtrace_fuword8_nocheck(void *addr) 79*/ 80ENTRY(dtrace_fuword8_nocheck) 81 ldrb r3, [r0] 82 mov r0, r3 83 RET 84END(dtrace_fuword8_nocheck) 85 86/* 87uint16_t 88dtrace_fuword16_nocheck(void *addr) 89*/ 90ENTRY(dtrace_fuword16_nocheck) 91 ldrh r3, [r0] 92 mov r0, r3 93 RET 94END(dtrace_fuword16_nocheck) 95 96/* 97uint32_t 98dtrace_fuword32_nocheck(void *addr) 99*/ 100ENTRY(dtrace_fuword32_nocheck) 101 ldr r3, [r0] 102 mov r0, r3 103 RET 104END(dtrace_fuword32_nocheck) 105 106/* 107uint64_t 108dtrace_fuword64_nocheck(void *addr) 109*/ 110ENTRY(dtrace_fuword64_nocheck) 111 ldm r0, {r2, r3} 112 113 mov r0, r2 114 mov r1, r3 115#if defined(__BIG_ENDIAN__) 116/* big endian */ 117 mov r0, r3 118 mov r1, r2 119#else 120/* little endian */ 121 mov r0, r2 122 mov r1, r3 123 124#endif 125 RET 126END(dtrace_fuword64_nocheck) 127 128/* 129void 130dtrace_copy(uintptr_t uaddr, uintptr_t kaddr, size_t size) 131*/ 132ENTRY(dtrace_copy) 133 stmfd sp!, {r4-r5} /* stack is 8 byte aligned */ 134 teq r2, #0x00000000 135 mov r5, #0x00000000 136 beq 2f 137 1381: ldrb r4, [r0], #0x0001 139 add r5, r5, #0x00000001 140 strb r4, [r1], #0x0001 141 teqne r5, r2 142 bne 1b 143 1442: ldmfd sp!, {r4-r5} /* stack is 8 byte aligned */ 145 RET 146END(dtrace_copy) 147 148/* 149void 150dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size, 151 volatile uint16_t *flags) 152XXX: Check for flags? 153*/ 154ENTRY(dtrace_copystr) 155 stmfd sp!, {r4-r5} /* stack is 8 byte aligned */ 156 teq r2, #0x00000000 157 mov r5, #0x00000000 158 beq 2f 159 1601: ldrb r4, [r0], #0x0001 161 add r5, r5, #0x00000001 162 teq r4, #0x00000000 163 strb r4, [r1], #0x0001 164 teqne r5, r2 165 bne 1b 166 1672: ldmfd sp!, {r4-r5} /* stack is 8 byte aligned */ 168 RET 169END(dtrace_copystr) 170 171/* 172uintptr_t 173dtrace_caller(int aframes) 174*/ 175ENTRY(dtrace_caller) 176 mov r0, #-1 177 RET 178END(dtrace_caller) 179 180/* 181uint32_t 182dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new) 183 184void * 185dtrace_casptr(volatile void *target, volatile void *cmp, volatile void *new) 186*/ 187ENTRY(dtrace_cas32) 188EENTRY(dtrace_casptr) 1891: ldrex r3, [r0] /* Load target */ 190 cmp r3, r1 /* Check if *target == cmp */ 191 bne 2f /* No, return */ 192 strex ip, r2, [r0] /* Store new to target */ 193 cmp ip, #0 /* Did the store succeed? */ 194 bne 1b /* No, try again */ 1952: mov r0, r3 /* Return the value loaded from target */ 196 RET 197EEND(dtrace_casptr) 198END(dtrace_cas32) 199