1 /*- 2 * Copyright (c) 2014 Andrew Turner 3 * Copyright (c) 2014-2015 The FreeBSD Foundation 4 * All rights reserved. 5 * 6 * This software was developed by Andrew Turner under 7 * sponsorship from the FreeBSD Foundation. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef _MACHINE_PTE_H_ 34 #define _MACHINE_PTE_H_ 35 36 #ifndef LOCORE 37 typedef uint64_t pd_entry_t; /* page directory entry */ 38 typedef uint64_t pt_entry_t; /* page table entry */ 39 #endif 40 41 /* Table attributes */ 42 #define TATTR_MASK UINT64_C(0xfff8000000000000) 43 #define TATTR_AP_TABLE_MASK (3UL << 61) 44 #define TATTR_AP_TABLE_RO (2UL << 61) 45 #define TATTR_AP_TABLE_NO_EL0 (1UL << 61) 46 #define TATTR_UXN_TABLE (1UL << 60) 47 #define TATTR_PXN_TABLE (1UL << 59) 48 /* Bits 58:51 are ignored */ 49 50 /* Block and Page attributes */ 51 #define ATTR_MASK_H UINT64_C(0xfffc000000000000) 52 #define ATTR_MASK_L UINT64_C(0x0000000000000fff) 53 #define ATTR_MASK (ATTR_MASK_H | ATTR_MASK_L) 54 55 #define BASE_MASK ~ATTR_MASK 56 #define BASE_ADDR(x) ((x) & BASE_MASK) 57 58 #define PTE_TO_PHYS(pte) BASE_ADDR(pte) 59 /* Convert a phys addr to the output address field of a PTE */ 60 #define PHYS_TO_PTE(pa) (pa) 61 62 /* Bits 58:55 are reserved for software */ 63 #define ATTR_SW_UNUSED1 (1UL << 58) 64 #define ATTR_SW_NO_PROMOTE (1UL << 57) 65 #define ATTR_SW_MANAGED (1UL << 56) 66 #define ATTR_SW_WIRED (1UL << 55) 67 68 #define ATTR_S1_UXN (1UL << 54) 69 #define ATTR_S1_PXN (1UL << 53) 70 #define ATTR_S1_XN (ATTR_S1_PXN | ATTR_S1_UXN) 71 72 #define ATTR_S2_XN(x) ((x) << 53) 73 #define ATTR_S2_XN_MASK ATTR_S2_XN(3UL) 74 #define ATTR_S2_XN_NONE 0UL /* Allow execution at EL0 & EL1 */ 75 #define ATTR_S2_XN_EL1 1UL /* Allow execution at EL0 */ 76 #define ATTR_S2_XN_ALL 2UL /* No execution */ 77 #define ATTR_S2_XN_EL0 3UL /* Allow execution at EL1 */ 78 79 #define ATTR_CONTIGUOUS (1UL << 52) 80 #define ATTR_DBM (1UL << 51) 81 #define ATTR_S1_nG (1 << 11) 82 #define ATTR_AF (1 << 10) 83 #define ATTR_SH(x) ((x) << 8) 84 #define ATTR_SH_MASK ATTR_SH(3) 85 #define ATTR_SH_NS 0 /* Non-shareable */ 86 #define ATTR_SH_OS 2 /* Outer-shareable */ 87 #define ATTR_SH_IS 3 /* Inner-shareable */ 88 89 #define ATTR_S1_AP_RW_BIT (1 << 7) 90 #define ATTR_S1_AP(x) ((x) << 6) 91 #define ATTR_S1_AP_MASK ATTR_S1_AP(3) 92 #define ATTR_S1_AP_RW (0 << 1) 93 #define ATTR_S1_AP_RO (1 << 1) 94 #define ATTR_S1_AP_USER (1 << 0) 95 #define ATTR_S1_NS (1 << 5) 96 #define ATTR_S1_IDX(x) ((x) << 2) 97 #define ATTR_S1_IDX_MASK (7 << 2) 98 99 #define ATTR_S2_S2AP(x) ((x) << 6) 100 #define ATTR_S2_S2AP_MASK 3 101 #define ATTR_S2_S2AP_READ 1 102 #define ATTR_S2_S2AP_WRITE 2 103 104 #define ATTR_S2_MEMATTR(x) ((x) << 2) 105 #define ATTR_S2_MEMATTR_MASK ATTR_S2_MEMATTR(0xf) 106 #define ATTR_S2_MEMATTR_DEVICE_nGnRnE 0x0 107 #define ATTR_S2_MEMATTR_NC 0xf 108 #define ATTR_S2_MEMATTR_WT 0xa 109 #define ATTR_S2_MEMATTR_WB 0xf 110 111 #define ATTR_DEFAULT (ATTR_AF | ATTR_SH(ATTR_SH_IS)) 112 113 #define ATTR_DESCR_MASK 3 114 #define ATTR_DESCR_VALID 1 115 #define ATTR_DESCR_TYPE_MASK 2 116 #define ATTR_DESCR_TYPE_TABLE 2 117 #define ATTR_DESCR_TYPE_PAGE 2 118 #define ATTR_DESCR_TYPE_BLOCK 0 119 120 #if PAGE_SIZE == PAGE_SIZE_4K 121 #define L0_SHIFT 39 122 #define L1_SHIFT 30 123 #define L2_SHIFT 21 124 #define L3_SHIFT 12 125 #elif PAGE_SIZE == PAGE_SIZE_16K 126 #define L0_SHIFT 47 127 #define L1_SHIFT 36 128 #define L2_SHIFT 25 129 #define L3_SHIFT 14 130 #else 131 #error Unsupported page size 132 #endif 133 134 /* Level 0 table, 512GiB/128TiB per entry */ 135 #define L0_SIZE (UINT64_C(1) << L0_SHIFT) 136 #define L0_OFFSET (L0_SIZE - 1ul) 137 #define L0_INVAL 0x0 /* An invalid address */ 138 /* 0x1 Level 0 doesn't support block translation */ 139 /* 0x2 also marks an invalid address */ 140 #define L0_TABLE 0x3 /* A next-level table */ 141 142 /* Level 1 table, 1GiB/64GiB per entry */ 143 #define L1_SIZE (UINT64_C(1) << L1_SHIFT) 144 #define L1_OFFSET (L1_SIZE - 1) 145 #define L1_INVAL L0_INVAL 146 #define L1_BLOCK 0x1 147 #define L1_TABLE L0_TABLE 148 149 /* Level 2 table, 2MiB/32MiB per entry */ 150 #define L2_SIZE (UINT64_C(1) << L2_SHIFT) 151 #define L2_OFFSET (L2_SIZE - 1) 152 #define L2_INVAL L1_INVAL 153 #define L2_BLOCK 0x1 154 #define L2_TABLE L1_TABLE 155 156 /* Level 3 table, 4KiB/16KiB per entry */ 157 #define L3_SIZE (1 << L3_SHIFT) 158 #define L3_OFFSET (L3_SIZE - 1) 159 #define L3_INVAL 0x0 160 /* 0x1 is reserved */ 161 /* 0x2 also marks an invalid address */ 162 #define L3_PAGE 0x3 163 164 #define PMAP_MAPDEV_EARLY_SIZE (L2_SIZE * 8) 165 166 #if PAGE_SIZE == PAGE_SIZE_4K 167 #define L0_ENTRIES_SHIFT 9 168 #define Ln_ENTRIES_SHIFT 9 169 #elif PAGE_SIZE == PAGE_SIZE_16K 170 #define L0_ENTRIES_SHIFT 1 171 #define Ln_ENTRIES_SHIFT 11 172 #else 173 #error Unsupported page size 174 #endif 175 176 #define L0_ENTRIES (1 << L0_ENTRIES_SHIFT) 177 #define L0_ADDR_MASK (L0_ENTRIES - 1) 178 179 #define Ln_ENTRIES (1 << Ln_ENTRIES_SHIFT) 180 #define Ln_ADDR_MASK (Ln_ENTRIES - 1) 181 #define Ln_TABLE_MASK ((1 << 12) - 1) 182 183 #define pmap_l0_index(va) (((va) >> L0_SHIFT) & L0_ADDR_MASK) 184 #define pmap_l1_index(va) (((va) >> L1_SHIFT) & Ln_ADDR_MASK) 185 #define pmap_l2_index(va) (((va) >> L2_SHIFT) & Ln_ADDR_MASK) 186 #define pmap_l3_index(va) (((va) >> L3_SHIFT) & Ln_ADDR_MASK) 187 188 #endif /* !_MACHINE_PTE_H_ */ 189 190 /* End of pte.h */ 191