xref: /freebsd/sys/arm64/coresight/coresight_if.m (revision 8ddb146abcdf061be9f2c0db7e391697dafad85c)
1#-
2# Copyright (c) 2018 Ruslan Bukin <br@bsdpad.com>
3# All rights reserved.
4#
5# This software was developed by SRI International and the University of
6# Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
7# ("CTSRD"), as part of the DARPA CRASH research programme.
8#
9# Redistribution and use in source and binary forms, with or without
10# modification, are permitted provided that the following conditions
11# are met:
12# 1. Redistributions of source code must retain the above copyright
13#    notice, this list of conditions and the following disclaimer.
14# 2. Redistributions in binary form must reproduce the above copyright
15#    notice, this list of conditions and the following disclaimer in the
16#    documentation and/or other materials provided with the distribution.
17#
18# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28# SUCH DAMAGE.
29#
30# $FreeBSD$
31#
32
33#include <machine/bus.h>
34#include <arm64/coresight/coresight.h>
35
36INTERFACE coresight;
37
38METHOD int init {
39	device_t dev;
40};
41
42METHOD int enable {
43	device_t dev;
44	struct endpoint *endp;
45	struct coresight_event *event;
46};
47
48METHOD void disable {
49	device_t dev;
50	struct endpoint *endp;
51	struct coresight_event *event;
52};
53
54METHOD int read {
55	device_t dev;
56	struct endpoint *endp;
57	struct coresight_event *event;
58};
59