xref: /freebsd/sys/arm/nvidia/tegra_ehci.c (revision effa0f6c0aad54a07917af6986d71cd0a57223b8)
1 /*-
2  * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 /*
29  * EHCI driver for Tegra SoCs.
30  */
31 #include "opt_bus.h"
32 #include "opt_platform.h"
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/bus.h>
39 #include <sys/condvar.h>
40 #include <sys/rman.h>
41 
42 #include <machine/bus.h>
43 #include <machine/resource.h>
44 
45 #include <dev/clk/clk.h>
46 #include <dev/hwreset/hwreset.h>
47 #include <dev/phy/phy.h>
48 #include <dev/ofw/ofw_bus.h>
49 #include <dev/ofw/ofw_bus_subr.h>
50 #include <dev/usb/usb.h>
51 #include <dev/usb/usbdi.h>
52 #include <dev/usb/usb_busdma.h>
53 #include <dev/usb/usb_process.h>
54 #include <dev/usb/usb_controller.h>
55 #include <dev/usb/usb_bus.h>
56 #include <dev/usb/controller/ehci.h>
57 #include <dev/usb/controller/ehcireg.h>
58 
59 #include "usbdevs.h"
60 
61 #define	TEGRA_EHCI_REG_OFF	0x100
62 #define	TEGRA_EHCI_REG_SIZE	0x100
63 
64 /* Compatible devices. */
65 #define	TEGRA124_EHCI		1
66 #define	TEGRA210_EHCI		2
67 static struct ofw_compat_data compat_data[] = {
68 	{"nvidia,tegra124-ehci",	(uintptr_t)TEGRA124_EHCI},
69 	{"nvidia,tegra210-ehci",	(uintptr_t)TEGRA210_EHCI},
70 	{NULL,		 	0},
71 };
72 
73 struct tegra_ehci_softc {
74 	ehci_softc_t	ehci_softc;
75 	device_t	dev;
76 	struct resource	*ehci_mem_res;	/* EHCI core regs. */
77 	struct resource	*ehci_irq_res;	/* EHCI core IRQ. */
78 	int		usb_alloc_called;
79 	clk_t		clk;
80 	phy_t 		phy;
81 	hwreset_t 	reset;
82 };
83 
84 static void
85 tegra_ehci_post_reset(struct ehci_softc *ehci_softc)
86 {
87 	uint32_t usbmode;
88 
89 	/* Force HOST mode. */
90 	usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_LPM);
91 	usbmode &= ~EHCI_UM_CM;
92 	usbmode |= EHCI_UM_CM_HOST;
93 	device_printf(ehci_softc->sc_bus.bdev, "set host controller mode\n");
94 	EOWRITE4(ehci_softc, EHCI_USBMODE_LPM, usbmode);
95 }
96 
97 static int
98 tegra_ehci_probe(device_t dev)
99 {
100 
101 	if (!ofw_bus_status_okay(dev))
102 		return (ENXIO);
103 
104 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) {
105 		device_set_desc(dev, "Nvidia Tegra EHCI controller");
106 		return (BUS_PROBE_DEFAULT);
107 	}
108 	return (ENXIO);
109 }
110 
111 static int
112 tegra_ehci_detach(device_t dev)
113 {
114 	struct tegra_ehci_softc *sc;
115 	ehci_softc_t *esc;
116 
117 	sc = device_get_softc(dev);
118 
119 	esc = &sc->ehci_softc;
120 	if (sc->clk != NULL)
121 		clk_release(sc->clk);
122 	if (esc->sc_bus.bdev != NULL)
123 		device_delete_child(dev, esc->sc_bus.bdev);
124 	if (esc->sc_flags & EHCI_SCFLG_DONEINIT)
125 		ehci_detach(esc);
126 	if (esc->sc_intr_hdl != NULL)
127 		bus_teardown_intr(dev, esc->sc_irq_res,
128 		    esc->sc_intr_hdl);
129 	if (sc->ehci_irq_res != NULL)
130 		bus_release_resource(dev, SYS_RES_IRQ, 0,
131 		    sc->ehci_irq_res);
132 	if (sc->ehci_mem_res != NULL)
133 		bus_release_resource(dev, SYS_RES_MEMORY, 0,
134 		    sc->ehci_mem_res);
135 	if (sc->usb_alloc_called)
136 		usb_bus_mem_free_all(&esc->sc_bus, &ehci_iterate_hw_softc);
137 
138 	/* During module unload there are lots of children leftover. */
139 	device_delete_children(dev);
140 
141 	return (0);
142 }
143 
144 static int
145 tegra_ehci_attach(device_t dev)
146 {
147 	struct tegra_ehci_softc *sc;
148 	ehci_softc_t *esc;
149 	int rv, rid;
150 	uint64_t freq;
151 
152 	sc = device_get_softc(dev);
153 	sc->dev = dev;
154 	esc = &sc->ehci_softc;
155 
156 	/* Allocate resources. */
157 	rid = 0;
158 	sc->ehci_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
159 	    RF_ACTIVE | RF_SHAREABLE);
160 	if (sc->ehci_mem_res == NULL) {
161 		device_printf(dev, "Cannot allocate memory resources\n");
162 		rv = ENXIO;
163 		goto out;
164 	}
165 
166 	rid = 0;
167 	sc->ehci_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
168 	    RF_ACTIVE);
169 	if (sc->ehci_irq_res == NULL) {
170 		device_printf(dev, "Cannot allocate IRQ resources\n");
171 		rv = ENXIO;
172 		goto out;
173 	}
174 
175 	rv = hwreset_get_by_ofw_name(dev, 0, "usb", &sc->reset);
176 	if (rv != 0) {
177 		device_printf(dev, "Cannot get reset\n");
178 		rv = ENXIO;
179 		goto out;
180 	}
181 
182 	rv = phy_get_by_ofw_property(sc->dev, 0, "nvidia,phy", &sc->phy);
183 	if (rv != 0) {
184 		device_printf(sc->dev, "Cannot get 'nvidia,phy' phy\n");
185 		rv = ENXIO;
186 		goto out;
187 	}
188 
189 	rv = clk_get_by_ofw_index(sc->dev, 0, 0, &sc->clk);
190 	if (rv != 0) {
191 		device_printf(dev, "Cannot get clock\n");
192 		goto out;
193 	}
194 
195 	rv = clk_enable(sc->clk);
196 	if (rv != 0) {
197 		device_printf(dev, "Cannot enable clock\n");
198 		goto out;
199 	}
200 
201 	freq = 0;
202 	rv = clk_get_freq(sc->clk, &freq);
203 	if (rv != 0) {
204 		device_printf(dev, "Cannot get clock frequency\n");
205 		goto out;
206 	}
207 
208 	rv = hwreset_deassert(sc->reset);
209 	if (rv != 0) {
210 		device_printf(dev, "Cannot clear reset: %d\n", rv);
211 		rv = ENXIO;
212 		goto out;
213 	}
214 
215 	rv = phy_enable(sc->phy);
216 	if (rv != 0) {
217 		device_printf(dev, "Cannot enable phy: %d\n", rv);
218 		goto out;
219 	}
220 
221 	/* Fill data for EHCI driver. */
222 	esc->sc_vendor_get_port_speed = ehci_get_port_speed_hostc;
223 	esc->sc_vendor_post_reset = tegra_ehci_post_reset;
224 	esc->sc_io_tag = rman_get_bustag(sc->ehci_mem_res);
225 	esc->sc_bus.parent = dev;
226 	esc->sc_bus.devices = esc->sc_devices;
227 	esc->sc_bus.devices_max = EHCI_MAX_DEVICES;
228 	esc->sc_bus.dma_bits = 32;
229 
230 	/* Allocate all DMA memory. */
231 	rv = usb_bus_mem_alloc_all(&esc->sc_bus, USB_GET_DMA_TAG(dev),
232 	    &ehci_iterate_hw_softc);
233 	sc->usb_alloc_called = 1;
234 	if (rv != 0) {
235 		device_printf(dev, "usb_bus_mem_alloc_all() failed\n");
236 		rv = ENOMEM;
237 		goto out;
238 	}
239 
240 	/*
241 	 * Set handle to USB related registers subregion used by
242 	 * generic EHCI driver.
243 	 */
244 	rv = bus_space_subregion(esc->sc_io_tag,
245 	    rman_get_bushandle(sc->ehci_mem_res),
246 	    TEGRA_EHCI_REG_OFF, TEGRA_EHCI_REG_SIZE, &esc->sc_io_hdl);
247 	if (rv != 0) {
248 		device_printf(dev, "Could not create USB memory subregion\n");
249 		rv = ENXIO;
250 		goto out;
251 	}
252 
253 	/* Setup interrupt handler. */
254 	rv = bus_setup_intr(dev, sc->ehci_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
255 	    NULL, (driver_intr_t *)ehci_interrupt, esc, &esc->sc_intr_hdl);
256 	if (rv != 0) {
257 		device_printf(dev, "Could not setup IRQ\n");
258 		goto out;
259 	}
260 
261 	/* Add USB bus device. */
262 	esc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
263 	if (esc->sc_bus.bdev == NULL) {
264 		device_printf(dev, "Could not add USB device\n");
265 		goto out;
266 	}
267 	device_set_ivars(esc->sc_bus.bdev, &esc->sc_bus);
268 
269 	esc->sc_id_vendor = USB_VENDOR_FREESCALE;
270 	strlcpy(esc->sc_vendor, "Nvidia", sizeof(esc->sc_vendor));
271 
272 	/* Set flags that affect ehci_init() behavior. */
273 	esc->sc_flags |= EHCI_SCFLG_TT;
274 	esc->sc_flags |= EHCI_SCFLG_NORESTERM;
275 	rv = ehci_init(esc);
276 	if (rv != 0) {
277 		device_printf(dev, "USB init failed: %d\n",
278 		    rv);
279 		goto out;
280 	}
281 	esc->sc_flags |= EHCI_SCFLG_DONEINIT;
282 
283 	/* Probe the bus. */
284 	rv = device_probe_and_attach(esc->sc_bus.bdev);
285 	if (rv != 0) {
286 		device_printf(dev,
287 		    "device_probe_and_attach() failed\n");
288 		goto out;
289 	}
290 	return (0);
291 
292 out:
293 	tegra_ehci_detach(dev);
294 	return (rv);
295 }
296 
297 static device_method_t ehci_methods[] = {
298 	/* Device interface */
299 	DEVMETHOD(device_probe, tegra_ehci_probe),
300 	DEVMETHOD(device_attach, tegra_ehci_attach),
301 	DEVMETHOD(device_detach, tegra_ehci_detach),
302 	DEVMETHOD(device_suspend, bus_generic_suspend),
303 	DEVMETHOD(device_resume, bus_generic_resume),
304 	DEVMETHOD(device_shutdown, bus_generic_shutdown),
305 
306 	/* Bus interface */
307 	DEVMETHOD(bus_print_child, bus_generic_print_child),
308 
309 	DEVMETHOD_END
310 };
311 
312 static DEFINE_CLASS_0(ehci, ehci_driver, ehci_methods,
313     sizeof(struct tegra_ehci_softc));
314 DRIVER_MODULE(tegra_ehci, simplebus, ehci_driver, NULL, NULL);
315 MODULE_DEPEND(tegra_ehci, usb, 1, 1, 1);
316