1356c50adSEmmanuel Vadot /*- 2356c50adSEmmanuel Vadot * Copyright (c) 2016 Emmanuel Vadot <manu@freebsd.org> 3356c50adSEmmanuel Vadot * 4356c50adSEmmanuel Vadot * Redistribution and use in source and binary forms, with or without 5356c50adSEmmanuel Vadot * modification, are permitted provided that the following conditions 6356c50adSEmmanuel Vadot * are met: 7356c50adSEmmanuel Vadot * 1. Redistributions of source code must retain the above copyright 8356c50adSEmmanuel Vadot * notice, this list of conditions and the following disclaimer. 9356c50adSEmmanuel Vadot * 2. Redistributions in binary form must reproduce the above copyright 10356c50adSEmmanuel Vadot * notice, this list of conditions and the following disclaimer in the 11356c50adSEmmanuel Vadot * documentation and/or other materials provided with the distribution. 12356c50adSEmmanuel Vadot * 13356c50adSEmmanuel Vadot * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14356c50adSEmmanuel Vadot * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15356c50adSEmmanuel Vadot * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16356c50adSEmmanuel Vadot * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17356c50adSEmmanuel Vadot * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18356c50adSEmmanuel Vadot * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19356c50adSEmmanuel Vadot * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20356c50adSEmmanuel Vadot * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21356c50adSEmmanuel Vadot * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22356c50adSEmmanuel Vadot * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23356c50adSEmmanuel Vadot * SUCH DAMAGE. 24356c50adSEmmanuel Vadot * 25356c50adSEmmanuel Vadot */ 26356c50adSEmmanuel Vadot 27356c50adSEmmanuel Vadot #include <sys/param.h> 28356c50adSEmmanuel Vadot #include <sys/systm.h> 29356c50adSEmmanuel Vadot #include <sys/kernel.h> 30356c50adSEmmanuel Vadot #include <sys/types.h> 31356c50adSEmmanuel Vadot 32356c50adSEmmanuel Vadot #include <arm/allwinner/allwinner_pinctrl.h> 33356c50adSEmmanuel Vadot 34356c50adSEmmanuel Vadot #ifdef SOC_ALLWINNER_A13 35356c50adSEmmanuel Vadot 36356c50adSEmmanuel Vadot const static struct allwinner_pins a13_pins[] = { 37356c50adSEmmanuel Vadot {"PB0", 1, 0, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}}, 38356c50adSEmmanuel Vadot {"PB1", 1, 1, {"gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, NULL, NULL}}, 39*d07cc22bSEmmanuel Vadot {"PB2", 1, 2, {"gpio_in", "gpio_out", "pwm", NULL, NULL, NULL, "pb_eint16", NULL}, 6, 16, 0}, 40*d07cc22bSEmmanuel Vadot {"PB3", 1, 3, {"gpio_in", "gpio_out", "ir0", NULL, NULL, NULL, "pb_eint17", NULL}, 6, 17, 0}, 41*d07cc22bSEmmanuel Vadot {"PB4", 1, 4, {"gpio_in", "gpio_out", "ir0", NULL, NULL, NULL, "pb_eint18", NULL}, 6, 18, 0}, 42*d07cc22bSEmmanuel Vadot {"PB10", 1, 10, {"gpio_in", "gpio_out", "spi2", NULL, NULL, NULL, "pb_eint24", NULL}, 6, 24, 0}, 43356c50adSEmmanuel Vadot {"PB15", 1, 15, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}}, 44356c50adSEmmanuel Vadot {"PB16", 1, 16, {"gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, NULL, NULL}}, 45356c50adSEmmanuel Vadot {"PB17", 1, 17, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}}, 46356c50adSEmmanuel Vadot {"PB18", 1, 18, {"gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, NULL, NULL}}, 47356c50adSEmmanuel Vadot 48356c50adSEmmanuel Vadot {"PC0", 2, 0, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}}, 49356c50adSEmmanuel Vadot {"PC1", 2, 1, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}}, 50356c50adSEmmanuel Vadot {"PC2", 2, 2, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}}, 51356c50adSEmmanuel Vadot {"PC3", 2, 3, {"gpio_in", "gpio_out", "nand", "spi0", NULL, NULL, NULL, NULL}}, 52356c50adSEmmanuel Vadot {"PC4", 2, 4, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}}, 53356c50adSEmmanuel Vadot {"PC5", 2, 5, {"gpio_in", "gpio_out", "nand", NULL, NULL, NULL, NULL, NULL}}, 54356c50adSEmmanuel Vadot {"PC6", 2, 6, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}}, 55356c50adSEmmanuel Vadot {"PC7", 2, 7, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}}, 56356c50adSEmmanuel Vadot {"PC8", 2, 8, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}}, 57356c50adSEmmanuel Vadot {"PC9", 2, 9, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}}, 58356c50adSEmmanuel Vadot {"PC10", 2, 10, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}}, 59356c50adSEmmanuel Vadot {"PC11", 2, 11, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}}, 60356c50adSEmmanuel Vadot {"PC12", 2, 12, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}}, 61356c50adSEmmanuel Vadot {"PC13", 2, 13, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}}, 62356c50adSEmmanuel Vadot {"PC14", 2, 14, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}}, 63356c50adSEmmanuel Vadot {"PC15", 2, 15, {"gpio_in", "gpio_out", "nand", "mmc2", NULL, NULL, NULL, NULL}}, 64356c50adSEmmanuel Vadot {"PC19", 2, 19, {"gpio_in", "gpio_out", "nand", NULL, "uart3", NULL, NULL, NULL}}, 65356c50adSEmmanuel Vadot 66356c50adSEmmanuel Vadot {"PD2", 3, 2, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 67356c50adSEmmanuel Vadot {"PD3", 3, 3, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 68356c50adSEmmanuel Vadot {"PD4", 3, 4, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 69356c50adSEmmanuel Vadot {"PD5", 3, 5, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 70356c50adSEmmanuel Vadot {"PD6", 3, 6, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 71356c50adSEmmanuel Vadot {"PD7", 3, 7, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 72356c50adSEmmanuel Vadot {"PD10", 3, 10, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 73356c50adSEmmanuel Vadot {"PD11", 3, 11, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 74356c50adSEmmanuel Vadot {"PD12", 3, 12, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 75356c50adSEmmanuel Vadot {"PD13", 3, 13, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 76356c50adSEmmanuel Vadot {"PD14", 3, 14, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 77356c50adSEmmanuel Vadot {"PD15", 3, 15, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 78356c50adSEmmanuel Vadot {"PD18", 3, 18, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 79356c50adSEmmanuel Vadot {"PD19", 3, 19, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 80356c50adSEmmanuel Vadot {"PD20", 3, 20, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 81356c50adSEmmanuel Vadot {"PD21", 3, 21, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 82356c50adSEmmanuel Vadot {"PD22", 3, 22, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 83356c50adSEmmanuel Vadot {"PD23", 3, 23, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 84356c50adSEmmanuel Vadot {"PD24", 3, 24, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 85356c50adSEmmanuel Vadot {"PD25", 3, 25, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 86356c50adSEmmanuel Vadot {"PD26", 3, 26, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 87356c50adSEmmanuel Vadot {"PD27", 3, 27, {"gpio_in", "gpio_out", "lcd0", NULL, NULL, NULL, NULL, NULL}}, 88356c50adSEmmanuel Vadot 89*d07cc22bSEmmanuel Vadot {"PE0", 4, 0, {"gpio_in", NULL, NULL, "csi0", "spi2", NULL, "pe_eint14", NULL}, 6, 14, 0}, 90*d07cc22bSEmmanuel Vadot {"PE1", 4, 1, {"gpio_in", NULL, NULL, "csi0", "spi2", NULL, "pe_eint15", NULL}, 6, 15, 0}, 91356c50adSEmmanuel Vadot {"PE2", 4, 2, {"gpio_in", NULL, NULL, "csi0", "spi2", NULL, NULL, NULL}}, 92356c50adSEmmanuel Vadot {"PE3", 4, 3, {"gpio_in", "gpio_out", NULL, "csi0", "spi2", NULL, NULL, NULL}}, 93356c50adSEmmanuel Vadot {"PE4", 4, 4, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}}, 94356c50adSEmmanuel Vadot {"PE5", 4, 5, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}}, 95356c50adSEmmanuel Vadot {"PE6", 4, 6, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}}, 96356c50adSEmmanuel Vadot {"PE7", 4, 7, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}}, 97356c50adSEmmanuel Vadot {"PE8", 4, 8, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}}, 98356c50adSEmmanuel Vadot {"PE9", 4, 9, {"gpio_in", "gpio_out", NULL, "csi0", "mmc2", NULL, NULL, NULL}}, 99356c50adSEmmanuel Vadot {"PE10", 4, 10, {"gpio_in", "gpio_out", NULL, "csi0", "uart1", NULL, NULL, NULL}}, 100356c50adSEmmanuel Vadot {"PE11", 4, 11, {"gpio_in", "gpio_out", NULL, "csi0", "uart1", NULL, NULL, NULL}}, 101356c50adSEmmanuel Vadot 102356c50adSEmmanuel Vadot {"PF0", 5, 0, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}}, 103356c50adSEmmanuel Vadot {"PF1", 5, 1, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}}, 104356c50adSEmmanuel Vadot {"PF2", 5, 2, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}}, 105356c50adSEmmanuel Vadot {"PF3", 5, 3, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}}, 106356c50adSEmmanuel Vadot {"PF4", 5, 4, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}}, 107356c50adSEmmanuel Vadot {"PF5", 5, 5, {"gpio_in", "gpio_out", "mmc0", NULL, NULL, NULL, NULL, NULL}}, 108356c50adSEmmanuel Vadot 109*d07cc22bSEmmanuel Vadot {"PG0", 6, 0, {"gpio_in", NULL, NULL, NULL, NULL, NULL, "pg_eint0", NULL}, 6, 0, 6}, 110*d07cc22bSEmmanuel Vadot {"PG1", 6, 1, {"gpio_in", NULL, NULL, NULL, NULL, NULL, "pg_eint1", NULL}, 6, 1, 6}, 111*d07cc22bSEmmanuel Vadot {"PG2", 6, 2, {"gpio_in", NULL, NULL, NULL, NULL, NULL, "pg_eint2", NULL}, 6, 2, 6}, 112*d07cc22bSEmmanuel Vadot {"PG3", 6, 3, {"gpio_in", "gpio_out", "mmc1", NULL, "uart1", NULL, "pg_eint3", NULL}, 6, 3, 0}, 113*d07cc22bSEmmanuel Vadot {"PG4", 6, 4, {"gpio_in", "gpio_out", "mmc1", NULL, "uart1", NULL, "pg_eint4", NULL}, 6, 4, 0}, 114*d07cc22bSEmmanuel Vadot {"PG9", 6, 9, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "pg_eint9", NULL}, 6, 9, 0}, 115*d07cc22bSEmmanuel Vadot {"PG10", 6, 10, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "pg_eint10", NULL}, 6, 10, 0}, 116*d07cc22bSEmmanuel Vadot {"PG11", 6, 11, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "pg_eint11", NULL}, 6, 11, 0}, 117*d07cc22bSEmmanuel Vadot {"PG12", 6, 12, {"gpio_in", "gpio_out", "spi1", "uart3", NULL, NULL, "pg_eint12", NULL}, 6, 12, 0}, 118356c50adSEmmanuel Vadot }; 119356c50adSEmmanuel Vadot 120356c50adSEmmanuel Vadot const struct allwinner_padconf a13_padconf = { 121356c50adSEmmanuel Vadot .npins = sizeof(a13_pins) / sizeof(struct allwinner_pins), 122356c50adSEmmanuel Vadot .pins = a13_pins, 123356c50adSEmmanuel Vadot }; 124356c50adSEmmanuel Vadot 125356c50adSEmmanuel Vadot #endif /* SOC_ALLWINNER_A13 */ 126