xref: /freebsd/sys/amd64/include/ieeefp.h (revision a50079b7ff232bbc45443ec0f1763fd449cea9a8)
1 /*-
2  * Copyright (c) 2003 Peter Wemm.
3  * Copyright (c) 1990 Andrew Moore, Talke Studio
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by the University of
17  *	California, Berkeley and its contributors.
18  * 4. Neither the name of the University nor the names of its contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  * 	from: @(#) ieeefp.h 	1.0 (Berkeley) 9/23/93
35  * $FreeBSD$
36  */
37 
38 #ifndef _MACHINE_IEEEFP_H_
39 #define _MACHINE_IEEEFP_H_
40 
41 /*
42  * Deprecated historical FPU control interface
43  *
44  * IEEE floating point type, constant and function definitions.
45  * XXX: {FP,SSE}*FLD and {FP,SSE}*OFF are undocumented pollution.
46  */
47 
48 #ifndef _SYS_CDEFS_H_
49 #error this file needs sys/cdefs.h as a prerequisite
50 #endif
51 
52 /*
53  * Rounding modes.
54  */
55 typedef enum {
56 	FP_RN=0,	/* round to nearest */
57 	FP_RM,		/* round down towards minus infinity */
58 	FP_RP,		/* round up towards plus infinity */
59 	FP_RZ		/* truncate */
60 } fp_rnd_t;
61 
62 /*
63  * Precision (i.e., rounding precision) modes.
64  */
65 typedef enum {
66 	FP_PS=0,	/* 24 bit (single-precision) */
67 	FP_PRS,		/* reserved */
68 	FP_PD,		/* 53 bit (double-precision) */
69 	FP_PE		/* 64 bit (extended-precision) */
70 } fp_prec_t;
71 
72 #define fp_except_t	int
73 
74 /*
75  * Exception bit masks.
76  */
77 #define FP_X_INV	0x01	/* invalid operation */
78 #define FP_X_DNML	0x02	/* denormal */
79 #define FP_X_DZ		0x04	/* zero divide */
80 #define FP_X_OFL	0x08	/* overflow */
81 #define FP_X_UFL	0x10	/* underflow */
82 #define FP_X_IMP	0x20	/* (im)precision */
83 #define FP_X_STK	0x40	/* stack fault */
84 
85 /*
86  * FPU control word bit-field masks.
87  */
88 #define FP_MSKS_FLD	0x3f	/* exception masks field */
89 #define FP_PRC_FLD	0x300	/* precision control field */
90 #define	FP_RND_FLD	0xc00	/* rounding control field */
91 
92 /*
93  * FPU status word bit-field masks.
94  */
95 #define FP_STKY_FLD	0x3f	/* sticky flags field */
96 
97 /*
98  * SSE mxcsr register bit-field masks.
99  */
100 #define	SSE_STKY_FLD	0x3f	/* exception flags */
101 #define	SSE_DAZ_FLD	0x40	/* Denormals are zero */
102 #define	SSE_MSKS_FLD	0x1f80	/* exception masks field */
103 #define	SSE_RND_FLD	0x6000	/* rounding control */
104 #define	SSE_FZ_FLD	0x8000	/* flush to zero on underflow */
105 
106 /*
107  * FPU control word bit-field offsets (shift counts).
108  */
109 #define FP_MSKS_OFF	0	/* exception masks offset */
110 #define FP_PRC_OFF	8	/* precision control offset */
111 #define	FP_RND_OFF	10	/* rounding control offset */
112 
113 /*
114  * FPU status word bit-field offsets (shift counts).
115  */
116 #define FP_STKY_OFF	0	/* sticky flags offset */
117 
118 /*
119  * SSE mxcsr register bit-field offsets (shift counts).
120  */
121 #define	SSE_STKY_OFF	0	/* exception flags offset */
122 #define	SSE_DAZ_OFF	6	/* DAZ exception mask offset */
123 #define	SSE_MSKS_OFF	7	/* other exception masks offset */
124 #define	SSE_RND_OFF	13	/* rounding control offset */
125 #define	SSE_FZ_OFF	15	/* flush to zero offset */
126 
127 #ifdef __GNUCLIKE_ASM
128 
129 #define	__fldcw(addr)	__asm __volatile("fldcw %0" : : "m" (*(addr)))
130 #define	__fldenv(addr)	__asm __volatile("fldenv %0" : : "m" (*(addr)))
131 #define	__fnstcw(addr)	__asm __volatile("fnstcw %0" : "=m" (*(addr)))
132 #define	__fnstenv(addr)	__asm __volatile("fnstenv %0" : "=m" (*(addr)))
133 #define	__fnstsw(addr)	__asm __volatile("fnstsw %0" : "=m" (*(addr)))
134 #define	__ldmxcsr(addr)	__asm __volatile("ldmxcsr %0" : : "m" (*(addr)))
135 #define	__stmxcsr(addr)	__asm __volatile("stmxcsr %0" : "=m" (*(addr)))
136 
137 /*
138  * Load the control word.  Be careful not to trap if there is a currently
139  * unmasked exception (ones that will become freshly unmasked are not a
140  * problem).  This case must be handled by a save/restore of the
141  * environment or even of the full x87 state.  Accessing the environment
142  * is very inefficient, so only do it when necessary.
143  */
144 static __inline void
145 __fnldcw(unsigned short _cw, unsigned short _newcw)
146 {
147 	struct {
148 		unsigned _cw;
149 		unsigned _other[6];
150 	} _env;
151 	unsigned short _sw;
152 
153 	if ((_cw & FP_MSKS_FLD) != FP_MSKS_FLD) {
154 		__fnstsw(&_sw);
155 		if (((_sw & ~_cw) & FP_STKY_FLD) != 0) {
156 			__fnstenv(&_env);
157 			_env._cw = _newcw;
158 			__fldenv(&_env);
159 			return;
160 		}
161 	}
162 	__fldcw(&_newcw);
163 }
164 
165 /*
166  * General notes about conflicting SSE vs FP status bits.
167  * This code assumes that software will not fiddle with the control
168  * bits of the SSE and x87 in such a way to get them out of sync and
169  * still expect this to work.  Break this at your peril.
170  * Because I based this on the i386 port, the x87 state is used for
171  * the fpget*() functions, and is shadowed into the SSE state for
172  * the fpset*() functions.  For dual source fpget*() functions, I
173  * merge the two together.  I think.
174  */
175 
176 static __inline fp_rnd_t
177 __fpgetround(void)
178 {
179 	unsigned short _cw;
180 
181 	__fnstcw(&_cw);
182 	return ((fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF));
183 }
184 
185 static __inline fp_rnd_t
186 __fpsetround(fp_rnd_t _m)
187 {
188 	fp_rnd_t _p;
189 	unsigned _mxcsr;
190 	unsigned short _cw, _newcw;
191 
192 	__fnstcw(&_cw);
193 	_p = (fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF);
194 	_newcw = _cw & ~FP_RND_FLD;
195 	_newcw |= (_m << FP_RND_OFF) & FP_RND_FLD;
196 	__fnldcw(_cw, _newcw);
197 	__stmxcsr(&_mxcsr);
198 	_mxcsr &= ~SSE_RND_FLD;
199 	_mxcsr |= (_m << SSE_RND_OFF) & SSE_RND_FLD;
200 	__ldmxcsr(&_mxcsr);
201 	return (_p);
202 }
203 
204 /*
205  * Get or set the rounding precision for x87 arithmetic operations.
206  * There is no equivalent SSE mode or control.
207  */
208 
209 static __inline fp_prec_t
210 __fpgetprec(void)
211 {
212 	unsigned short _cw;
213 
214 	__fnstcw(&_cw);
215 	return ((fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF));
216 }
217 
218 static __inline fp_prec_t
219 __fpsetprec(fp_prec_t _m)
220 {
221 	fp_prec_t _p;
222 	unsigned short _cw, _newcw;
223 
224 	__fnstcw(&_cw);
225 	_p = (fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF);
226 	_newcw = _cw & ~FP_PRC_FLD;
227 	_newcw |= (_m << FP_PRC_OFF) & FP_PRC_FLD;
228 	__fnldcw(_cw, _newcw);
229 	return (_p);
230 }
231 
232 /*
233  * Get or set the exception mask.
234  * Note that the x87 mask bits are inverted by the API -- a mask bit of 1
235  * means disable for x87 and SSE, but for fp*mask() it means enable.
236  */
237 
238 static __inline fp_except_t
239 __fpgetmask(void)
240 {
241 	unsigned short _cw;
242 
243 	__fnstcw(&_cw);
244 	return ((~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF);
245 }
246 
247 static __inline fp_except_t
248 __fpsetmask(fp_except_t _m)
249 {
250 	fp_except_t _p;
251 	unsigned _mxcsr;
252 	unsigned short _cw, _newcw;
253 
254 	__fnstcw(&_cw);
255 	_p = (~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF;
256 	_newcw = _cw & ~FP_MSKS_FLD;
257 	_newcw |= (~_m << FP_MSKS_OFF) & FP_MSKS_FLD;
258 	__fnldcw(_cw, _newcw);
259 	__stmxcsr(&_mxcsr);
260 	/* XXX should we clear non-ieee SSE_DAZ_FLD and SSE_FZ_FLD ? */
261 	_mxcsr &= ~SSE_MSKS_FLD;
262 	_mxcsr |= (~_m << SSE_MSKS_OFF) & SSE_MSKS_FLD;
263 	__ldmxcsr(&_mxcsr);
264 	return (_p);
265 }
266 
267 static __inline fp_except_t
268 __fpgetsticky(void)
269 {
270 	unsigned _ex, _mxcsr;
271 	unsigned short _sw;
272 
273 	__fnstsw(&_sw);
274 	_ex = (_sw & FP_STKY_FLD) >> FP_STKY_OFF;
275 	__stmxcsr(&_mxcsr);
276 	_ex |= (_mxcsr & SSE_STKY_FLD) >> SSE_STKY_OFF;
277 	return ((fp_except_t)_ex);
278 }
279 
280 #endif /* __GNUCLIKE_ASM */
281 
282 #if !defined(__IEEEFP_NOINLINES__) && defined(__GNUCLIKE_ASM)
283 
284 #define	fpgetmask()	__fpgetmask()
285 #define	fpgetprec()	__fpgetprec()
286 #define	fpgetround()	__fpgetround()
287 #define	fpgetsticky()	__fpgetsticky()
288 #define	fpsetmask(m)	__fpsetmask(m)
289 #define	fpsetprec(m)	__fpsetprec(m)
290 #define	fpsetround(m)	__fpsetround(m)
291 
292 #else /* !(!__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM) */
293 
294 /* Augment the userland declarations. */
295 __BEGIN_DECLS
296 extern fp_rnd_t    fpgetround(void);
297 extern fp_rnd_t    fpsetround(fp_rnd_t);
298 extern fp_except_t fpgetmask(void);
299 extern fp_except_t fpsetmask(fp_except_t);
300 extern fp_except_t fpgetsticky(void);
301 extern fp_except_t fpsetsticky(fp_except_t);
302 fp_prec_t	fpgetprec(void);
303 fp_prec_t	fpsetprec(fp_prec_t);
304 __END_DECLS
305 
306 #endif /* !__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM */
307 
308 #endif /* !_MACHINE_IEEEFP_H_ */
309