1 /*- 2 * Copyright (c) 1993 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $Id: cpufunc.h,v 1.63 1997/04/26 11:45:36 peter Exp $ 34 */ 35 36 /* 37 * Functions to provide access to special i386 instructions. 38 */ 39 40 #ifndef _MACHINE_CPUFUNC_H_ 41 #define _MACHINE_CPUFUNC_H_ 42 43 #include <sys/cdefs.h> 44 #include <sys/types.h> 45 #include <machine/smp.h> 46 47 #ifdef KERNEL 48 #include "opt_smp.h" 49 #include "opt_smp_invltlb.h" 50 #endif 51 52 #ifdef __GNUC__ 53 54 static __inline void 55 breakpoint(void) 56 { 57 __asm __volatile("int $3"); 58 } 59 60 static __inline void 61 disable_intr(void) 62 { 63 __asm __volatile("cli" : : : "memory"); 64 } 65 66 static __inline void 67 enable_intr(void) 68 { 69 __asm __volatile("sti"); 70 } 71 72 #define HAVE_INLINE_FFS 73 74 static __inline int 75 ffs(int mask) 76 { 77 int result; 78 /* 79 * bsfl turns out to be not all that slow on 486's. It can beaten 80 * using a binary search to reduce to 4 bits and then a table lookup, 81 * but only if the code is inlined and in the cache, and the code 82 * is quite large so inlining it probably busts the cache. 83 * 84 * Note that gcc-2's builtin ffs would be used if we didn't declare 85 * this inline or turn off the builtin. The builtin is faster but 86 * broken in gcc-2.4.5 and slower but working in gcc-2.5 and 2.6. 87 */ 88 __asm __volatile("testl %0,%0; je 1f; bsfl %0,%0; incl %0; 1:" 89 : "=r" (result) : "0" (mask)); 90 return (result); 91 } 92 93 #define HAVE_INLINE_FLS 94 95 static __inline int 96 fls(int mask) 97 { 98 int result; 99 __asm __volatile("testl %0,%0; je 1f; bsrl %0,%0; incl %0; 1:" 100 : "=r" (result) : "0" (mask)); 101 return (result); 102 } 103 104 #if __GNUC__ < 2 105 106 #define inb(port) inbv(port) 107 #define outb(port, data) outbv(port, data) 108 109 #else /* __GNUC >= 2 */ 110 111 /* 112 * The following complications are to get around gcc not having a 113 * constraint letter for the range 0..255. We still put "d" in the 114 * constraint because "i" isn't a valid constraint when the port 115 * isn't constant. This only matters for -O0 because otherwise 116 * the non-working version gets optimized away. 117 * 118 * Use an expression-statement instead of a conditional expression 119 * because gcc-2.6.0 would promote the operands of the conditional 120 * and produce poor code for "if ((inb(var) & const1) == const2)". 121 * 122 * The unnecessary test `(port) < 0x10000' is to generate a warning if 123 * the `port' has type u_short or smaller. Such types are pessimal. 124 * This actually only works for signed types. The range check is 125 * careful to avoid generating warnings. 126 */ 127 #define inb(port) __extension__ ({ \ 128 u_char _data; \ 129 if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 130 && (port) < 0x10000) \ 131 _data = inbc(port); \ 132 else \ 133 _data = inbv(port); \ 134 _data; }) 135 136 #define outb(port, data) ( \ 137 __builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ 138 && (port) < 0x10000 \ 139 ? outbc(port, data) : outbv(port, data)) 140 141 static __inline u_char 142 inbc(u_int port) 143 { 144 u_char data; 145 146 __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port))); 147 return (data); 148 } 149 150 static __inline void 151 outbc(u_int port, u_char data) 152 { 153 __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port))); 154 } 155 156 #endif /* __GNUC <= 2 */ 157 158 static __inline u_char 159 inbv(u_int port) 160 { 161 u_char data; 162 /* 163 * We use %%dx and not %1 here because i/o is done at %dx and not at 164 * %edx, while gcc generates inferior code (movw instead of movl) 165 * if we tell it to load (u_short) port. 166 */ 167 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 168 return (data); 169 } 170 171 static __inline u_long 172 inl(u_int port) 173 { 174 u_long data; 175 176 __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port)); 177 return (data); 178 } 179 180 static __inline void 181 insb(u_int port, void *addr, size_t cnt) 182 { 183 __asm __volatile("cld; rep; insb" 184 : : "d" (port), "D" (addr), "c" (cnt) 185 : "di", "cx", "memory"); 186 } 187 188 static __inline void 189 insw(u_int port, void *addr, size_t cnt) 190 { 191 __asm __volatile("cld; rep; insw" 192 : : "d" (port), "D" (addr), "c" (cnt) 193 : "di", "cx", "memory"); 194 } 195 196 static __inline void 197 insl(u_int port, void *addr, size_t cnt) 198 { 199 __asm __volatile("cld; rep; insl" 200 : : "d" (port), "D" (addr), "c" (cnt) 201 : "di", "cx", "memory"); 202 } 203 204 static __inline void 205 invd(void) 206 { 207 __asm __volatile("invd"); 208 } 209 210 #if defined(SMP) && defined(SMP_INVLTLB) && defined(KERNEL) 211 212 /* 213 * When using APIC IPI's, the inlining cost is prohibitive.. 214 */ 215 void invlpg __P((u_int addr)); 216 void invltlb __P((void)); 217 218 #else 219 220 static __inline void 221 invlpg(u_int addr) 222 { 223 __asm __volatile("invlpg (%0)" : : "r" (addr) : "memory"); 224 } 225 226 static __inline void 227 invltlb(void) 228 { 229 u_long temp; 230 /* 231 * This should be implemented as load_cr3(rcr3()) when load_cr3() 232 * is inlined. 233 */ 234 __asm __volatile("movl %%cr3, %0; movl %0, %%cr3" : "=r" (temp) 235 : : "memory"); 236 } 237 #endif /* SMP && SMP_INVLTLB && KERNEL */ 238 239 static __inline u_short 240 inw(u_int port) 241 { 242 u_short data; 243 244 __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port)); 245 return (data); 246 } 247 248 static __inline u_int 249 loadandclear(u_int *addr) 250 { 251 u_int result; 252 253 __asm __volatile("xorl %0,%0; xchgl %1,%0" 254 : "=&r" (result) : "m" (*addr)); 255 return (result); 256 } 257 258 static __inline void 259 outbv(u_int port, u_char data) 260 { 261 u_char al; 262 /* 263 * Use an unnecessary assignment to help gcc's register allocator. 264 * This make a large difference for gcc-1.40 and a tiny difference 265 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 266 * best results. gcc-2.6.0 can't handle this. 267 */ 268 al = data; 269 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 270 } 271 272 static __inline void 273 outl(u_int port, u_long data) 274 { 275 /* 276 * outl() and outw() aren't used much so we haven't looked at 277 * possible micro-optimizations such as the unnecessary 278 * assignment for them. 279 */ 280 __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port)); 281 } 282 283 static __inline void 284 outsb(u_int port, void *addr, size_t cnt) 285 { 286 __asm __volatile("cld; rep; outsb" 287 : : "d" (port), "S" (addr), "c" (cnt) 288 : "si", "cx"); 289 } 290 291 static __inline void 292 outsw(u_int port, void *addr, size_t cnt) 293 { 294 __asm __volatile("cld; rep; outsw" 295 : : "d" (port), "S" (addr), "c" (cnt) 296 : "si", "cx"); 297 } 298 299 static __inline void 300 outsl(u_int port, void *addr, size_t cnt) 301 { 302 __asm __volatile("cld; rep; outsl" 303 : : "d" (port), "S" (addr), "c" (cnt) 304 : "si", "cx"); 305 } 306 307 static __inline void 308 outw(u_int port, u_short data) 309 { 310 __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port)); 311 } 312 313 static __inline u_long 314 rcr2(void) 315 { 316 u_long data; 317 318 __asm __volatile("movl %%cr2,%0" : "=r" (data)); 319 return (data); 320 } 321 322 static __inline u_long 323 read_eflags(void) 324 { 325 u_long ef; 326 327 __asm __volatile("pushfl; popl %0" : "=r" (ef)); 328 return (ef); 329 } 330 331 static __inline quad_t 332 rdmsr(u_int msr) 333 { 334 quad_t rv; 335 336 __asm __volatile(".byte 0x0f, 0x32" : "=A" (rv) : "c" (msr)); 337 return (rv); 338 } 339 340 static __inline quad_t 341 rdpmc(u_int pmc) 342 { 343 quad_t rv; 344 345 __asm __volatile(".byte 0x0f, 0x33" : "=A" (rv) : "c" (pmc)); 346 return (rv); 347 } 348 349 static __inline quad_t 350 rdtsc(void) 351 { 352 quad_t rv; 353 354 __asm __volatile(".byte 0x0f, 0x31" : "=A" (rv)); 355 return (rv); 356 } 357 358 static __inline void 359 setbits(volatile unsigned *addr, u_int bits) 360 { 361 __asm __volatile("orl %1,%0" : "=m" (*addr) : "ir" (bits)); 362 } 363 364 static __inline void 365 wbinvd(void) 366 { 367 __asm __volatile("wbinvd"); 368 } 369 370 static __inline void 371 write_eflags(u_long ef) 372 { 373 __asm __volatile("pushl %0; popfl" : : "r" (ef)); 374 } 375 376 static __inline void 377 wrmsr(u_int msr, quad_t newval) 378 { 379 __asm __volatile(".byte 0x0f, 0x30" : : "A" (newval), "c" (msr)); 380 } 381 382 #else /* !__GNUC__ */ 383 384 int breakpoint __P((void)); 385 void disable_intr __P((void)); 386 void enable_intr __P((void)); 387 u_char inb __P((u_int port)); 388 u_long inl __P((u_int port)); 389 void insb __P((u_int port, void *addr, size_t cnt)); 390 void insl __P((u_int port, void *addr, size_t cnt)); 391 void insw __P((u_int port, void *addr, size_t cnt)); 392 void invd __P((void)); 393 void invlpg __P((u_int addr)); 394 void invltlb __P((void)); 395 u_short inw __P((u_int port)); 396 u_int loadandclear __P((u_int *addr)); 397 void outb __P((u_int port, u_char data)); 398 void outl __P((u_int port, u_long data)); 399 void outsb __P((u_int port, void *addr, size_t cnt)); 400 void outsl __P((u_int port, void *addr, size_t cnt)); 401 void outsw __P((u_int port, void *addr, size_t cnt)); 402 void outw __P((u_int port, u_short data)); 403 u_long rcr2 __P((void)); 404 quad_t rdmsr __P((u_int msr)); 405 quad_t rdpmc __P((u_int pmc)); 406 quad_t rdtsc __P((void)); 407 u_long read_eflags __P((void)); 408 void setbits __P((volatile unsigned *addr, u_int bits)); 409 void wbinvd __P((void)); 410 void write_eflags __P((u_long ef)); 411 void wrmsr __P((u_int msr, quad_t newval)); 412 413 #endif /* __GNUC__ */ 414 415 void load_cr0 __P((u_long cr0)); 416 void load_cr3 __P((u_long cr3)); 417 void ltr __P((u_short sel)); 418 u_int rcr0 __P((void)); 419 u_long rcr3 __P((void)); 420 421 #include <machine/spl.h> /* XXX belongs elsewhere */ 422 423 #endif /* !_MACHINE_CPUFUNC_H_ */ 424