1.\" Copyright (c) 2002, 2003 Hiten M. Pandya. 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions, and the following disclaimer, 9.\" without modification, immediately at the beginning of the file. 10.\" 2. The name of the author may not be used to endorse or promote products 11.\" derived from this software without specific prior written permission. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR, CONTRIBUTORS OR THE 17.\" VOICES IN HITEN PANDYA'S HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18.\" SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19.\" TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20.\" PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21.\" LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22.\" NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23.\" SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24.\" 25.\" Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 26.\" All rights reserved. 27.\" 28.\" This code is derived from software contributed to The NetBSD Foundation 29.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 30.\" NASA Ames Research Center. 31.\" 32.\" Redistribution and use in source and binary forms, with or without 33.\" modification, are permitted provided that the following conditions 34.\" are met: 35.\" 1. Redistributions of source code must retain the above copyright 36.\" notice, this list of conditions and the following disclaimer. 37.\" 2. Redistributions in binary form must reproduce the above copyright 38.\" notice, this list of conditions and the following disclaimer in the 39.\" documentation and/or other materials provided with the distribution. 40.\" 3. All advertising materials mentioning features or use of this software 41.\" must display the following acknowledgment: 42.\" This product includes software developed by the NetBSD 43.\" Foundation, Inc. and its contributors. 44.\" 4. Neither the name of The NetBSD Foundation nor the names of its 45.\" contributors may be used to endorse or promote products derived 46.\" from this software without specific prior written permission. 47.\" 48.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 49.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 50.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 51.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 52.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 53.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 54.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 55.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 56.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 57.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 58.\" POSSIBILITY OF SUCH DAMAGE. 59.\" 60.\" $FreeBSD$ 61.\" $NetBSD: bus_dma.9,v 1.25 2002/10/14 13:43:16 wiz Exp $ 62.\" 63.Dd May 28, 2003 64.Dt BUS_DMA 9 65.Os 66.Sh NAME 67.Nm bus_dma , 68.Nm bus_dma_tag_create , 69.Nm bus_dma_tag_destroy , 70.Nm bus_dmamap_create , 71.Nm bus_dmamap_destroy , 72.Nm bus_dmamap_load , 73.Nm bus_dmamap_load_mbuf , 74.Nm bus_dmamap_load_uio , 75.Nm bus_dmamap_unload , 76.Nm bus_dmamap_sync , 77.Nm bus_dmamem_alloc , 78.Nm bus_dmamem_free , 79.Nd Bus and Machine Independent DMA Mapping Interface 80.Sh SYNOPSIS 81.In machine/bus.h 82.Ft int 83.Fn bus_dma_tag_create "bus_dma_tag_t parent" "bus_size_t alignment" \ 84"bus_size_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 85"bus_dma_filter_t *filtfunc" "void *filtfuncarg" "bus_size_t maxsize" \ 86"int nsegments" "bus_size_t maxsegsz" "int flags" "bus_dma_lock_t *lockfunc" \ 87"void *lockfuncarg" "bus_dma_tag_t *dmat" 88.Ft int 89.Fn bus_dma_tag_destroy "bus_dma_tag_t dmat" 90.Ft int 91.Fn bus_dmamap_create "bus_dma_tag_t dmat" "int flags" "bus_dmamap_t *mapp" 92.Ft int 93.Fn bus_dmamap_destroy "bus_dma_tag_t dmat" "bus_dmamap_t map" 94.Ft int 95.Fn bus_dmamap_load "bus_dma_tag_t dmat" "bus_dmamap_t map" "void *buf" \ 96"bus_size_t buflen" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 97"int flags" 98.Ft int 99.Fn bus_dmamap_load_mbuf "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 100"struct mbuf *mbuf" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 101"int flags" 102.Ft int 103.Fn bus_dmamap_load_uio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 104"struct uio *uio" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 105"int flags" 106.Ft int 107.Fn bus_dmamem_alloc "bus_dma_tag_t dmat" "void **vaddr" \ 108"int flags" "bus_dmamap_t *mapp" 109.Ft void 110.Fn bus_dmamap_unload "bus_dma_tag_t dmat" "bus_dmamap_t map" 111.Ft void 112.Fn bus_dmamap_sync "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 113"op" 114.Ft void 115.Fn bus_dmamem_free "bus_dma_tag_t dmat" "void *vaddr" \ 116"bus_dmamap_t map" 117.Sh DESCRIPTION 118Direct Memory Access (DMA) is a method of transferring data 119without involving the CPU, thus providing higher performance. 120A DMA transaction can be achieved between device to memory, 121device to device, or memory to memory. 122.Pp 123The 124.Nm 125API is a bus, device, and machine-independent (MI) interface to 126DMA mechanisms. 127It provides the client with flexibility and simplicity by 128abstracting machine dependent issues like setting up 129DMA mappings, handling cache issues, bus specific features 130and limitations. 131.Sh STRUCTURES AND TYPES 132.Bl -tag -width compact 133.It Vt bus_dma_tag_t 134A machine-dependent (MD) opaque type that describes the 135characteristics of DMA transactions. 136DMA tags are organized into a hierarchy, with each child 137tag inheriting the restrictions of its parent. 138This allows all devices along the path of DMA transactions 139to contribute to the constraints of those transactions. 140.It Vt bus_dma_filter_t 141Client specified address filter having the format: 142.Bl -tag -width compact 143.It Ft int 144.Fn "client_filter" "void *filtarg" "bus_addr_t testaddr" 145.El 146.sp 147Address filters can be specified during tag creation to allow 148for devices who's DMA address restrictions cannot be specified 149by a single window. 150The 151.Fa filtarg 152is client specified during tag creation to be passed to all 153invocations of the callback. 154The 155.Fa testaddr 156argument contains a potential starting address of a DMA mapping. 157The filter function operates on the set of addresses from 158.Fa testaddr 159to 160.Ql trunc_page(testaddr) + PAGE_SIZE - 1 , 161inclusive. 162The filter function should return zero for any mapping in this range 163that can be accommodated by the device and non-zero otherwise. 164.It Vt bus_dma_segment_t 165A machine-dependent type that describes individual 166DMA segments. 167.Bd -literal 168 bus_addr_t ds_addr; 169 bus_size_t ds_len; 170.Ed 171.sp 172The 173.Fa ds_addr 174field contains the device visible address of the DMA segment, and 175.Fa ds_len 176contains the length of the DMA segment. 177Although the DMA segments returned by a mapping call will adhere to 178all restrictions necessary for a successful DMA operation, some conversion 179(e.g. a conversion from host byte order to the device's byte order) is 180almost always required when presenting segment information to the device. 181.It Vt bus_dmamap_t 182A machine-dependent opaque type describing an individual mapping. 183Multiple DMA maps can be associated with one DMA tag. 184.It Vt bus_dmamap_callback_t 185Client specified callback for receiving mapping information resulting from 186the load of a 187.Vt bus_dmamap_t 188via 189.Fn bus_dmamap_load . 190Callbacks are of the format: 191.Bl -tag -width compact 192.It Ft void 193.Fn "client_callback" "void *callback_arg" "bus_dma_segment_t *segs" \ 194"int nseg" "int error" 195.El 196.sp 197The 198.Fa callback_arg 199is the callback argument passed to dmamap load functions. 200The 201.Fa segs 202and 203.Fa nseg 204parameters describe an array of 205.Vt bus_dma_segment_t 206structures that represent the mapping. 207This array is only valid within the scope of the callback function. 208The success or failure of the mapping is indicated by the 209.Fa error 210parameter. 211More information on the use of callbacks can be found in the 212description of the individual dmamap load functions. 213.It Vt bus_dmamap_callback2_t 214Client specified callback for receiving mapping information resulting from 215the load of a 216.Vt bus_dmamap_t 217via 218.Fn bus_dmamap_load_uio 219or 220.Fn bus_dmamap_load_mbuf . 221.sp 222Callback2s are of the format: 223.Bl -tag -width compact 224.It Ft void 225.Fn "client_callback2" "void *callback_arg" "bus_dma_segment_t *segs" \ 226"int nseg" "bus_size_t mapsize" "int error" 227.El 228.sp 229Callback2's behavior is the same as 230.Vt bus_dmamap_callback_t 231with the addition that the length of the data mapped is provided via 232.Fa mapsize . 233.It Vt bus_dmasync_op_t 234Memory synchronization operation specifier. 235Bus DMA requires explicit synchronization of memory with it's device 236visible mapping in order to guarantee memory coherency. 237The 238.Vt bus_dmasync_op_t 239allows the type of DMA operation that will be or has been performed 240to be communicated to the system so that the correct coherency measures 241are taken. 242All operations specified below are performed from the DMA engine's 243point of view: 244.Bl -tag -width BUS_DMASYNC_POSTWRITE 245.It Dv BUS_DMASYNC_PREREAD 246Perform any synchronization required after an update of memory by the CPU 247but prior to DMA read operations. 248.It Dv BUS_DMASYNC_PREWRITE 249Perform any synchronization required after an update of memory by the CPU 250but prior to DMA write operations. 251.It Dv BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE 252Perform any synchronization required prior to a combination of DMA read 253and write operations. 254.It Dv BUS_DMASYNC_POSTREAD 255Perform any synchronization required after DMA read operations, but prior 256to CPU access of the memory. 257.It Dv BUS_DMASYNC_POSTWRITE 258Perform any synchronization required after DMA write operations, but prior 259to CPU access of the memory. 260.It Dv BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE 261Perform any synchronization required after a combination of DMA read 262and write operations. 263.El 264.It Vt bus_dma_lock_t 265Client specified lock/mutex manipulation method. 266This will be called from 267within busdma whenever a client lock needs to be manipulated. 268This method is of the format: 269.Bl -tag -width compact 270.It Ft void 271.Fn "lockfunc" "void *lockfunc_arg" "bus_dma_lock_op_t op" 272.El 273.sp 274Two 275.Vt lockfunc 276implementations are provided for convenience. 277.Fn busdma_lock_mutex 278performs standard mutex operations on the sleep mutex provided via the 279.Fa lockfuncarg . 280passed into 281.Fn bus_dma_tag_create . 282.Fn dflt_lock 283will generate a system panic if it is called. 284It is substituted into the tag when 285.Fa lockfunc 286is passed as NULL to 287.Fn bus_dma_tag_create . 288.It Vt bus_dma_lock_op_t 289Operations to be performed by the client-specified 290.Fn lockfunc . 291.Bl -tag -width BUS_DMA_UNLOCK 292.It Dv BUS_DMA_LOCK 293Aquires and/or locks the client locking primitive. 294.It Dv BUS_DMA_UNLOCK 295Releases and/or unlocks the client locking primitive. 296.El 297.El 298.sp 299.Sh FUNCTIONS 300.Bl -tag -width compact 301.It Fn bus_dma_tag_create "parent" "alignment" "boundary" "lowaddr" \ 302"highaddr" "*filtfunc" "*filtfuncarg" "maxsize" "nsegments" "maxsegsz" \ 303"flags" "lockfunc" "lockfuncarg" "*dmat" 304Allocates a device specific DMA tag, and initializes it according to 305the arguments provided: 306.Bl -tag -width *filtfuncarg -compact 307.It Fa parent 308Indicates restrictions between the parent bridge, CPU memory, and the 309device. 310May be NULL, if no DMA restrictions are to be inherited. 311.It Fa alignment 312Alignment constraint, in bytes, of any mappings created using this tag. 313The alignment must be a power of 2. 314Hardware that can DMA starting at any address would specify 315.Em 1 316for byte alignment. 317Hardware requiring DMA transfers to start on a multiple of 4K 318would specify 319.Em 4096. 320.It Fa boundary 321Boundary constraint, in bytes, of the target DMA memory region. 322The boundary indicates the set of addresses, all multiples of the 323boundary argument, that cannot be crossed by a single 324.Vt bus_dma_segment_t . 325The boundary must be either a power of 2 or 0. 326.Ql 0 327indicates that there are no boundary restrictions. 328.It Fa lowaddr 329.It Fa highaddr 330Bounds of the window of bus address space that 331.Em cannot 332be directly accessed by the device. 333The window contains all address greater than lowaddr and 334less than or equal to highaddr. 335For example, a device incapable of DMA above 4GB, would specify 336a highaddr of 337.Dv BUS_SPACE_MAXADDR 338and a lowaddr of 339.Dv BUS_SPACE_MAXADDR_32BIT . 340Similarly a device that can only dma to addresses bellow 16MB would 341specify a highaddr of 342.Dv BUS_SPACE_MAXADDR 343and a lowaddr of 344.Dv BUS_SPACE_MAXADDR_24BIT . 345Some implementations requires that some region of device visible 346address space, overlapping available host memory, be outside the 347window. 348This area of 349.Ql safe memory 350is used to bounce requests that would otherwise conflict with 351the exclusion window. 352.It Fa filtfunc 353Optional filter function (may be NULL) to be called for any attempt to 354map memory into the window described by 355.Fa lowaddr 356and 357.Fa highaddr. 358A filter function is only required when the single window described 359by 360.Fa lowaddr 361and 362.Fa highaddr 363cannot adequately describe the constraints of the device. 364The filter function will be called for every machine page 365that overlaps the exclusion window. 366.It Fa filtfuncarg 367Argument passed to all calls to the filter function for this tag. 368May be NULL. 369.It Fa maxsize 370Maximum size, in bytes, of the sum of all segment lengths in a given 371DMA mapping associated with this tag. 372.It Fa nsegments 373Number of discontinuities (scatter/gather segments) allowed 374in a DMA mapped region. 375If there is no restriction, 376.Dv BUS_SPACE_UNRESTRICTED 377may be specified. 378.It Fa maxsegsz 379Maximum size, in bytes, of a segment in any DMA mapped region associated 380with 381.Fa dmat . 382.It Fa flags 383Are as follows: 384.Bl -tag -width "BUS_DMA_ALLOCNOW" -compact 385.It Dv BUS_DMA_ALLOCNOW 386Allocate the resources necessary to guarantee that all map load 387operations associated with this tag will not block. 388If sufficient resources are not available, 389.Er ENOMEM 390is returned. 391.El 392.It Fa lockfunc 393Optional lock manipulation function (may be NULL) to be called when busdma 394needs to manipulate a lock on behalf of the client. 395If NULL is specified, 396.Fn dflt_lock 397is used. 398.It Fa lockfuncarg 399Optional argument to be passed to the function specified by 400.Fa lockfunc . 401.It Fa dmat 402Pointer to a bus_dma_tag_t where the resulting DMA tag will 403be stored. 404.El 405.Pp 406Returns 407.Er ENOMEM 408if sufficient memory is not available for tag creation 409or allocating mapping resources. 410.It Fn bus_dma_tag_destroy "dmat" 411Deallocate the DMA tag 412.Fa dmat 413that was created by 414.Fn bus_dma_tag_create . 415.Pp 416Returns 417.Er EBUSY 418if any DMA maps remain associated with 419.Fa dmat 420or 421.Ql 0 422on success. 423.It Fn bus_dmamap_create "dmat" "flags" "*mapp" 424Allocates and initializes a DMA map. 425Arguments are as follows: 426.Bl -tag -width nsegments -compact 427.It Fa dmat 428DMA tag. 429.It Fa flags 430The value of this argument is currently undefined and should be 431specified as 432.Ql 0 . 433.It Fa mapp 434Pointer to a 435.Vt bus_dmamap_t 436where the resulting DMA map will be stored. 437.El 438.Pp 439Returns 440.Er ENOMEM 441if sufficient memory is not available for creating the 442map or allocating mapping resources. 443.It Fn bus_dmamap_destroy "dmat" "map" 444Frees all resources associated with a given DMA map. 445Arguments are as follows: 446.Bl -tag -width dmat -compact 447.It Fa dmat 448DMA tag used to allocate 449.Fa map . 450.It Fa map 451The DMA map to destroy. 452.El 453.Pp 454Returns 455.Er EBUSY 456if a mapping is still active for 457.Fa map . 458.It Fn bus_dmamap_load "dmat" "map" "buf" "buflen" "*callback" "..." 459Creates a mapping in device visible address space of 460.Fa buflen 461bytes of 462.Fa buf , 463associated with the DMA map 464.Fa map. 465Arguments are as follows: 466.Bl -tag -width buflen -compact 467.It Fa dmat 468DMA tag used to allocate 469.Fa map. 470.It Fa map 471A DMA map without a currently active mapping. 472.It Fa buf 473A kernel virtual address pointer to a contiguous (in KVA) buffer, to be 474mapped into device visible address space. 475.It Fa buflen 476The size of the buffer. 477.It Fa callback Fa callback_arg 478The callback function, and its argument. 479.It Fa flags 480The value of this argument is currently undefined, and should be 481specified as 482.Ql 0 . 483.El 484.Pp 485Return values to the caller are as follows: 486.Bl -tag -width EINPROGRESS -compact 487.It 0 488The callback has been called and completed. 489The status of the mapping has been delivered to the callback. 490.It Er EINPROGRESS 491The mapping has been deferred for lack of resources. 492The callback will be called as soon as resources are available. 493Callbacks are serviced in FIFO order. 494DMA maps created from DMA tags that are allocated with 495the 496.Dv BUS_DMA_ALLOCNOW 497flag will never return this status for a load operation. 498.It Er EINVAL 499The load request was invalid. 500The callback has not, and will not be called. 501This error value may indicate that 502.Fa dmat , 503.Fa map , 504.Fa buf , 505or 506.Fa callback 507were invalid, or 508.Fa buslen 509was larger than the 510.Fa maxsize 511argument used to create the dma tag 512.Fa dmat . 513.El 514.Pp 515When the callback is called, it is presented with an error value 516indicating the disposition of the mapping. 517Error may be one of the following: 518.Bl -tag -width EINPROGRESS -compact 519.It 0 520The mapping was successful and the 521.Fa dm_segs 522callback argument contains an array of 523.Vt bus_dma_segment_t 524elements describing the mapping. 525This array is only valid during the scope of the callback function. 526.It Er EFBIG 527A mapping could not be achieved within the segment constraints provided 528in the tag even though the requested allocation size was less than maxsize. 529.El 530.It Fn bus_dmamap_load_mbuf "dmat" "map" "mbuf" "callback2" "callback_arg" \ 531"flags" 532This is a variation of 533.Fn bus_dmamap_load 534which maps mbuf chains 535for DMA transfers. 536A 537.Vt bus_size_t 538argument is also passed to the callback routine, which 539contains the mbuf chain's packet header length. 540.Pp 541Mbuf chains are assumed to be in kernel virtual address space. 542.Pp 543Returns 544.Er EINVAL 545if the size of the mbuf chain exceeds the maximum limit of the 546DMA tag. 547.It Fn bus_dmamap_load_uio "dmat" "map" "uio" "callback2" "callback_arg" "flags" 548This is a variation of 549.Fn bus_dmamap_load 550which maps buffers pointed to by 551.Fa uio 552for DMA transfers. 553A 554.Vt bus_size_t 555argument is also passed to the callback routine, which contains the size of 556.Fa uio , 557i.e. 558.Fa uio->uio_resid . 559.Pp 560If 561.Fa uio->uio_segflg 562is 563.Dv UIO_USERSPACE , 564then it is assumed that the buffer, 565.Fa uio 566is in 567.Fa "uio->uio_td->td_proc" Ns 's 568address space. 569User space memory must be in-core and wired prior to attempting a map 570load operation. 571.It Fn bus_dmamap_unload "dmat" "map" 572Unloads a DMA map. 573Arguments are as follows: 574.Bl -tag -width dmam -compact 575.It Fa dmat 576DMA tag used to allocate 577.Fa map . 578.It Fa map 579The DMA map that is to be unloaded. 580.El 581.Pp 582.Fn bus_dmamap_unload 583will not perform any implicit synchronization of DMA buffers. 584This must be done explicitly by a call to 585.Fn bus_dmamap_sync 586prior to unloading the map. 587.It Fn bus_dmamap_sync "dmat" "map" "op" 588Performs synchronization of a device visible mapping with the CPU visible 589memory referenced by that mapping. 590Arguments are as follows: 591.Bl -tag -width dmat -compact 592.It Fa dmat 593DMA tag used to allocate 594.Fa map . 595.It Fa map 596The DMA mapping to be synchronized. 597.It Fa op 598Type of synchronization operation to perform. 599See the definition of 600.Vt bus_dmasync_op_t 601for a description of the acceptable values for 602.Fa op . 603.El 604.Pp 605.Fn bus_dmamap_sync 606is the method used to ensure that CPU and device DMA access to shared 607memory is coherent. 608For example, the CPU might be used to setup the contents of a buffer 609that is to be DMA'ed into a device. 610To ensure that the data are visible via the device's mapping of that 611memory, the buffer must be loaded and a dma sync operation of 612.Dv BUS_DMASYNC_PREREAD 613must be performed. 614Additional sync operations must be performed after every CPU write 615to this memory if additional DMA reads are to be performed. 616Conversely, for the DMA write case, the buffer must be loaded, 617and a dma sync operation of 618.Dv BUS_DMASYNC_PREWRITE 619must be performed. 620The CPU will only be able to see the results of this DMA write 621once the DMA has completed and a 622.Dv BUS_DMASYNC_POSTWRITE 623operation has been performed. 624.Pp 625If DMA read and write operations are not preceded and followed by the 626appropriate synchronization operations, behavior is undefined. 627.It Fn bus_dmamem_alloc "dmat" "**vaddr" "flags" "mapp" 628Allocates memory that is mapped into KVA at the address returned 629in 630.Fa vaddr 631that is permanently loaded into the newly created 632.Vt bus_dmamap_t 633returned via 634.Fa mapp . 635Arguments are as follows: 636.Bl -tag -width alignment -compact 637.It Fa dmat 638DMA tag describing the constraints of the DMA mapping. 639.It Fa vaddr 640Pointer to a pointer that will hold the returned KVA mapping of 641the allocated region. 642.It Fa flags 643Flags are defined as follows: 644.Bl -tag -width BUS_DMA_NOWAIT -compact 645.It Dv BUS_DMA_WAITOK 646The routine can safely wait (sleep) for resources. 647.It Dv BUS_DMA_NOWAIT 648The routine is not allowed to wait for resources. 649If resources are not available, 650.Dv ENOMEM 651is returned. 652.It Dv BUS_DMA_COHERENT 653Attempt to map this memory such that cache sync operations are 654as cheap as possible. 655This flag is typically set on memory that will be accessed by both 656a CPU and a DMA engine, frequently. 657Use of this flag does not remove the requirement of using 658bus_dmamap_sync, but it may reduce the cost of performing 659these operations. 660.It Dv BUS_DMA_ZERO 661Causes the allocated memory to be set to all zeros. 662.El 663.It Fa mapp 664Pointer to storage for the returned DMA map. 665.El 666.Pp 667The size of memory to be allocated is 668.Fa maxsize 669as specified in 670.Fa dmat . 671.Pp 672The current implementation of 673.Fn bus_dmamem_alloc 674will allocate all requests as a single segment. 675.Pp 676Although no explicit loading is required to access the memory 677referenced by the returned map, the synchronization requirements 678as described in the 679.Fn bus_dmamap_sync 680section still apply. 681.Pp 682Returns 683.Er ENOMEM 684if sufficient memory is not available for completing 685the operation. 686.It Fn bus_dmamem_free "dmat" "*vaddr" "map" 687Frees memory previously allocated by 688.Fn bus_dmamem_alloc . 689Any mappings 690will be invalidated. 691Arguments are as follows: 692.Bl -tag -width vaddr -compact 693.It Fa dmat 694DMA tag. 695.It Fa vaddr 696Kernel virtual address of the memory. 697.It Fa map 698DMA map to be invalidated. 699.El 700.El 701.Sh RETURN VALUES 702Behavior is undefined if invalid arguments are passed to 703any of the above functions. 704If sufficient resources cannot be allocated for a given 705transaction, 706.Er ENOMEM 707is returned. 708All 709routines that are not of type, 710.Vt void , 711will return 0 on success or an error 712code, as discussed above. 713.Pp 714All 715.Vt void 716routines will succeed if provided with valid arguments. 717.Sh SEE ALSO 718.Xr devclass 9 , 719.Xr device 9 , 720.Xr driver 9 , 721.Xr rman 9 722.Pp 723.Rs 724.%A "Jason R. Thorpe" 725.%T "A Machine-Independent DMA Framework for NetBSD" 726.%J "Proceedings of the Summer 1998 USENIX Technical Conference" 727.%Q "USENIX Association" 728.%D "June 1998" 729.Re 730.Sh HISTORY 731The 732.Nm 733interface first appeared in 734.Nx 1.3 . 735.Pp 736The 737.Nm 738API was adopted from 739.Nx 740for use in the CAM SCSI subsystem. 741The alterations to the original API were aimed to remove the need for 742a 743.Vt bus_dma_segment_t 744array stored in each 745.Vt bus_dmamap_t 746while allowing callers to queue up on scarce resources. 747.Sh AUTHORS 748The 749.Nm 750interface was designed and implemented by 751.An Jason R. Thorpe 752of the Numerical Aerospace Simulation Facility, NASA Ames Research Center. 753Additional input on the 754.Nm 755design was provided by 756.An -nosplit 757.An Chris Demetriou , 758.An Charles Hannum , 759.An Ross Harvey , 760.An Matthew Jacob , 761.An Jonathan Stone , 762and 763.An Matt Thomas . 764.Pp 765The 766.Nm 767interface in 768.Fx 769benefits from the contributions of 770.An Justin T. Gibbs , 771.An Peter Wemm , 772.An Doug Rabson , 773.An Matthew N. Dodd , 774.An Sam Leffler , 775.An Maxime Henrion , 776.An Jake Burkholder , 777.An Takahashi Yoshihiro , 778.An Scott Long 779and many others. 780.Pp 781This manual page was written by 782.An Hiten M. Pandya 783and 784.An Justin T. Gibbs . 785