1.\" Copyright (c) 2002, 2003 Hiten M. Pandya. 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions, and the following disclaimer, 9.\" without modification, immediately at the beginning of the file. 10.\" 2. The name of the author may not be used to endorse or promote products 11.\" derived from this software without specific prior written permission. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR, CONTRIBUTORS OR THE 17.\" VOICES IN HITEN PANDYA'S HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18.\" SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 19.\" TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20.\" PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 21.\" LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 22.\" NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 23.\" SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24.\" 25.\" Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 26.\" All rights reserved. 27.\" 28.\" This code is derived from software contributed to The NetBSD Foundation 29.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 30.\" NASA Ames Research Center. 31.\" 32.\" Redistribution and use in source and binary forms, with or without 33.\" modification, are permitted provided that the following conditions 34.\" are met: 35.\" 1. Redistributions of source code must retain the above copyright 36.\" notice, this list of conditions and the following disclaimer. 37.\" 2. Redistributions in binary form must reproduce the above copyright 38.\" notice, this list of conditions and the following disclaimer in the 39.\" documentation and/or other materials provided with the distribution. 40.\" 41.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 42.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 43.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 44.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 45.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 46.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 47.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 48.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 49.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 50.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 51.\" POSSIBILITY OF SUCH DAMAGE. 52.\" 53.\" $FreeBSD$ 54.\" $NetBSD: bus_dma.9,v 1.25 2002/10/14 13:43:16 wiz Exp $ 55.\" 56.Dd August 11, 2018 57.Dt BUS_DMA 9 58.Os 59.Sh NAME 60.Nm bus_dma , 61.Nm bus_dma_tag_create , 62.Nm bus_dma_tag_destroy , 63.Nm bus_dmamap_create , 64.Nm bus_dmamap_destroy , 65.Nm bus_dmamap_load , 66.Nm bus_dmamap_load_bio , 67.Nm bus_dmamap_load_ccb , 68.Nm bus_dmamap_load_mbuf , 69.Nm bus_dmamap_load_mbuf_sg , 70.Nm bus_dmamap_load_uio , 71.Nm bus_dmamap_unload , 72.Nm bus_dmamap_sync , 73.Nm bus_dmamem_alloc , 74.Nm bus_dmamem_free 75.Nd Bus and Machine Independent DMA Mapping Interface 76.Sh SYNOPSIS 77.In machine/bus.h 78.Ft int 79.Fn bus_dma_tag_create "bus_dma_tag_t parent" "bus_size_t alignment" \ 80"bus_addr_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 81"bus_dma_filter_t *filtfunc" "void *filtfuncarg" "bus_size_t maxsize" \ 82"int nsegments" "bus_size_t maxsegsz" "int flags" "bus_dma_lock_t *lockfunc" \ 83"void *lockfuncarg" "bus_dma_tag_t *dmat" 84.Ft int 85.Fn bus_dma_tag_destroy "bus_dma_tag_t dmat" 86.Ft int 87.Fn bus_dmamap_create "bus_dma_tag_t dmat" "int flags" "bus_dmamap_t *mapp" 88.Ft int 89.Fn bus_dmamap_destroy "bus_dma_tag_t dmat" "bus_dmamap_t map" 90.Ft int 91.Fn bus_dmamap_load "bus_dma_tag_t dmat" "bus_dmamap_t map" "void *buf" \ 92"bus_size_t buflen" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 93"int flags" 94.Ft int 95.Fn bus_dmamap_load_bio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 96"struct bio *bio" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 97"int flags" 98.Ft int 99.Fn bus_dmamap_load_ccb "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 100"union ccb *ccb" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 101"int flags" 102.Ft int 103.Fn bus_dmamap_load_mbuf "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 104"struct mbuf *mbuf" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 105"int flags" 106.Ft int 107.Fn bus_dmamap_load_mbuf_sg "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 108"struct mbuf *mbuf" "bus_dma_segment_t *segs" "int *nsegs" "int flags" 109.Ft int 110.Fn bus_dmamap_load_uio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 111"struct uio *uio" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 112"int flags" 113.Ft void 114.Fn bus_dmamap_unload "bus_dma_tag_t dmat" "bus_dmamap_t map" 115.Ft void 116.Fn bus_dmamap_sync "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 117"op" 118.Ft int 119.Fn bus_dmamem_alloc "bus_dma_tag_t dmat" "void **vaddr" \ 120"int flags" "bus_dmamap_t *mapp" 121.Ft void 122.Fn bus_dmamem_free "bus_dma_tag_t dmat" "void *vaddr" \ 123"bus_dmamap_t map" 124.Sh DESCRIPTION 125Direct Memory Access (DMA) is a method of transferring data 126without involving the CPU, thus providing higher performance. 127A DMA transaction can be achieved between device to memory, 128device to device, or memory to memory. 129.Pp 130The 131.Nm 132API is a bus, device, and machine-independent (MI) interface to 133DMA mechanisms. 134It provides the client with flexibility and simplicity by 135abstracting machine dependent issues like setting up 136DMA mappings, handling cache issues, bus specific features 137and limitations. 138.Sh OVERVIEW 139A tag structure 140.Vt ( bus_dma_tag_t ) 141is used to describe the properties of a group of related DMA 142transactions. 143One way to view this is that a tag describes the limitations of a DMA engine. 144For example, if a DMA engine in a device is limited to 32-bit addresses, 145that limitation is specified by a parameter when creating the tag 146for that device. 147Similarly, a tag can be marked as requiring buffers whose addresses are 148aligned to a specific boundary. 149.Pp 150Some devices may require multiple tags to describe DMA 151transactions with differing properties. 152For example, a device might require 16-byte alignment of its descriptor ring 153while permitting arbitrary alignment of I/O buffers. 154In this case, 155the driver must create one tag for the descriptor ring and a separate tag for 156I/O buffers. 157If a device has restrictions that are common to all DMA transactions 158in addition to restrictions that differ between unrelated groups of 159transactions, 160the driver can first create a 161.Dq parent 162tag that decribes the common restrictions. 163The per-group tags can then inherit these restrictions from this 164.Dq parent 165tag rather than having to list them explicitly when creating the per-group tags. 166.Pp 167A mapping structure 168.Vt ( bus_dmamap_t ) 169represents a mapping of a memory region for DMA. 170On systems with I/O MMUs, 171the mapping structure tracks any I/O MMU entries used by a request. 172For DMA requests that require bounce pages, 173the mapping tracks the bounce pages used. 174.Pp 175To prepare for one or more DMA transactions, 176a mapping must be bound to a memory region by calling one of the 177.Fn bus_dmamap_load 178functions. 179These functions configure the mapping which can include programming entries 180in an I/O MMU and/or allocating bounce pages. 181An output of these functions 182(either directly or indirectly by invoking a callback routine) 183is the list of scatter/gather address ranges a consumer can pass to a DMA 184engine to access the memory region. 185When a mapping is no longer needed, 186the mapping must be unloaded via 187.Fn bus_dmamap_unload . 188.Pp 189Before and after each DMA transaction, 190.Fn bus_dmamap_sync 191must be used to ensure that the correct data is used by the DMA engine and 192the CPU. 193If a mapping uses bounce pages, 194the sync operations copy data between the bounce pages and the memory region 195bound to the mapping. 196Sync operations also handle architecture-specific details such as CPU cache 197flushing and CPU memory operation ordering. 198.Sh STATIC VS DYNAMIC 199.Nm 200handles two types of DMA transactions: static and dynamic. 201Static transactions are used with a long-lived memory region that is reused 202for many transactions such as a descriptor ring. 203Dynamic transactions are used for transfers to or from transient buffers 204such as I/O buffers holding a network packet or disk block. 205Each transaction type uses a different subset of the 206.Nm 207API. 208.Ss Static Transactions 209Static transactions use memory regions allocated by 210.Nm . 211Each static memory region is allocated by calling 212.Fn bus_dmamem_alloc . 213This function requires a valid tag describing the properties of the 214DMA transactions to this region such as alignment or address restrictions. 215Multiple regions can share a single tag if they share the same restrictions. 216.Pp 217.Fn bus_dmamem_alloc 218allocates a memory region along with a mapping object. 219The associated tag, memory region, and mapping object must then be passed to 220.Fn bus_dmamap_load 221to bind the mapping to the allocated region and obtain the 222scatter/gather list. 223.Pp 224It is expected that 225.Fn bus_dmamem_alloc 226will attempt to allocate memory requiring less expensive sync operations 227(for example, implementations should not allocate regions requiring bounce 228pages), 229but sync operations should still be used. 230For example, a driver should use 231.Fn bus_dmamap_sync 232in an interrupt handler before reading descriptor ring entries written by the 233device prior to the interrupt. 234.Pp 235When a consumer is finished with a memory region, 236it should unload the mapping via 237.Fn bus_dmamap_unload 238and then release the memory region and mapping object via 239.Fn bus_dmamem_free . 240.Ss Dynamic Transactions 241Dynamic transactions map memory regions provided by other parts of the system. 242A tag must be created via 243.Fn bus_dma_tag_create 244to describe the DMA transactions to and from these memory regions, 245and a pool of mapping objects must be allocated via 246.Fn bus_dmamap_create 247to track the mappings of any in-flight transactions. 248.Pp 249When a consumer wishes to schedule a transaction for a memory region, 250the consumer must first obtain an unused mapping object from its pool 251of mapping objects. 252The memory region must be bound to the mapping object via one of the 253.Fn bus_dmamap_load 254functions. 255Before scheduling the transaction, 256the consumer should sync the memory region via 257.Fn bus_dmamap_sync 258with one or more of the 259.Dq PRE 260flags. 261After the transaction has completed, 262the consumer should sync the memory region via 263.Fn bus_dmamap_sync 264with one or more of the 265.Dq POST 266flags. 267The mapping can then be unloaded via 268.Fn bus_dmamap_unload , 269and the mapping object can be returned to the pool of unused mapping objects. 270.Pp 271When a consumer is no longer scheduling DMA transactions, 272the mapping objects should be freed via 273.Fn bus_dmamap_destroy , 274and the tag should be freed via 275.Fn bus_dma_tag_destroy . 276.Sh STRUCTURES AND TYPES 277.Bl -tag -width indent 278.It Vt bus_dma_tag_t 279A machine-dependent (MD) opaque type that describes the 280characteristics of a group of DMA transactions. 281DMA tags are organized into a hierarchy, with each child 282tag inheriting the restrictions of its parent. 283This allows all devices along the path of DMA transactions 284to contribute to the constraints of those transactions. 285.It Vt bus_dma_filter_t 286Client specified address filter having the format: 287.Bl -tag -width indent 288.It Ft int 289.Fn "client_filter" "void *filtarg" "bus_addr_t testaddr" 290.El 291.Pp 292Address filters can be specified during tag creation to allow 293for devices whose DMA address restrictions cannot be specified 294by a single window. 295The 296.Fa filtarg 297argument is specified by the client during tag creation to be passed to all 298invocations of the callback. 299The 300.Fa testaddr 301argument contains a potential starting address of a DMA mapping. 302The filter function operates on the set of addresses from 303.Fa testaddr 304to 305.Ql trunc_page(testaddr) + PAGE_SIZE - 1 , 306inclusive. 307The filter function should return zero if any mapping in this range 308can be accommodated by the device and non-zero otherwise. 309.It Vt bus_dma_segment_t 310A machine-dependent type that describes individual 311DMA segments. 312It contains the following fields: 313.Bd -literal 314 bus_addr_t ds_addr; 315 bus_size_t ds_len; 316.Ed 317.Pp 318The 319.Fa ds_addr 320field contains the device visible address of the DMA segment, and 321.Fa ds_len 322contains the length of the DMA segment. 323Although the DMA segments returned by a mapping call will adhere to 324all restrictions necessary for a successful DMA operation, some conversion 325(e.g.\& a conversion from host byte order to the device's byte order) is 326almost always required when presenting segment information to the device. 327.It Vt bus_dmamap_t 328A machine-dependent opaque type describing an individual mapping. 329One map is used for each memory allocation that will be loaded. 330Maps can be reused once they have been unloaded. 331Multiple maps can be associated with one DMA tag. 332While the value of the map may evaluate to 333.Dv NULL 334on some platforms under certain conditions, 335it should never be assumed that it will be 336.Dv NULL 337in all cases. 338.It Vt bus_dmamap_callback_t 339Client specified callback for receiving mapping information resulting from 340the load of a 341.Vt bus_dmamap_t 342via 343.Fn bus_dmamap_load , 344.Fn bus_dmamap_load_bio 345or 346.Fn bus_dmamap_load_ccb . 347Callbacks are of the format: 348.Bl -tag -width indent 349.It Ft void 350.Fn "client_callback" "void *callback_arg" "bus_dma_segment_t *segs" \ 351"int nseg" "int error" 352.El 353.Pp 354The 355.Fa callback_arg 356is the callback argument passed to dmamap load functions. 357The 358.Fa segs 359and 360.Fa nseg 361arguments describe an array of 362.Vt bus_dma_segment_t 363structures that represent the mapping. 364This array is only valid within the scope of the callback function. 365The success or failure of the mapping is indicated by the 366.Fa error 367argument. 368More information on the use of callbacks can be found in the 369description of the individual dmamap load functions. 370.It Vt bus_dmamap_callback2_t 371Client specified callback for receiving mapping information resulting from 372the load of a 373.Vt bus_dmamap_t 374via 375.Fn bus_dmamap_load_uio 376or 377.Fn bus_dmamap_load_mbuf . 378.Pp 379Callback2s are of the format: 380.Bl -tag -width indent 381.It Ft void 382.Fn "client_callback2" "void *callback_arg" "bus_dma_segment_t *segs" \ 383"int nseg" "bus_size_t mapsize" "int error" 384.El 385.Pp 386Callback2's behavior is the same as 387.Vt bus_dmamap_callback_t 388with the addition that the length of the data mapped is provided via 389.Fa mapsize . 390.It Vt bus_dmasync_op_t 391Memory synchronization operation specifier. 392Bus DMA requires explicit synchronization of memory with its device 393visible mapping in order to guarantee memory coherency. 394The 395.Vt bus_dmasync_op_t 396allows the type of DMA operation that will be or has been performed 397to be communicated to the system so that the correct coherency measures 398are taken. 399The operations are represented as bitfield flags that can be combined together, 400though it only makes sense to combine PRE flags or POST flags, not both. 401See the 402.Fn bus_dmamap_sync 403description below for more details on how to use these operations. 404.Pp 405All operations specified below are performed from the host memory point of view, 406where a read implies data coming from the device to the host memory, and a write 407implies data going from the host memory to the device. 408Alternatively, the operations can be thought of in terms of driver operations, 409where reading a network packet or storage sector corresponds to a read operation 410in 411.Nm . 412.Bl -tag -width ".Dv BUS_DMASYNC_POSTWRITE" 413.It Dv BUS_DMASYNC_PREREAD 414Perform any synchronization required prior to an update of host memory by the 415device. 416.It Dv BUS_DMASYNC_PREWRITE 417Perform any synchronization required after an update of host memory by the CPU 418and prior to device access to host memory. 419.It Dv BUS_DMASYNC_POSTREAD 420Perform any synchronization required after an update of host memory by the 421device and prior to CPU access to host memory. 422.It Dv BUS_DMASYNC_POSTWRITE 423Perform any synchronization required after device access to host memory. 424.El 425.It Vt bus_dma_lock_t 426Client specified lock/mutex manipulation method. 427This will be called from 428within busdma whenever a client lock needs to be manipulated. 429In its current form, the function will be called immediately before 430the callback for a DMA load operation that has been deferred with 431.Dv BUS_DMA_LOCK 432and immediately after with 433.Dv BUS_DMA_UNLOCK . 434If the load operation does not need to be deferred, then it 435will not be called since the function loading the map should 436be holding the appropriate locks. 437This method is of the format: 438.Bl -tag -width indent 439.It Ft void 440.Fn "lockfunc" "void *lockfunc_arg" "bus_dma_lock_op_t op" 441.El 442.Pp 443The 444.Fa lockfuncarg 445argument is specified by the client during tag creation to be passed to all 446invocations of the callback. 447The 448.Fa op 449argument specifies the lock operation to perform. 450.Pp 451Two 452.Vt lockfunc 453implementations are provided for convenience. 454.Fn busdma_lock_mutex 455performs standard mutex operations on the sleep mutex provided via 456.Fa lockfuncarg . 457.Fn dflt_lock 458will generate a system panic if it is called. 459It is substituted into the tag when 460.Fa lockfunc 461is passed as 462.Dv NULL 463to 464.Fn bus_dma_tag_create 465and is useful for tags that should not be used with deferred load operations. 466.It Vt bus_dma_lock_op_t 467Operations to be performed by the client-specified 468.Fn lockfunc . 469.Bl -tag -width ".Dv BUS_DMA_UNLOCK" 470.It Dv BUS_DMA_LOCK 471Acquires and/or locks the client locking primitive. 472.It Dv BUS_DMA_UNLOCK 473Releases and/or unlocks the client locking primitive. 474.El 475.El 476.Sh FUNCTIONS 477.Bl -tag -width indent 478.It Fn bus_dma_tag_create "parent" "alignment" "boundary" "lowaddr" \ 479"highaddr" "*filtfunc" "*filtfuncarg" "maxsize" "nsegments" "maxsegsz" \ 480"flags" "lockfunc" "lockfuncarg" "*dmat" 481Allocates a DMA tag, and initializes it according to 482the arguments provided: 483.Bl -tag -width ".Fa filtfuncarg" 484.It Fa parent 485A parent tag from which to inherit restrictions. 486The restrictions passed in other arguments can only further tighten the 487restrictions inherited from the parent tag. 488.Pp 489All tags created by a device driver must inherit from the tag returned by 490.Fn bus_get_dma_tag 491to honor restrictions between the parent bridge, CPU memory, and the 492device. 493.It Fa alignment 494Alignment constraint, in bytes, of any mappings created using this tag. 495The alignment must be a power of 2. 496Hardware that can DMA starting at any address would specify 497.Em 1 498for byte alignment. 499Hardware requiring DMA transfers to start on a multiple of 4K 500would specify 501.Em 4096 . 502.It Fa boundary 503Boundary constraint, in bytes, of the target DMA memory region. 504The boundary indicates the set of addresses, all multiples of the 505boundary argument, that cannot be crossed by a single 506.Vt bus_dma_segment_t . 507The boundary must be a power of 2 and must be no smaller than the 508maximum segment size. 509.Ql 0 510indicates that there are no boundary restrictions. 511.It Fa lowaddr , highaddr 512Bounds of the window of bus address space that 513.Em cannot 514be directly accessed by the device. 515The window contains all addresses greater than 516.Fa lowaddr 517and less than or equal to 518.Fa highaddr . 519For example, a device incapable of DMA above 4GB, would specify a 520.Fa highaddr 521of 522.Dv BUS_SPACE_MAXADDR 523and a 524.Fa lowaddr 525of 526.Dv BUS_SPACE_MAXADDR_32BIT . 527Similarly a device that can only perform DMA to addresses below 52816MB would specify a 529.Fa highaddr 530of 531.Dv BUS_SPACE_MAXADDR 532and a 533.Fa lowaddr 534of 535.Dv BUS_SPACE_MAXADDR_24BIT . 536Some implementations require that some region of device visible 537address space, overlapping available host memory, be outside the 538window. 539This area of 540.Ql safe memory 541is used to bounce requests that would otherwise conflict with 542the exclusion window. 543.It Fa filtfunc 544Optional filter function (may be 545.Dv NULL ) 546to be called for any attempt to 547map memory into the window described by 548.Fa lowaddr 549and 550.Fa highaddr . 551A filter function is only required when the single window described 552by 553.Fa lowaddr 554and 555.Fa highaddr 556cannot adequately describe the constraints of the device. 557The filter function will be called for every machine page 558that overlaps the exclusion window. 559.It Fa filtfuncarg 560Argument passed to all calls to the filter function for this tag. 561May be 562.Dv NULL . 563.It Fa maxsize 564Maximum size, in bytes, of the sum of all segment lengths in a given 565DMA mapping associated with this tag. 566.It Fa nsegments 567Number of discontinuities (scatter/gather segments) allowed 568in a DMA mapped region. 569If there is no restriction, 570.Dv BUS_SPACE_UNRESTRICTED 571may be specified. 572.It Fa maxsegsz 573Maximum size, in bytes, of a segment in any DMA mapped region associated 574with 575.Fa dmat . 576.It Fa flags 577Are as follows: 578.Bl -tag -width ".Dv BUS_DMA_ALLOCNOW" 579.It Dv BUS_DMA_ALLOCNOW 580Pre-allocate enough resources to handle at least one map load operation on 581this tag. 582If sufficient resources are not available, 583.Er ENOMEM 584is returned. 585This should not be used for tags that only describe buffers that will be 586allocated with 587.Fn bus_dmamem_alloc . 588Also, due to resource sharing with other tags, this flag does not guarantee 589that resources will be allocated or reserved exclusively for this tag. 590It should be treated only as a minor optimization. 591.It Dv BUS_DMA_COHERENT 592Indicate that the DMA engine and CPU are cache-coherent. 593Cached memory may be used to back allocations created by 594.Fn bus_dmamem_alloc . 595For 596.Fn bus_dma_tag_create , 597the 598.Dv BUS_DMA_COHERENT 599flag is currently implemented on arm64. 600.El 601.It Fa lockfunc 602Optional lock manipulation function (may be 603.Dv NULL ) 604to be called when busdma 605needs to manipulate a lock on behalf of the client. 606If 607.Dv NULL 608is specified, 609.Fn dflt_lock 610is used. 611.It Fa lockfuncarg 612Optional argument to be passed to the function specified by 613.Fa lockfunc . 614.It Fa dmat 615Pointer to a bus_dma_tag_t where the resulting DMA tag will 616be stored. 617.El 618.Pp 619Returns 620.Er ENOMEM 621if sufficient memory is not available for tag creation 622or allocating mapping resources. 623.It Fn bus_dma_tag_destroy "dmat" 624Deallocate the DMA tag 625.Fa dmat 626that was created by 627.Fn bus_dma_tag_create . 628.Pp 629Returns 630.Er EBUSY 631if any DMA maps remain associated with 632.Fa dmat 633or 634.Ql 0 635on success. 636.It Fn bus_dmamap_create "dmat" "flags" "*mapp" 637Allocates and initializes a DMA map. 638Arguments are as follows: 639.Bl -tag -width ".Fa nsegments" 640.It Fa dmat 641DMA tag. 642.It Fa flags 643Are as follows: 644.Bl -tag -width ".Dv BUS_DMA_COHERENT" 645.It Dv BUS_DMA_COHERENT 646Attempt to map the memory loaded with this map such that cache sync 647operations are as cheap as possible. 648This flag is typically set on maps when the memory loaded with these will 649be accessed by both a CPU and a DMA engine, frequently such as control data 650and as opposed to streamable data such as receive and transmit buffers. 651Use of this flag does not remove the requirement of using 652.Fn bus_dmamap_sync , 653but it may reduce the cost of performing these operations. 654For 655.Fn bus_dmamap_create , 656the 657.Dv BUS_DMA_COHERENT 658flag is currently implemented on sparc64. 659.El 660.It Fa mapp 661Pointer to a 662.Vt bus_dmamap_t 663where the resulting DMA map will be stored. 664.El 665.Pp 666Returns 667.Er ENOMEM 668if sufficient memory is not available for creating the 669map or allocating mapping resources. 670.It Fn bus_dmamap_destroy "dmat" "map" 671Frees all resources associated with a given DMA map. 672Arguments are as follows: 673.Bl -tag -width ".Fa dmat" 674.It Fa dmat 675DMA tag used to allocate 676.Fa map . 677.It Fa map 678The DMA map to destroy. 679.El 680.Pp 681Returns 682.Er EBUSY 683if a mapping is still active for 684.Fa map . 685.It Fn bus_dmamap_load "dmat" "map" "buf" "buflen" "*callback" \ 686"callback_arg" "flags" 687Creates a mapping in device visible address space of 688.Fa buflen 689bytes of 690.Fa buf , 691associated with the DMA map 692.Fa map . 693This call will always return immediately and will not block for any reason. 694Arguments are as follows: 695.Bl -tag -width ".Fa buflen" 696.It Fa dmat 697DMA tag used to allocate 698.Fa map . 699.It Fa map 700A DMA map without a currently active mapping. 701.It Fa buf 702A kernel virtual address pointer to a contiguous (in KVA) buffer, to be 703mapped into device visible address space. 704.It Fa buflen 705The size of the buffer. 706.It Fa callback Fa callback_arg 707The callback function, and its argument. 708This function is called once sufficient mapping resources are available for 709the DMA operation. 710If resources are temporarily unavailable, this function will be deferred until 711later, but the load operation will still return immediately to the caller. 712Thus, callers should not assume that the callback will be called before the 713load returns, and code should be structured appropriately to handle this. 714See below for specific flags and error codes that control this behavior. 715.It Fa flags 716Are as follows: 717.Bl -tag -width ".Dv BUS_DMA_NOWAIT" 718.It Dv BUS_DMA_NOWAIT 719The load should not be deferred in case of insufficient mapping resources, 720and instead should return immediately with an appropriate error. 721.It Dv BUS_DMA_NOCACHE 722The generated transactions to and from the virtual page are non-cacheable. 723For 724.Fn bus_dmamap_load , 725the 726.Dv BUS_DMA_NOCACHE 727flag is currently implemented on sparc64. 728.El 729.El 730.Pp 731Return values to the caller are as follows: 732.Bl -tag -width ".Er EINPROGRESS" 733.It 0 734The callback has been called and completed. 735The status of the mapping has been delivered to the callback. 736.It Er EINPROGRESS 737The mapping has been deferred for lack of resources. 738The callback will be called as soon as resources are available. 739Callbacks are serviced in FIFO order. 740.Pp 741Note that subsequent load operations for the same tag that do not require 742extra resources will still succeed. 743This may result in out-of-order processing of requests. 744If the caller requires the order of requests to be preserved, 745then the caller is required to stall subsequent requests until a pending 746request's callback is invoked. 747.It Er ENOMEM 748The load request has failed due to insufficient resources, and the caller 749specifically used the 750.Dv BUS_DMA_NOWAIT 751flag. 752.It Er EINVAL 753The load request was invalid. 754The callback has been called and has been provided the same error. 755This error value may indicate that 756.Fa dmat , 757.Fa map , 758.Fa buf , 759or 760.Fa callback 761were invalid, or 762.Fa buflen 763was larger than the 764.Fa maxsize 765argument used to create the dma tag 766.Fa dmat . 767.El 768.Pp 769When the callback is called, it is presented with an error value 770indicating the disposition of the mapping. 771Error may be one of the following: 772.Bl -tag -width ".Er EINPROGRESS" 773.It 0 774The mapping was successful and the 775.Fa dm_segs 776callback argument contains an array of 777.Vt bus_dma_segment_t 778elements describing the mapping. 779This array is only valid during the scope of the callback function. 780.It Er EFBIG 781A mapping could not be achieved within the segment constraints provided 782in the tag even though the requested allocation size was less than maxsize. 783.El 784.It Fn bus_dmamap_load_bio "dmat" "map" "bio" "callback" "callback_arg" "flags" 785This is a variation of 786.Fn bus_dmamap_load 787which maps buffers pointed to by 788.Fa bio 789for DMA transfers. 790.Fa bio 791may point to either a mapped or unmapped buffer. 792.It Fn bus_dmamap_load_ccb "dmat" "map" "ccb" "callback" "callback_arg" "flags" 793This is a variation of 794.Fn bus_dmamap_load 795which maps data pointed to by 796.Fa ccb 797for DMA transfers. 798The data for 799.Fa ccb 800may be any of the following types: 801.Bl -tag -width ".Er CAM_DATA_SG_PADDR" 802.It CAM_DATA_VADDR 803The data is a single KVA buffer. 804.It CAM_DATA_PADDR 805The data is a single bus address range. 806.It CAM_DATA_SG 807The data is a scatter/gather list of KVA buffers. 808.It CAM_DATA_SG_PADDR 809The data is a scatter/gather list of bus address ranges. 810.It CAM_DATA_BIO 811The data is contained in a 812.Vt struct bio 813attached to the CCB. 814.El 815.Pp 816.Fn bus_dmamap_load_ccb 817supports the following CCB XPT function codes: 818.Pp 819.Bl -item -offset indent -compact 820.It 821XPT_ATA_IO 822.It 823XPT_CONT_TARGET_IO 824.It 825XPT_SCSI_IO 826.El 827.It Fn bus_dmamap_load_mbuf "dmat" "map" "mbuf" "callback2" "callback_arg" \ 828"flags" 829This is a variation of 830.Fn bus_dmamap_load 831which maps mbuf chains 832for DMA transfers. 833A 834.Vt bus_size_t 835argument is also passed to the callback routine, which 836contains the mbuf chain's packet header length. 837The 838.Dv BUS_DMA_NOWAIT 839flag is implied, thus no callback deferral will happen. 840.Pp 841Mbuf chains are assumed to be in kernel virtual address space. 842.Pp 843Beside the error values listed for 844.Fn bus_dmamap_load , 845.Er EINVAL 846will be returned if the size of the mbuf chain exceeds the maximum limit of the 847DMA tag. 848.It Fn bus_dmamap_load_mbuf_sg "dmat" "map" "mbuf" "segs" "nsegs" "flags" 849This is just like 850.Fn bus_dmamap_load_mbuf 851except that it returns immediately without calling a callback function. 852It is provided for efficiency. 853The scatter/gather segment array 854.Va segs 855is provided by the caller and filled in directly by the function. 856The 857.Va nsegs 858argument is returned with the number of segments filled in. 859Returns the same errors as 860.Fn bus_dmamap_load_mbuf . 861.It Fn bus_dmamap_load_uio "dmat" "map" "uio" "callback2" "callback_arg" "flags" 862This is a variation of 863.Fn bus_dmamap_load 864which maps buffers pointed to by 865.Fa uio 866for DMA transfers. 867A 868.Vt bus_size_t 869argument is also passed to the callback routine, which contains the size of 870.Fa uio , 871i.e. 872.Fa uio->uio_resid . 873The 874.Dv BUS_DMA_NOWAIT 875flag is implied, thus no callback deferral will happen. 876Returns the same errors as 877.Fn bus_dmamap_load . 878.Pp 879If 880.Fa uio->uio_segflg 881is 882.Dv UIO_USERSPACE , 883then it is assumed that the buffer, 884.Fa uio 885is in 886.Fa "uio->uio_td->td_proc" Ns 's 887address space. 888User space memory must be in-core and wired prior to attempting a map 889load operation. 890Pages may be locked using 891.Xr vslock 9 . 892.It Fn bus_dmamap_unload "dmat" "map" 893Unloads a DMA map. 894Arguments are as follows: 895.Bl -tag -width ".Fa dmam" 896.It Fa dmat 897DMA tag used to allocate 898.Fa map . 899.It Fa map 900The DMA map that is to be unloaded. 901.El 902.Pp 903.Fn bus_dmamap_unload 904will not perform any implicit synchronization of DMA buffers. 905This must be done explicitly by a call to 906.Fn bus_dmamap_sync 907prior to unloading the map. 908.It Fn bus_dmamap_sync "dmat" "map" "op" 909Performs synchronization of a device visible mapping with the CPU visible 910memory referenced by that mapping. 911Arguments are as follows: 912.Bl -tag -width ".Fa dmat" 913.It Fa dmat 914DMA tag used to allocate 915.Fa map . 916.It Fa map 917The DMA mapping to be synchronized. 918.It Fa op 919Type of synchronization operation to perform. 920See the definition of 921.Vt bus_dmasync_op_t 922for a description of the acceptable values for 923.Fa op . 924.El 925.Pp 926The 927.Fn bus_dmamap_sync 928function 929is the method used to ensure that CPU's and device's direct 930memory access (DMA) to shared 931memory is coherent. 932For example, the CPU might be used to set up the contents of a buffer 933that is to be made available to a device. 934To ensure that the data are visible via the device's mapping of that 935memory, the buffer must be loaded and a DMA sync operation of 936.Dv BUS_DMASYNC_PREWRITE 937must be performed after the CPU has updated the buffer and before the device 938access is initiated. 939If the CPU modifies this buffer again later, another 940.Dv BUS_DMASYNC_PREWRITE 941sync operation must be performed before an additional device 942access. 943Conversely, suppose a device updates memory that is to be read by a CPU. 944In this case, the buffer must be loaded, and a DMA sync operation of 945.Dv BUS_DMASYNC_PREREAD 946must be performed before the device access is initiated. 947The CPU will only be able to see the results of this memory update 948once the DMA operation has completed and a 949.Dv BUS_DMASYNC_POSTREAD 950sync operation has been performed. 951.Pp 952If read and write operations are not preceded and followed by the 953appropriate synchronization operations, behavior is undefined. 954.It Fn bus_dmamem_alloc "dmat" "**vaddr" "flags" "*mapp" 955Allocates memory that is mapped into KVA at the address returned 956in 957.Fa vaddr 958and that is permanently loaded into the newly created 959.Vt bus_dmamap_t 960returned via 961.Fa mapp . 962Arguments are as follows: 963.Bl -tag -width ".Fa alignment" 964.It Fa dmat 965DMA tag describing the constraints of the DMA mapping. 966.It Fa vaddr 967Pointer to a pointer that will hold the returned KVA mapping of 968the allocated region. 969.It Fa flags 970Flags are defined as follows: 971.Bl -tag -width ".Dv BUS_DMA_NOWAIT" 972.It Dv BUS_DMA_WAITOK 973The routine can safely wait (sleep) for resources. 974.It Dv BUS_DMA_NOWAIT 975The routine is not allowed to wait for resources. 976If resources are not available, 977.Dv ENOMEM 978is returned. 979.It Dv BUS_DMA_COHERENT 980Attempt to map this memory in a coherent fashion. 981See 982.Fn bus_dmamap_create 983above for a description of this flag. 984For 985.Fn bus_dmamem_alloc , 986the 987.Dv BUS_DMA_COHERENT 988flag is currently implemented on arm, arm64 and sparc64. 989.It Dv BUS_DMA_ZERO 990Causes the allocated memory to be set to all zeros. 991.It Dv BUS_DMA_NOCACHE 992The allocated memory will not be cached in the processor caches. 993All memory accesses appear on the bus and are executed 994without reordering. 995For 996.Fn bus_dmamem_alloc , 997the 998.Dv BUS_DMA_NOCACHE 999flag is currently implemented on amd64 and i386 where it results in the 1000Strong Uncacheable PAT to be set for the allocated virtual address range. 1001.El 1002.It Fa mapp 1003Pointer to a 1004.Vt bus_dmamap_t 1005where the resulting DMA map will be stored. 1006.El 1007.Pp 1008The size of memory to be allocated is 1009.Fa maxsize 1010as specified in the call to 1011.Fn bus_dma_tag_create 1012for 1013.Fa dmat . 1014.Pp 1015The current implementation of 1016.Fn bus_dmamem_alloc 1017will allocate all requests as a single segment. 1018.Pp 1019An initial load operation is required to obtain the bus address of the allocated 1020memory, and an unload operation is required before freeing the memory, as 1021described below in 1022.Fn bus_dmamem_free . 1023Maps are automatically handled by this function and should not be explicitly 1024allocated or destroyed. 1025.Pp 1026Although an explicit load is not required for each access to the memory 1027referenced by the returned map, the synchronization requirements 1028as described in the 1029.Fn bus_dmamap_sync 1030section still apply and should be used to achieve portability on architectures 1031without coherent buses. 1032.Pp 1033Returns 1034.Er ENOMEM 1035if sufficient memory is not available for completing 1036the operation. 1037.It Fn bus_dmamem_free "dmat" "*vaddr" "map" 1038Frees memory previously allocated by 1039.Fn bus_dmamem_alloc . 1040Any mappings 1041will be invalidated. 1042Arguments are as follows: 1043.Bl -tag -width ".Fa vaddr" 1044.It Fa dmat 1045DMA tag. 1046.It Fa vaddr 1047Kernel virtual address of the memory. 1048.It Fa map 1049DMA map to be invalidated. 1050.El 1051.El 1052.Sh RETURN VALUES 1053Behavior is undefined if invalid arguments are passed to 1054any of the above functions. 1055If sufficient resources cannot be allocated for a given 1056transaction, 1057.Er ENOMEM 1058is returned. 1059All 1060routines that are not of type 1061.Vt void 1062will return 0 on success or an error 1063code on failure as discussed above. 1064.Pp 1065All 1066.Vt void 1067routines will succeed if provided with valid arguments. 1068.Sh LOCKING 1069Two locking protocols are used by 1070.Nm . 1071The first is a private global lock that is used to synchronize access to the 1072bounce buffer pool on the architectures that make use of them. 1073This lock is strictly a leaf lock that is only used internally to 1074.Nm 1075and is not exposed to clients of the API. 1076.Pp 1077The second protocol involves protecting various resources stored in the tag. 1078Since almost all 1079.Nm 1080operations are done through requests from the driver that created the tag, 1081the most efficient way to protect the tag resources is through the lock that 1082the driver uses. 1083In cases where 1084.Nm 1085acts on its own without being called by the driver, the lock primitive 1086specified in the tag is acquired and released automatically. 1087An example of this is when the 1088.Fn bus_dmamap_load 1089callback function is called from a deferred context instead of the driver 1090context. 1091This means that certain 1092.Nm 1093functions must always be called with the same lock held that is specified in the 1094tag. 1095These functions include: 1096.Pp 1097.Bl -item -offset indent -compact 1098.It 1099.Fn bus_dmamap_load 1100.It 1101.Fn bus_dmamap_load_bio 1102.It 1103.Fn bus_dmamap_load_ccb 1104.It 1105.Fn bus_dmamap_load_mbuf 1106.It 1107.Fn bus_dmamap_load_mbuf_sg 1108.It 1109.Fn bus_dmamap_load_uio 1110.It 1111.Fn bus_dmamap_unload 1112.It 1113.Fn bus_dmamap_sync 1114.El 1115.Pp 1116There is one exception to this rule. 1117It is common practice to call some of these functions during driver start-up 1118without any locks held. 1119So long as there is a guarantee of no possible concurrent use of the tag by 1120different threads during this operation, it is safe to not hold a lock for 1121these functions. 1122.Pp 1123Certain 1124.Nm 1125operations should not be called with the driver lock held, either because 1126they are already protected by an internal lock, or because they might sleep 1127due to memory or resource allocation. 1128The following functions must not be 1129called with any non-sleepable locks held: 1130.Pp 1131.Bl -item -offset indent -compact 1132.It 1133.Fn bus_dma_tag_create 1134.It 1135.Fn bus_dmamap_create 1136.It 1137.Fn bus_dmamem_alloc 1138.El 1139.Pp 1140All other functions do not have a locking protocol and can thus be 1141called with or without any system or driver locks held. 1142.Sh SEE ALSO 1143.Xr devclass 9 , 1144.Xr device 9 , 1145.Xr driver 9 , 1146.Xr rman 9 , 1147.Xr vslock 9 1148.Pp 1149.Rs 1150.%A "Jason R. Thorpe" 1151.%T "A Machine-Independent DMA Framework for NetBSD" 1152.%J "Proceedings of the Summer 1998 USENIX Technical Conference" 1153.%Q "USENIX Association" 1154.%D "June 1998" 1155.Re 1156.Sh HISTORY 1157The 1158.Nm 1159interface first appeared in 1160.Nx 1.3 . 1161.Pp 1162The 1163.Nm 1164API was adopted from 1165.Nx 1166for use in the CAM SCSI subsystem. 1167The alterations to the original API were aimed to remove the need for 1168a 1169.Vt bus_dma_segment_t 1170array stored in each 1171.Vt bus_dmamap_t 1172while allowing callers to queue up on scarce resources. 1173.Sh AUTHORS 1174The 1175.Nm 1176interface was designed and implemented by 1177.An Jason R. Thorpe 1178of the Numerical Aerospace Simulation Facility, NASA Ames Research Center. 1179Additional input on the 1180.Nm 1181design was provided by 1182.An -nosplit 1183.An Chris Demetriou , 1184.An Charles Hannum , 1185.An Ross Harvey , 1186.An Matthew Jacob , 1187.An Jonathan Stone , 1188and 1189.An Matt Thomas . 1190.Pp 1191The 1192.Nm 1193interface in 1194.Fx 1195benefits from the contributions of 1196.An Justin T. Gibbs , 1197.An Peter Wemm , 1198.An Doug Rabson , 1199.An Matthew N. Dodd , 1200.An Sam Leffler , 1201.An Maxime Henrion , 1202.An Jake Burkholder , 1203.An Takahashi Yoshihiro , 1204.An Scott Long 1205and many others. 1206.Pp 1207This manual page was written by 1208.An Hiten M. Pandya 1209and 1210.An Justin T. Gibbs . 1211