124503465SHiten Pandya.\" Copyright (c) 2002, 2003 Hiten M. Pandya. 224503465SHiten Pandya.\" All rights reserved. 324503465SHiten Pandya.\" 424503465SHiten Pandya.\" Redistribution and use in source and binary forms, with or without 524503465SHiten Pandya.\" modification, are permitted provided that the following conditions 624503465SHiten Pandya.\" are met: 724503465SHiten Pandya.\" 1. Redistributions of source code must retain the above copyright 824503465SHiten Pandya.\" notice, this list of conditions, and the following disclaimer, 924503465SHiten Pandya.\" without modification, immediately at the beginning of the file. 1024503465SHiten Pandya.\" 2. The name of the author may not be used to endorse or promote products 1124503465SHiten Pandya.\" derived from this software without specific prior written permission. 1224503465SHiten Pandya.\" 1324503465SHiten Pandya.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1424503465SHiten Pandya.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1524503465SHiten Pandya.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1624503465SHiten Pandya.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR, CONTRIBUTORS OR THE 1724503465SHiten Pandya.\" VOICES IN HITEN PANDYA'S HEAD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 1824503465SHiten Pandya.\" SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 1924503465SHiten Pandya.\" TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 2024503465SHiten Pandya.\" PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 2124503465SHiten Pandya.\" LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 2224503465SHiten Pandya.\" NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 2324503465SHiten Pandya.\" SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2424503465SHiten Pandya.\" 2524503465SHiten Pandya.\" Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 2624503465SHiten Pandya.\" All rights reserved. 2724503465SHiten Pandya.\" 2824503465SHiten Pandya.\" This code is derived from software contributed to The NetBSD Foundation 2924503465SHiten Pandya.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 3024503465SHiten Pandya.\" NASA Ames Research Center. 3124503465SHiten Pandya.\" 3224503465SHiten Pandya.\" Redistribution and use in source and binary forms, with or without 3324503465SHiten Pandya.\" modification, are permitted provided that the following conditions 3424503465SHiten Pandya.\" are met: 3524503465SHiten Pandya.\" 1. Redistributions of source code must retain the above copyright 3624503465SHiten Pandya.\" notice, this list of conditions and the following disclaimer. 3724503465SHiten Pandya.\" 2. Redistributions in binary form must reproduce the above copyright 3824503465SHiten Pandya.\" notice, this list of conditions and the following disclaimer in the 3924503465SHiten Pandya.\" documentation and/or other materials provided with the distribution. 4024503465SHiten Pandya.\" 4124503465SHiten Pandya.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 4224503465SHiten Pandya.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 4324503465SHiten Pandya.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 4424503465SHiten Pandya.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 4524503465SHiten Pandya.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 4624503465SHiten Pandya.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 4724503465SHiten Pandya.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 4824503465SHiten Pandya.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 4924503465SHiten Pandya.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 5024503465SHiten Pandya.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 5124503465SHiten Pandya.\" POSSIBILITY OF SUCH DAMAGE. 5224503465SHiten Pandya.\" 5324503465SHiten Pandya.\" $FreeBSD$ 5424503465SHiten Pandya.\" $NetBSD: bus_dma.9,v 1.25 2002/10/14 13:43:16 wiz Exp $ 5524503465SHiten Pandya.\" 56*c0341432SJohn Baldwin.Dd March 27, 2020 5724503465SHiten Pandya.Dt BUS_DMA 9 5824503465SHiten Pandya.Os 5924503465SHiten Pandya.Sh NAME 6024503465SHiten Pandya.Nm bus_dma , 6124503465SHiten Pandya.Nm bus_dma_tag_create , 6224503465SHiten Pandya.Nm bus_dma_tag_destroy , 63757d4fbaSScott Long.Nm bus_dma_template_init , 64757d4fbaSScott Long.Nm bus_dma_template_tag , 65757d4fbaSScott Long.Nm bus_dma_template_clone , 6624503465SHiten Pandya.Nm bus_dmamap_create , 6724503465SHiten Pandya.Nm bus_dmamap_destroy , 6824503465SHiten Pandya.Nm bus_dmamap_load , 69a073133cSJim Harris.Nm bus_dmamap_load_bio , 70a073133cSJim Harris.Nm bus_dmamap_load_ccb , 71*c0341432SJohn Baldwin.Nm bus_dmamap_load_crp , 7224503465SHiten Pandya.Nm bus_dmamap_load_mbuf , 73824f4edfSScott Long.Nm bus_dmamap_load_mbuf_sg , 7424503465SHiten Pandya.Nm bus_dmamap_load_uio , 7524503465SHiten Pandya.Nm bus_dmamap_unload , 7624503465SHiten Pandya.Nm bus_dmamap_sync , 7724503465SHiten Pandya.Nm bus_dmamem_alloc , 78a1bd700aSHiten Pandya.Nm bus_dmamem_free 7924503465SHiten Pandya.Nd Bus and Machine Independent DMA Mapping Interface 8024503465SHiten Pandya.Sh SYNOPSIS 8124503465SHiten Pandya.In machine/bus.h 8224503465SHiten Pandya.Ft int 8324503465SHiten Pandya.Fn bus_dma_tag_create "bus_dma_tag_t parent" "bus_size_t alignment" \ 845c8d3de0SJohn Baldwin"bus_addr_t boundary" "bus_addr_t lowaddr" "bus_addr_t highaddr" \ 8524503465SHiten Pandya"bus_dma_filter_t *filtfunc" "void *filtfuncarg" "bus_size_t maxsize" \ 860e5f9b7dSScott Long"int nsegments" "bus_size_t maxsegsz" "int flags" "bus_dma_lock_t *lockfunc" \ 870e5f9b7dSScott Long"void *lockfuncarg" "bus_dma_tag_t *dmat" 8824503465SHiten Pandya.Ft int 8924503465SHiten Pandya.Fn bus_dma_tag_destroy "bus_dma_tag_t dmat" 90757d4fbaSScott Long.Ft void 91757d4fbaSScott Long.Fo bus_dma_template_init 92757d4fbaSScott Long.Fa "bus_dma_template_t template" 93757d4fbaSScott Long.Fa "bus_dma_tag_t parent" 94757d4fbaSScott Long.Fc 95757d4fbaSScott Long.Ft int 96757d4fbaSScott Long.Fo bus_dma_template_tag 97757d4fbaSScott Long.Fa "bus_dma_template_t template" 98757d4fbaSScott Long.Fa "bus_dma_tag_t *dmat" 99757d4fbaSScott Long.Fc 100757d4fbaSScott Long.Ft void 101757d4fbaSScott Long.Fo bus_dma_template_clone 102757d4fbaSScott Long.Fa "bus_dma_template_t template" 103757d4fbaSScott Long.Fa "bus_dma_tag_t dmat" 104757d4fbaSScott Long.Fc 10524503465SHiten Pandya.Ft int 10624503465SHiten Pandya.Fn bus_dmamap_create "bus_dma_tag_t dmat" "int flags" "bus_dmamap_t *mapp" 10724503465SHiten Pandya.Ft int 10824503465SHiten Pandya.Fn bus_dmamap_destroy "bus_dma_tag_t dmat" "bus_dmamap_t map" 10924503465SHiten Pandya.Ft int 11024503465SHiten Pandya.Fn bus_dmamap_load "bus_dma_tag_t dmat" "bus_dmamap_t map" "void *buf" \ 11124503465SHiten Pandya"bus_size_t buflen" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 11224503465SHiten Pandya"int flags" 11324503465SHiten Pandya.Ft int 114a073133cSJim Harris.Fn bus_dmamap_load_bio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 115a073133cSJim Harris"struct bio *bio" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 116a073133cSJim Harris"int flags" 117a073133cSJim Harris.Ft int 118a073133cSJim Harris.Fn bus_dmamap_load_ccb "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 119a073133cSJim Harris"union ccb *ccb" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 120a073133cSJim Harris"int flags" 121a073133cSJim Harris.Ft int 122*c0341432SJohn Baldwin.Fn bus_dmamap_load_crp "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 123*c0341432SJohn Baldwin"struct crypto *crp" "bus_dmamap_callback_t *callback" "void *callback_arg" \ 124*c0341432SJohn Baldwin"int flags" 125*c0341432SJohn Baldwin.Ft int 12624503465SHiten Pandya.Fn bus_dmamap_load_mbuf "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 12724503465SHiten Pandya"struct mbuf *mbuf" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 12824503465SHiten Pandya"int flags" 12924503465SHiten Pandya.Ft int 130824f4edfSScott Long.Fn bus_dmamap_load_mbuf_sg "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 131824f4edfSScott Long"struct mbuf *mbuf" "bus_dma_segment_t *segs" "int *nsegs" "int flags" 132824f4edfSScott Long.Ft int 13324503465SHiten Pandya.Fn bus_dmamap_load_uio "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 13424503465SHiten Pandya"struct uio *uio" "bus_dmamap_callback2_t *callback" "void *callback_arg" \ 13524503465SHiten Pandya"int flags" 13624503465SHiten Pandya.Ft void 13724503465SHiten Pandya.Fn bus_dmamap_unload "bus_dma_tag_t dmat" "bus_dmamap_t map" 13824503465SHiten Pandya.Ft void 13924503465SHiten Pandya.Fn bus_dmamap_sync "bus_dma_tag_t dmat" "bus_dmamap_t map" \ 14024503465SHiten Pandya"op" 141cbfef69cSWarner Losh.Ft int 142cbfef69cSWarner Losh.Fn bus_dmamem_alloc "bus_dma_tag_t dmat" "void **vaddr" \ 143cbfef69cSWarner Losh"int flags" "bus_dmamap_t *mapp" 14424503465SHiten Pandya.Ft void 14524503465SHiten Pandya.Fn bus_dmamem_free "bus_dma_tag_t dmat" "void *vaddr" \ 14624503465SHiten Pandya"bus_dmamap_t map" 14724503465SHiten Pandya.Sh DESCRIPTION 14824503465SHiten PandyaDirect Memory Access (DMA) is a method of transferring data 14924503465SHiten Pandyawithout involving the CPU, thus providing higher performance. 15024503465SHiten PandyaA DMA transaction can be achieved between device to memory, 15124503465SHiten Pandyadevice to device, or memory to memory. 15224503465SHiten Pandya.Pp 15324503465SHiten PandyaThe 15424503465SHiten Pandya.Nm 15524503465SHiten PandyaAPI is a bus, device, and machine-independent (MI) interface to 15624503465SHiten PandyaDMA mechanisms. 15724503465SHiten PandyaIt provides the client with flexibility and simplicity by 15824503465SHiten Pandyaabstracting machine dependent issues like setting up 15924503465SHiten PandyaDMA mappings, handling cache issues, bus specific features 16024503465SHiten Pandyaand limitations. 161306095b8SJohn Baldwin.Sh OVERVIEW 162306095b8SJohn BaldwinA tag structure 163306095b8SJohn Baldwin.Vt ( bus_dma_tag_t ) 164306095b8SJohn Baldwinis used to describe the properties of a group of related DMA 165306095b8SJohn Baldwintransactions. 166306095b8SJohn BaldwinOne way to view this is that a tag describes the limitations of a DMA engine. 167306095b8SJohn BaldwinFor example, if a DMA engine in a device is limited to 32-bit addresses, 168306095b8SJohn Baldwinthat limitation is specified by a parameter when creating the tag 169306095b8SJohn Baldwinfor that device. 170306095b8SJohn BaldwinSimilarly, a tag can be marked as requiring buffers whose addresses are 171306095b8SJohn Baldwinaligned to a specific boundary. 172306095b8SJohn Baldwin.Pp 173306095b8SJohn BaldwinSome devices may require multiple tags to describe DMA 174306095b8SJohn Baldwintransactions with differing properties. 175306095b8SJohn BaldwinFor example, a device might require 16-byte alignment of its descriptor ring 176306095b8SJohn Baldwinwhile permitting arbitrary alignment of I/O buffers. 177306095b8SJohn BaldwinIn this case, 178306095b8SJohn Baldwinthe driver must create one tag for the descriptor ring and a separate tag for 179306095b8SJohn BaldwinI/O buffers. 180306095b8SJohn BaldwinIf a device has restrictions that are common to all DMA transactions 181306095b8SJohn Baldwinin addition to restrictions that differ between unrelated groups of 182306095b8SJohn Baldwintransactions, 183306095b8SJohn Baldwinthe driver can first create a 184306095b8SJohn Baldwin.Dq parent 185306095b8SJohn Baldwintag that decribes the common restrictions. 186306095b8SJohn BaldwinThe per-group tags can then inherit these restrictions from this 187306095b8SJohn Baldwin.Dq parent 188306095b8SJohn Baldwintag rather than having to list them explicitly when creating the per-group tags. 189306095b8SJohn Baldwin.Pp 190306095b8SJohn BaldwinA mapping structure 191306095b8SJohn Baldwin.Vt ( bus_dmamap_t ) 192306095b8SJohn Baldwinrepresents a mapping of a memory region for DMA. 193306095b8SJohn BaldwinOn systems with I/O MMUs, 194306095b8SJohn Baldwinthe mapping structure tracks any I/O MMU entries used by a request. 195306095b8SJohn BaldwinFor DMA requests that require bounce pages, 196306095b8SJohn Baldwinthe mapping tracks the bounce pages used. 197306095b8SJohn Baldwin.Pp 198306095b8SJohn BaldwinTo prepare for one or more DMA transactions, 199306095b8SJohn Baldwina mapping must be bound to a memory region by calling one of the 200306095b8SJohn Baldwin.Fn bus_dmamap_load 201306095b8SJohn Baldwinfunctions. 202306095b8SJohn BaldwinThese functions configure the mapping which can include programming entries 203306095b8SJohn Baldwinin an I/O MMU and/or allocating bounce pages. 204306095b8SJohn BaldwinAn output of these functions 205306095b8SJohn Baldwin(either directly or indirectly by invoking a callback routine) 206306095b8SJohn Baldwinis the list of scatter/gather address ranges a consumer can pass to a DMA 207306095b8SJohn Baldwinengine to access the memory region. 208306095b8SJohn BaldwinWhen a mapping is no longer needed, 209306095b8SJohn Baldwinthe mapping must be unloaded via 210306095b8SJohn Baldwin.Fn bus_dmamap_unload . 211306095b8SJohn Baldwin.Pp 212306095b8SJohn BaldwinBefore and after each DMA transaction, 213306095b8SJohn Baldwin.Fn bus_dmamap_sync 214306095b8SJohn Baldwinmust be used to ensure that the correct data is used by the DMA engine and 215306095b8SJohn Baldwinthe CPU. 216306095b8SJohn BaldwinIf a mapping uses bounce pages, 217306095b8SJohn Baldwinthe sync operations copy data between the bounce pages and the memory region 218306095b8SJohn Baldwinbound to the mapping. 219306095b8SJohn BaldwinSync operations also handle architecture-specific details such as CPU cache 220306095b8SJohn Baldwinflushing and CPU memory operation ordering. 221306095b8SJohn Baldwin.Sh STATIC VS DYNAMIC 222306095b8SJohn Baldwin.Nm 223306095b8SJohn Baldwinhandles two types of DMA transactions: static and dynamic. 224306095b8SJohn BaldwinStatic transactions are used with a long-lived memory region that is reused 225306095b8SJohn Baldwinfor many transactions such as a descriptor ring. 226306095b8SJohn BaldwinDynamic transactions are used for transfers to or from transient buffers 227306095b8SJohn Baldwinsuch as I/O buffers holding a network packet or disk block. 228306095b8SJohn BaldwinEach transaction type uses a different subset of the 229306095b8SJohn Baldwin.Nm 230306095b8SJohn BaldwinAPI. 231306095b8SJohn Baldwin.Ss Static Transactions 232306095b8SJohn BaldwinStatic transactions use memory regions allocated by 233306095b8SJohn Baldwin.Nm . 234306095b8SJohn BaldwinEach static memory region is allocated by calling 235306095b8SJohn Baldwin.Fn bus_dmamem_alloc . 236306095b8SJohn BaldwinThis function requires a valid tag describing the properties of the 237306095b8SJohn BaldwinDMA transactions to this region such as alignment or address restrictions. 238306095b8SJohn BaldwinMultiple regions can share a single tag if they share the same restrictions. 239306095b8SJohn Baldwin.Pp 240306095b8SJohn Baldwin.Fn bus_dmamem_alloc 241306095b8SJohn Baldwinallocates a memory region along with a mapping object. 242306095b8SJohn BaldwinThe associated tag, memory region, and mapping object must then be passed to 243306095b8SJohn Baldwin.Fn bus_dmamap_load 244306095b8SJohn Baldwinto bind the mapping to the allocated region and obtain the 245306095b8SJohn Baldwinscatter/gather list. 246306095b8SJohn Baldwin.Pp 247306095b8SJohn BaldwinIt is expected that 248306095b8SJohn Baldwin.Fn bus_dmamem_alloc 249306095b8SJohn Baldwinwill attempt to allocate memory requiring less expensive sync operations 250306095b8SJohn Baldwin(for example, implementations should not allocate regions requiring bounce 251306095b8SJohn Baldwinpages), 252306095b8SJohn Baldwinbut sync operations should still be used. 253306095b8SJohn BaldwinFor example, a driver should use 254306095b8SJohn Baldwin.Fn bus_dmamap_sync 255306095b8SJohn Baldwinin an interrupt handler before reading descriptor ring entries written by the 256306095b8SJohn Baldwindevice prior to the interrupt. 257306095b8SJohn Baldwin.Pp 258306095b8SJohn BaldwinWhen a consumer is finished with a memory region, 259306095b8SJohn Baldwinit should unload the mapping via 260306095b8SJohn Baldwin.Fn bus_dmamap_unload 261306095b8SJohn Baldwinand then release the memory region and mapping object via 262306095b8SJohn Baldwin.Fn bus_dmamem_free . 263306095b8SJohn Baldwin.Ss Dynamic Transactions 264306095b8SJohn BaldwinDynamic transactions map memory regions provided by other parts of the system. 265306095b8SJohn BaldwinA tag must be created via 266306095b8SJohn Baldwin.Fn bus_dma_tag_create 267306095b8SJohn Baldwinto describe the DMA transactions to and from these memory regions, 268306095b8SJohn Baldwinand a pool of mapping objects must be allocated via 269306095b8SJohn Baldwin.Fn bus_dmamap_create 270306095b8SJohn Baldwinto track the mappings of any in-flight transactions. 271306095b8SJohn Baldwin.Pp 272306095b8SJohn BaldwinWhen a consumer wishes to schedule a transaction for a memory region, 273306095b8SJohn Baldwinthe consumer must first obtain an unused mapping object from its pool 274306095b8SJohn Baldwinof mapping objects. 275306095b8SJohn BaldwinThe memory region must be bound to the mapping object via one of the 276306095b8SJohn Baldwin.Fn bus_dmamap_load 277306095b8SJohn Baldwinfunctions. 278306095b8SJohn BaldwinBefore scheduling the transaction, 279306095b8SJohn Baldwinthe consumer should sync the memory region via 280306095b8SJohn Baldwin.Fn bus_dmamap_sync 281306095b8SJohn Baldwinwith one or more of the 282306095b8SJohn Baldwin.Dq PRE 283306095b8SJohn Baldwinflags. 284306095b8SJohn BaldwinAfter the transaction has completed, 285306095b8SJohn Baldwinthe consumer should sync the memory region via 286306095b8SJohn Baldwin.Fn bus_dmamap_sync 287306095b8SJohn Baldwinwith one or more of the 288306095b8SJohn Baldwin.Dq POST 289306095b8SJohn Baldwinflags. 290306095b8SJohn BaldwinThe mapping can then be unloaded via 291306095b8SJohn Baldwin.Fn bus_dmamap_unload , 292306095b8SJohn Baldwinand the mapping object can be returned to the pool of unused mapping objects. 293306095b8SJohn Baldwin.Pp 294306095b8SJohn BaldwinWhen a consumer is no longer scheduling DMA transactions, 295306095b8SJohn Baldwinthe mapping objects should be freed via 296306095b8SJohn Baldwin.Fn bus_dmamap_destroy , 297306095b8SJohn Baldwinand the tag should be freed via 298306095b8SJohn Baldwin.Fn bus_dma_tag_destroy . 29924503465SHiten Pandya.Sh STRUCTURES AND TYPES 30081ae4b8dSRuslan Ermilov.Bl -tag -width indent 30124503465SHiten Pandya.It Vt bus_dma_tag_t 30224503465SHiten PandyaA machine-dependent (MD) opaque type that describes the 303306095b8SJohn Baldwincharacteristics of a group of DMA transactions. 30424503465SHiten PandyaDMA tags are organized into a hierarchy, with each child 30524503465SHiten Pandyatag inheriting the restrictions of its parent. 30624503465SHiten PandyaThis allows all devices along the path of DMA transactions 30724503465SHiten Pandyato contribute to the constraints of those transactions. 308757d4fbaSScott Long.It Vt bus_dma_template_t 309757d4fbaSScott LongA template structure for creating a 310757d4fbaSScott Long.Fa bus_dma_tag_t 311757d4fbaSScott Longfrom a set of defaults. 312757d4fbaSScott LongOnce initialized with 313757d4fbaSScott Long.Fn bus_dma_template_init , 314757d4fbaSScott Longa driver can over-ride individual fields to suit its needs. 315757d4fbaSScott LongThe following fields have the indicated values: 316757d4fbaSScott Long.Bd -literal 317757d4fbaSScott Long alignment 1 318757d4fbaSScott Long boundary 0 319757d4fbaSScott Long lowaddr BUS_SPACE_MAXADDR 320757d4fbaSScott Long highaddr BUS_SPACE_MAXADDR 321757d4fbaSScott Long maxsize BUS_SPACE_MAXSIZE 322757d4fbaSScott Long nsegments BUS_SPACE_UNRESTRICTED 323757d4fbaSScott Long maxsegsize BUS_SPACE_MAXSIZE 324757d4fbaSScott Long flags 0 325757d4fbaSScott Long lockfunc NULL 326757d4fbaSScott Long lockfuncarg NULL 327757d4fbaSScott Long.Ed 328757d4fbaSScott Long.Pp 329757d4fbaSScott LongDescriptions of each field are documented with 330757d4fbaSScott Long.Fn bus_dma_tag_create . 331757d4fbaSScott LongNote that the 332757d4fbaSScott Long.Fa filtfunc 333757d4fbaSScott Longand 334757d4fbaSScott Long.Fa filtfuncarg 335757d4fbaSScott Longattributes of the DMA tag are not supported with templates. 33624503465SHiten Pandya.It Vt bus_dma_filter_t 33724503465SHiten PandyaClient specified address filter having the format: 33881ae4b8dSRuslan Ermilov.Bl -tag -width indent 33924503465SHiten Pandya.It Ft int 34024503465SHiten Pandya.Fn "client_filter" "void *filtarg" "bus_addr_t testaddr" 34124503465SHiten Pandya.El 34281ae4b8dSRuslan Ermilov.Pp 34324503465SHiten PandyaAddress filters can be specified during tag creation to allow 34459892d33SRuslan Ermilovfor devices whose DMA address restrictions cannot be specified 34524503465SHiten Pandyaby a single window. 34624503465SHiten PandyaThe 34724503465SHiten Pandya.Fa filtarg 3482f46d621SJohn Baldwinargument is specified by the client during tag creation to be passed to all 34924503465SHiten Pandyainvocations of the callback. 35024503465SHiten PandyaThe 35124503465SHiten Pandya.Fa testaddr 35224503465SHiten Pandyaargument contains a potential starting address of a DMA mapping. 35324503465SHiten PandyaThe filter function operates on the set of addresses from 35424503465SHiten Pandya.Fa testaddr 35524503465SHiten Pandyato 35624503465SHiten Pandya.Ql trunc_page(testaddr) + PAGE_SIZE - 1 , 35724503465SHiten Pandyainclusive. 3582f46d621SJohn BaldwinThe filter function should return zero if any mapping in this range 3592f46d621SJohn Baldwincan be accommodated by the device and non-zero otherwise. 36024503465SHiten Pandya.It Vt bus_dma_segment_t 36124503465SHiten PandyaA machine-dependent type that describes individual 36224503465SHiten PandyaDMA segments. 3632f46d621SJohn BaldwinIt contains the following fields: 36424503465SHiten Pandya.Bd -literal 36524503465SHiten Pandya bus_addr_t ds_addr; 36624503465SHiten Pandya bus_size_t ds_len; 36724503465SHiten Pandya.Ed 36881ae4b8dSRuslan Ermilov.Pp 36924503465SHiten PandyaThe 37024503465SHiten Pandya.Fa ds_addr 37124503465SHiten Pandyafield contains the device visible address of the DMA segment, and 37224503465SHiten Pandya.Fa ds_len 37324503465SHiten Pandyacontains the length of the DMA segment. 37424503465SHiten PandyaAlthough the DMA segments returned by a mapping call will adhere to 37524503465SHiten Pandyaall restrictions necessary for a successful DMA operation, some conversion 3765203edcdSRuslan Ermilov(e.g.\& a conversion from host byte order to the device's byte order) is 37724503465SHiten Pandyaalmost always required when presenting segment information to the device. 37824503465SHiten Pandya.It Vt bus_dmamap_t 37924503465SHiten PandyaA machine-dependent opaque type describing an individual mapping. 38071bb1f9bSScott LongOne map is used for each memory allocation that will be loaded. 38171bb1f9bSScott LongMaps can be reused once they have been unloaded. 38271bb1f9bSScott LongMultiple maps can be associated with one DMA tag. 38381ae4b8dSRuslan ErmilovWhile the value of the map may evaluate to 38481ae4b8dSRuslan Ermilov.Dv NULL 38581ae4b8dSRuslan Ermilovon some platforms under certain conditions, 38681ae4b8dSRuslan Ermilovit should never be assumed that it will be 38781ae4b8dSRuslan Ermilov.Dv NULL 38881ae4b8dSRuslan Ermilovin all cases. 38924503465SHiten Pandya.It Vt bus_dmamap_callback_t 39024503465SHiten PandyaClient specified callback for receiving mapping information resulting from 39124503465SHiten Pandyathe load of a 39224503465SHiten Pandya.Vt bus_dmamap_t 39324503465SHiten Pandyavia 394a073133cSJim Harris.Fn bus_dmamap_load , 395*c0341432SJohn Baldwin.Fn bus_dmamap_load_bio , 396*c0341432SJohn Baldwin.Fn bus_dmamap_load_ccb , 397a073133cSJim Harrisor 398*c0341432SJohn Baldwin.Fn bus_dmamap_load_crp . 39924503465SHiten PandyaCallbacks are of the format: 40081ae4b8dSRuslan Ermilov.Bl -tag -width indent 40124503465SHiten Pandya.It Ft void 40224503465SHiten Pandya.Fn "client_callback" "void *callback_arg" "bus_dma_segment_t *segs" \ 40324503465SHiten Pandya"int nseg" "int error" 40424503465SHiten Pandya.El 40581ae4b8dSRuslan Ermilov.Pp 40624503465SHiten PandyaThe 40724503465SHiten Pandya.Fa callback_arg 40824503465SHiten Pandyais the callback argument passed to dmamap load functions. 40924503465SHiten PandyaThe 41024503465SHiten Pandya.Fa segs 41124503465SHiten Pandyaand 41224503465SHiten Pandya.Fa nseg 4132f46d621SJohn Baldwinarguments describe an array of 41424503465SHiten Pandya.Vt bus_dma_segment_t 41524503465SHiten Pandyastructures that represent the mapping. 41624503465SHiten PandyaThis array is only valid within the scope of the callback function. 41724503465SHiten PandyaThe success or failure of the mapping is indicated by the 41824503465SHiten Pandya.Fa error 4192f46d621SJohn Baldwinargument. 42024503465SHiten PandyaMore information on the use of callbacks can be found in the 42124503465SHiten Pandyadescription of the individual dmamap load functions. 42224503465SHiten Pandya.It Vt bus_dmamap_callback2_t 42324503465SHiten PandyaClient specified callback for receiving mapping information resulting from 42424503465SHiten Pandyathe load of a 42524503465SHiten Pandya.Vt bus_dmamap_t 42624503465SHiten Pandyavia 42724503465SHiten Pandya.Fn bus_dmamap_load_uio 42824503465SHiten Pandyaor 42924503465SHiten Pandya.Fn bus_dmamap_load_mbuf . 43081ae4b8dSRuslan Ermilov.Pp 43124503465SHiten PandyaCallback2s are of the format: 43281ae4b8dSRuslan Ermilov.Bl -tag -width indent 43324503465SHiten Pandya.It Ft void 43424503465SHiten Pandya.Fn "client_callback2" "void *callback_arg" "bus_dma_segment_t *segs" \ 43524503465SHiten Pandya"int nseg" "bus_size_t mapsize" "int error" 43624503465SHiten Pandya.El 43781ae4b8dSRuslan Ermilov.Pp 43824503465SHiten PandyaCallback2's behavior is the same as 43924503465SHiten Pandya.Vt bus_dmamap_callback_t 44024503465SHiten Pandyawith the addition that the length of the data mapped is provided via 44124503465SHiten Pandya.Fa mapsize . 44224503465SHiten Pandya.It Vt bus_dmasync_op_t 44324503465SHiten PandyaMemory synchronization operation specifier. 44436a142c4SRuslan ErmilovBus DMA requires explicit synchronization of memory with its device 44524503465SHiten Pandyavisible mapping in order to guarantee memory coherency. 44624503465SHiten PandyaThe 44724503465SHiten Pandya.Vt bus_dmasync_op_t 44824503465SHiten Pandyaallows the type of DMA operation that will be or has been performed 44924503465SHiten Pandyato be communicated to the system so that the correct coherency measures 45024503465SHiten Pandyaare taken. 4511cb112abSScott LongThe operations are represented as bitfield flags that can be combined together, 4521cb112abSScott Longthough it only makes sense to combine PRE flags or POST flags, not both. 4531cb112abSScott LongSee the 454e8c9966dSJohn-Mark Gurney.Fn bus_dmamap_sync 4551cb112abSScott Longdescription below for more details on how to use these operations. 4566f3d2701SScott Long.Pp 4576f3d2701SScott LongAll operations specified below are performed from the host memory point of view, 4586f3d2701SScott Longwhere a read implies data coming from the device to the host memory, and a write 4596f3d2701SScott Longimplies data going from the host memory to the device. 46007bf564cSRuslan ErmilovAlternatively, the operations can be thought of in terms of driver operations, 461a79d1e83SScott Longwhere reading a network packet or storage sector corresponds to a read operation 462a79d1e83SScott Longin 463a79d1e83SScott Long.Nm . 46407bf564cSRuslan Ermilov.Bl -tag -width ".Dv BUS_DMASYNC_POSTWRITE" 46524503465SHiten Pandya.It Dv BUS_DMASYNC_PREREAD 4666f3d2701SScott LongPerform any synchronization required prior to an update of host memory by the 46707bf564cSRuslan Ermilovdevice. 46824503465SHiten Pandya.It Dv BUS_DMASYNC_PREWRITE 4696f3d2701SScott LongPerform any synchronization required after an update of host memory by the CPU 47007bf564cSRuslan Ermilovand prior to device access to host memory. 47124503465SHiten Pandya.It Dv BUS_DMASYNC_POSTREAD 47207bf564cSRuslan ErmilovPerform any synchronization required after an update of host memory by the 47307bf564cSRuslan Ermilovdevice and prior to CPU access to host memory. 47424503465SHiten Pandya.It Dv BUS_DMASYNC_POSTWRITE 4752f46d621SJohn BaldwinPerform any synchronization required after device access to host memory. 47624503465SHiten Pandya.El 4770e5f9b7dSScott Long.It Vt bus_dma_lock_t 478c7d3a65dSHiten PandyaClient specified lock/mutex manipulation method. 479c7d3a65dSHiten PandyaThis will be called from 4800e5f9b7dSScott Longwithin busdma whenever a client lock needs to be manipulated. 4814d855643SWarner LoshIn its current form, the function will be called immediately before 4825bbaa5cfSWojciech A. Koszekthe callback for a DMA load operation that has been deferred with 4834d855643SWarner Losh.Dv BUS_DMA_LOCK 4844d855643SWarner Loshand immediately after with 4854d855643SWarner Losh.Dv BUS_DMA_UNLOCK . 4864d855643SWarner LoshIf the load operation does not need to be deferred, then it 4874d855643SWarner Loshwill not be called since the function loading the map should 4884d855643SWarner Loshbe holding the appropriate locks. 4890e5f9b7dSScott LongThis method is of the format: 49081ae4b8dSRuslan Ermilov.Bl -tag -width indent 4910e5f9b7dSScott Long.It Ft void 4920e5f9b7dSScott Long.Fn "lockfunc" "void *lockfunc_arg" "bus_dma_lock_op_t op" 49324503465SHiten Pandya.El 49481ae4b8dSRuslan Ermilov.Pp 4952f46d621SJohn BaldwinThe 4962f46d621SJohn Baldwin.Fa lockfuncarg 4972f46d621SJohn Baldwinargument is specified by the client during tag creation to be passed to all 4982f46d621SJohn Baldwininvocations of the callback. 4992f46d621SJohn BaldwinThe 5002f46d621SJohn Baldwin.Fa op 5012f46d621SJohn Baldwinargument specifies the lock operation to perform. 5022f46d621SJohn Baldwin.Pp 5030e5f9b7dSScott LongTwo 5040e5f9b7dSScott Long.Vt lockfunc 5050e5f9b7dSScott Longimplementations are provided for convenience. 5060e5f9b7dSScott Long.Fn busdma_lock_mutex 5072f46d621SJohn Baldwinperforms standard mutex operations on the sleep mutex provided via 5080e5f9b7dSScott Long.Fa lockfuncarg . 5090e5f9b7dSScott Long.Fn dflt_lock 510c7d3a65dSHiten Pandyawill generate a system panic if it is called. 511c7d3a65dSHiten PandyaIt is substituted into the tag when 5120e5f9b7dSScott Long.Fa lockfunc 51381ae4b8dSRuslan Ermilovis passed as 51481ae4b8dSRuslan Ermilov.Dv NULL 51581ae4b8dSRuslan Ermilovto 5162f46d621SJohn Baldwin.Fn bus_dma_tag_create 5172f46d621SJohn Baldwinand is useful for tags that should not be used with deferred load operations. 5180e5f9b7dSScott Long.It Vt bus_dma_lock_op_t 5190e5f9b7dSScott LongOperations to be performed by the client-specified 5200e5f9b7dSScott Long.Fn lockfunc . 52181ae4b8dSRuslan Ermilov.Bl -tag -width ".Dv BUS_DMA_UNLOCK" 5220e5f9b7dSScott Long.It Dv BUS_DMA_LOCK 5232988974bSMike PritchardAcquires and/or locks the client locking primitive. 5240e5f9b7dSScott Long.It Dv BUS_DMA_UNLOCK 5250e5f9b7dSScott LongReleases and/or unlocks the client locking primitive. 5260e5f9b7dSScott Long.El 5270e5f9b7dSScott Long.El 52824503465SHiten Pandya.Sh FUNCTIONS 52981ae4b8dSRuslan Ermilov.Bl -tag -width indent 53024503465SHiten Pandya.It Fn bus_dma_tag_create "parent" "alignment" "boundary" "lowaddr" \ 53124503465SHiten Pandya"highaddr" "*filtfunc" "*filtfuncarg" "maxsize" "nsegments" "maxsegsz" \ 5329b5c4b66SScott Long"flags" "lockfunc" "lockfuncarg" "*dmat" 533306095b8SJohn BaldwinAllocates a DMA tag, and initializes it according to 53424503465SHiten Pandyathe arguments provided: 53581ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa filtfuncarg" 53624503465SHiten Pandya.It Fa parent 537306095b8SJohn BaldwinA parent tag from which to inherit restrictions. 538306095b8SJohn BaldwinThe restrictions passed in other arguments can only further tighten the 539306095b8SJohn Baldwinrestrictions inherited from the parent tag. 540306095b8SJohn Baldwin.Pp 541306095b8SJohn BaldwinAll tags created by a device driver must inherit from the tag returned by 542306095b8SJohn Baldwin.Fn bus_get_dma_tag 543306095b8SJohn Baldwinto honor restrictions between the parent bridge, CPU memory, and the 54424503465SHiten Pandyadevice. 54524503465SHiten Pandya.It Fa alignment 54624503465SHiten PandyaAlignment constraint, in bytes, of any mappings created using this tag. 54724503465SHiten PandyaThe alignment must be a power of 2. 54824503465SHiten PandyaHardware that can DMA starting at any address would specify 54924503465SHiten Pandya.Em 1 55024503465SHiten Pandyafor byte alignment. 55124503465SHiten PandyaHardware requiring DMA transfers to start on a multiple of 4K 55224503465SHiten Pandyawould specify 55324503465SHiten Pandya.Em 4096 . 55424503465SHiten Pandya.It Fa boundary 55524503465SHiten PandyaBoundary constraint, in bytes, of the target DMA memory region. 55624503465SHiten PandyaThe boundary indicates the set of addresses, all multiples of the 55724503465SHiten Pandyaboundary argument, that cannot be crossed by a single 55824503465SHiten Pandya.Vt bus_dma_segment_t . 5592d4071acSChristian BruefferThe boundary must be a power of 2 and must be no smaller than the 560ab0b83b5SScott Longmaximum segment size. 56124503465SHiten Pandya.Ql 0 56224503465SHiten Pandyaindicates that there are no boundary restrictions. 56381ae4b8dSRuslan Ermilov.It Fa lowaddr , highaddr 56424503465SHiten PandyaBounds of the window of bus address space that 56524503465SHiten Pandya.Em cannot 56624503465SHiten Pandyabe directly accessed by the device. 5675bbaa5cfSWojciech A. KoszekThe window contains all addresses greater than 5685bbaa5cfSWojciech A. Koszek.Fa lowaddr 5695bbaa5cfSWojciech A. Koszekand less than or equal to 5705bbaa5cfSWojciech A. Koszek.Fa highaddr . 5715bbaa5cfSWojciech A. KoszekFor example, a device incapable of DMA above 4GB, would specify a 5725bbaa5cfSWojciech A. Koszek.Fa highaddr 5735bbaa5cfSWojciech A. Koszekof 57424503465SHiten Pandya.Dv BUS_SPACE_MAXADDR 5755bbaa5cfSWojciech A. Koszekand a 5765bbaa5cfSWojciech A. Koszek.Fa lowaddr 5775bbaa5cfSWojciech A. Koszekof 57824503465SHiten Pandya.Dv BUS_SPACE_MAXADDR_32BIT . 5795bbaa5cfSWojciech A. KoszekSimilarly a device that can only perform DMA to addresses below 5805bbaa5cfSWojciech A. Koszek16MB would specify a 5815bbaa5cfSWojciech A. Koszek.Fa highaddr 5825bbaa5cfSWojciech A. Koszekof 58324503465SHiten Pandya.Dv BUS_SPACE_MAXADDR 5845bbaa5cfSWojciech A. Koszekand a 5855bbaa5cfSWojciech A. Koszek.Fa lowaddr 5865bbaa5cfSWojciech A. Koszekof 58724503465SHiten Pandya.Dv BUS_SPACE_MAXADDR_24BIT . 588306095b8SJohn BaldwinSome implementations require that some region of device visible 58924503465SHiten Pandyaaddress space, overlapping available host memory, be outside the 59024503465SHiten Pandyawindow. 59124503465SHiten PandyaThis area of 59224503465SHiten Pandya.Ql safe memory 59324503465SHiten Pandyais used to bounce requests that would otherwise conflict with 59424503465SHiten Pandyathe exclusion window. 59524503465SHiten Pandya.It Fa filtfunc 59681ae4b8dSRuslan ErmilovOptional filter function (may be 59781ae4b8dSRuslan Ermilov.Dv NULL ) 59881ae4b8dSRuslan Ermilovto be called for any attempt to 59924503465SHiten Pandyamap memory into the window described by 60024503465SHiten Pandya.Fa lowaddr 60124503465SHiten Pandyaand 60224503465SHiten Pandya.Fa highaddr . 60324503465SHiten PandyaA filter function is only required when the single window described 60424503465SHiten Pandyaby 60524503465SHiten Pandya.Fa lowaddr 60624503465SHiten Pandyaand 60724503465SHiten Pandya.Fa highaddr 60824503465SHiten Pandyacannot adequately describe the constraints of the device. 60924503465SHiten PandyaThe filter function will be called for every machine page 61024503465SHiten Pandyathat overlaps the exclusion window. 61124503465SHiten Pandya.It Fa filtfuncarg 61224503465SHiten PandyaArgument passed to all calls to the filter function for this tag. 61381ae4b8dSRuslan ErmilovMay be 61481ae4b8dSRuslan Ermilov.Dv NULL . 61524503465SHiten Pandya.It Fa maxsize 61624503465SHiten PandyaMaximum size, in bytes, of the sum of all segment lengths in a given 61724503465SHiten PandyaDMA mapping associated with this tag. 61824503465SHiten Pandya.It Fa nsegments 61924503465SHiten PandyaNumber of discontinuities (scatter/gather segments) allowed 62024503465SHiten Pandyain a DMA mapped region. 62124503465SHiten PandyaIf there is no restriction, 62224503465SHiten Pandya.Dv BUS_SPACE_UNRESTRICTED 62324503465SHiten Pandyamay be specified. 624094dc7e3SJohn-Mark Gurney.It Fa maxsegsz 625094dc7e3SJohn-Mark GurneyMaximum size, in bytes, of a segment in any DMA mapped region associated 626094dc7e3SJohn-Mark Gurneywith 627094dc7e3SJohn-Mark Gurney.Fa dmat . 62824503465SHiten Pandya.It Fa flags 62924503465SHiten PandyaAre as follows: 63081ae4b8dSRuslan Ermilov.Bl -tag -width ".Dv BUS_DMA_ALLOCNOW" 63124503465SHiten Pandya.It Dv BUS_DMA_ALLOCNOW 6320f3a0078SScott LongPre-allocate enough resources to handle at least one map load operation on 63371bb1f9bSScott Longthis tag. 63424503465SHiten PandyaIf sufficient resources are not available, 63524503465SHiten Pandya.Er ENOMEM 63624503465SHiten Pandyais returned. 63771bb1f9bSScott LongThis should not be used for tags that only describe buffers that will be 63871bb1f9bSScott Longallocated with 63971bb1f9bSScott Long.Fn bus_dmamem_alloc . 64071bb1f9bSScott LongAlso, due to resource sharing with other tags, this flag does not guarantee 64171bb1f9bSScott Longthat resources will be allocated or reserved exclusively for this tag. 64271bb1f9bSScott LongIt should be treated only as a minor optimization. 643435b87a9SEmmanuel Vadot.It Dv BUS_DMA_COHERENT 644435b87a9SEmmanuel VadotIndicate that the DMA engine and CPU are cache-coherent. 645435b87a9SEmmanuel VadotCached memory may be used to back allocations created by 646435b87a9SEmmanuel Vadot.Fn bus_dmamem_alloc . 647435b87a9SEmmanuel VadotFor 648435b87a9SEmmanuel Vadot.Fn bus_dma_tag_create , 649435b87a9SEmmanuel Vadotthe 650435b87a9SEmmanuel Vadot.Dv BUS_DMA_COHERENT 651435b87a9SEmmanuel Vadotflag is currently implemented on arm64. 65224503465SHiten Pandya.El 6539b5c4b66SScott Long.It Fa lockfunc 65481ae4b8dSRuslan ErmilovOptional lock manipulation function (may be 65581ae4b8dSRuslan Ermilov.Dv NULL ) 65681ae4b8dSRuslan Ermilovto be called when busdma 657c7d3a65dSHiten Pandyaneeds to manipulate a lock on behalf of the client. 65881ae4b8dSRuslan ErmilovIf 65981ae4b8dSRuslan Ermilov.Dv NULL 66081ae4b8dSRuslan Ermilovis specified, 6619b5c4b66SScott Long.Fn dflt_lock 6629b5c4b66SScott Longis used. 6639b5c4b66SScott Long.It Fa lockfuncarg 6649b5c4b66SScott LongOptional argument to be passed to the function specified by 6659b5c4b66SScott Long.Fa lockfunc . 66624503465SHiten Pandya.It Fa dmat 66724503465SHiten PandyaPointer to a bus_dma_tag_t where the resulting DMA tag will 66824503465SHiten Pandyabe stored. 66924503465SHiten Pandya.El 67024503465SHiten Pandya.Pp 67124503465SHiten PandyaReturns 67224503465SHiten Pandya.Er ENOMEM 67324503465SHiten Pandyaif sufficient memory is not available for tag creation 67424503465SHiten Pandyaor allocating mapping resources. 67524503465SHiten Pandya.It Fn bus_dma_tag_destroy "dmat" 67624503465SHiten PandyaDeallocate the DMA tag 67724503465SHiten Pandya.Fa dmat 67824503465SHiten Pandyathat was created by 67924503465SHiten Pandya.Fn bus_dma_tag_create . 68024503465SHiten Pandya.Pp 68124503465SHiten PandyaReturns 68224503465SHiten Pandya.Er EBUSY 68324503465SHiten Pandyaif any DMA maps remain associated with 68424503465SHiten Pandya.Fa dmat 68524503465SHiten Pandyaor 68624503465SHiten Pandya.Ql 0 68724503465SHiten Pandyaon success. 688757d4fbaSScott Long.It Fn bus_dma_template_init "*template" "parent" 689757d4fbaSScott LongInitializes a 690757d4fbaSScott Long.Fa bus_dma_template_t 691757d4fbaSScott Longstructure and associates it with an optional 692757d4fbaSScott Long.Fa parent . 693757d4fbaSScott LongThe 694757d4fbaSScott Long.Fa parent 695757d4fbaSScott Longargument may be NULL. 696757d4fbaSScott Long.It Fn bus_dma_template_tag "*template" "*dmat" 697757d4fbaSScott LongUnpacks a template into a tag, and returns the tag via the 698757d4fbaSScott Long.Fa dmat . 699757d4fbaSScott LongAll return values are identical to 700757d4fbaSScott Long.Fn bus_dma_tag_create . 701757d4fbaSScott Long.It Fn bus_dma_template_clone "*template" "dmat" 702757d4fbaSScott LongClones the fields from a tag to a template. 703757d4fbaSScott LongThis is useful for cloning tags when paired with 704757d4fbaSScott Long.Fn bus_dma_template_tag . 705757d4fbaSScott LongA template that is filled in as a clone does not need to be initialized 706757d4fbaSScott Longfirst. 70724503465SHiten Pandya.It Fn bus_dmamap_create "dmat" "flags" "*mapp" 70824503465SHiten PandyaAllocates and initializes a DMA map. 70924503465SHiten PandyaArguments are as follows: 71081ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa nsegments" 71124503465SHiten Pandya.It Fa dmat 71224503465SHiten PandyaDMA tag. 71324503465SHiten Pandya.It Fa flags 714afbeac3eSMarius StroblAre as follows: 715afbeac3eSMarius Strobl.Bl -tag -width ".Dv BUS_DMA_COHERENT" 716afbeac3eSMarius Strobl.It Dv BUS_DMA_COHERENT 717afbeac3eSMarius StroblAttempt to map the memory loaded with this map such that cache sync 718afbeac3eSMarius Strobloperations are as cheap as possible. 719afbeac3eSMarius StroblThis flag is typically set on maps when the memory loaded with these will 720afbeac3eSMarius Stroblbe accessed by both a CPU and a DMA engine, frequently such as control data 721afbeac3eSMarius Strobland as opposed to streamable data such as receive and transmit buffers. 722afbeac3eSMarius StroblUse of this flag does not remove the requirement of using 723afbeac3eSMarius Strobl.Fn bus_dmamap_sync , 724afbeac3eSMarius Stroblbut it may reduce the cost of performing these operations. 725afbeac3eSMarius Strobl.El 72624503465SHiten Pandya.It Fa mapp 72724503465SHiten PandyaPointer to a 72824503465SHiten Pandya.Vt bus_dmamap_t 72924503465SHiten Pandyawhere the resulting DMA map will be stored. 73024503465SHiten Pandya.El 73124503465SHiten Pandya.Pp 73224503465SHiten PandyaReturns 73324503465SHiten Pandya.Er ENOMEM 73424503465SHiten Pandyaif sufficient memory is not available for creating the 73524503465SHiten Pandyamap or allocating mapping resources. 73624503465SHiten Pandya.It Fn bus_dmamap_destroy "dmat" "map" 73724503465SHiten PandyaFrees all resources associated with a given DMA map. 73824503465SHiten PandyaArguments are as follows: 73981ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa dmat" 74024503465SHiten Pandya.It Fa dmat 74124503465SHiten PandyaDMA tag used to allocate 74224503465SHiten Pandya.Fa map . 74324503465SHiten Pandya.It Fa map 74424503465SHiten PandyaThe DMA map to destroy. 74524503465SHiten Pandya.El 74624503465SHiten Pandya.Pp 74724503465SHiten PandyaReturns 74824503465SHiten Pandya.Er EBUSY 74924503465SHiten Pandyaif a mapping is still active for 75024503465SHiten Pandya.Fa map . 75195929b66SWarner Losh.It Fn bus_dmamap_load "dmat" "map" "buf" "buflen" "*callback" \ 75295929b66SWarner Losh"callback_arg" "flags" 75324503465SHiten PandyaCreates a mapping in device visible address space of 75424503465SHiten Pandya.Fa buflen 75524503465SHiten Pandyabytes of 75624503465SHiten Pandya.Fa buf , 75724503465SHiten Pandyaassociated with the DMA map 75824503465SHiten Pandya.Fa map . 75971bb1f9bSScott LongThis call will always return immediately and will not block for any reason. 76024503465SHiten PandyaArguments are as follows: 76181ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa buflen" 76224503465SHiten Pandya.It Fa dmat 76324503465SHiten PandyaDMA tag used to allocate 76424503465SHiten Pandya.Fa map . 76524503465SHiten Pandya.It Fa map 76624503465SHiten PandyaA DMA map without a currently active mapping. 76724503465SHiten Pandya.It Fa buf 76824503465SHiten PandyaA kernel virtual address pointer to a contiguous (in KVA) buffer, to be 76924503465SHiten Pandyamapped into device visible address space. 77024503465SHiten Pandya.It Fa buflen 77124503465SHiten PandyaThe size of the buffer. 77224503465SHiten Pandya.It Fa callback Fa callback_arg 77324503465SHiten PandyaThe callback function, and its argument. 77471bb1f9bSScott LongThis function is called once sufficient mapping resources are available for 77571bb1f9bSScott Longthe DMA operation. 77671bb1f9bSScott LongIf resources are temporarily unavailable, this function will be deferred until 77771bb1f9bSScott Longlater, but the load operation will still return immediately to the caller. 77871bb1f9bSScott LongThus, callers should not assume that the callback will be called before the 77971bb1f9bSScott Longload returns, and code should be structured appropriately to handle this. 78071bb1f9bSScott LongSee below for specific flags and error codes that control this behavior. 78124503465SHiten Pandya.It Fa flags 78271bb1f9bSScott LongAre as follows: 78381ae4b8dSRuslan Ermilov.Bl -tag -width ".Dv BUS_DMA_NOWAIT" 78481ae4b8dSRuslan Ermilov.It Dv BUS_DMA_NOWAIT 78571bb1f9bSScott LongThe load should not be deferred in case of insufficient mapping resources, 78671bb1f9bSScott Longand instead should return immediately with an appropriate error. 78708390d3bSMarius Strobl.It Dv BUS_DMA_NOCACHE 78808390d3bSMarius StroblThe generated transactions to and from the virtual page are non-cacheable. 78971bb1f9bSScott Long.El 79024503465SHiten Pandya.El 79124503465SHiten Pandya.Pp 79224503465SHiten PandyaReturn values to the caller are as follows: 79381ae4b8dSRuslan Ermilov.Bl -tag -width ".Er EINPROGRESS" 79424503465SHiten Pandya.It 0 79524503465SHiten PandyaThe callback has been called and completed. 79624503465SHiten PandyaThe status of the mapping has been delivered to the callback. 79724503465SHiten Pandya.It Er EINPROGRESS 79824503465SHiten PandyaThe mapping has been deferred for lack of resources. 79924503465SHiten PandyaThe callback will be called as soon as resources are available. 80024503465SHiten PandyaCallbacks are serviced in FIFO order. 80128b5187fSJohn Baldwin.Pp 80228b5187fSJohn BaldwinNote that subsequent load operations for the same tag that do not require 80328b5187fSJohn Baldwinextra resources will still succeed. 80428b5187fSJohn BaldwinThis may result in out-of-order processing of requests. 80528b5187fSJohn BaldwinIf the caller requires the order of requests to be preserved, 80628b5187fSJohn Baldwinthen the caller is required to stall subsequent requests until a pending 80728b5187fSJohn Baldwinrequest's callback is invoked. 80871bb1f9bSScott Long.It Er ENOMEM 80971bb1f9bSScott LongThe load request has failed due to insufficient resources, and the caller 81071bb1f9bSScott Longspecifically used the 81181ae4b8dSRuslan Ermilov.Dv BUS_DMA_NOWAIT 81271bb1f9bSScott Longflag. 81324503465SHiten Pandya.It Er EINVAL 81424503465SHiten PandyaThe load request was invalid. 81571bb1f9bSScott LongThe callback has been called and has been provided the same error. 81624503465SHiten PandyaThis error value may indicate that 81724503465SHiten Pandya.Fa dmat , 81824503465SHiten Pandya.Fa map , 81924503465SHiten Pandya.Fa buf , 82024503465SHiten Pandyaor 82124503465SHiten Pandya.Fa callback 82224503465SHiten Pandyawere invalid, or 82371bb1f9bSScott Long.Fa buflen 82424503465SHiten Pandyawas larger than the 82524503465SHiten Pandya.Fa maxsize 82624503465SHiten Pandyaargument used to create the dma tag 82724503465SHiten Pandya.Fa dmat . 82824503465SHiten Pandya.El 82924503465SHiten Pandya.Pp 83024503465SHiten PandyaWhen the callback is called, it is presented with an error value 83124503465SHiten Pandyaindicating the disposition of the mapping. 83224503465SHiten PandyaError may be one of the following: 83381ae4b8dSRuslan Ermilov.Bl -tag -width ".Er EINPROGRESS" 83424503465SHiten Pandya.It 0 83524503465SHiten PandyaThe mapping was successful and the 83624503465SHiten Pandya.Fa dm_segs 83724503465SHiten Pandyacallback argument contains an array of 83824503465SHiten Pandya.Vt bus_dma_segment_t 83924503465SHiten Pandyaelements describing the mapping. 84024503465SHiten PandyaThis array is only valid during the scope of the callback function. 84124503465SHiten Pandya.It Er EFBIG 84224503465SHiten PandyaA mapping could not be achieved within the segment constraints provided 84324503465SHiten Pandyain the tag even though the requested allocation size was less than maxsize. 84424503465SHiten Pandya.El 845a073133cSJim Harris.It Fn bus_dmamap_load_bio "dmat" "map" "bio" "callback" "callback_arg" "flags" 846a073133cSJim HarrisThis is a variation of 847a073133cSJim Harris.Fn bus_dmamap_load 848a073133cSJim Harriswhich maps buffers pointed to by 849a073133cSJim Harris.Fa bio 850a073133cSJim Harrisfor DMA transfers. 851a073133cSJim Harris.Fa bio 852a073133cSJim Harrismay point to either a mapped or unmapped buffer. 853a073133cSJim Harris.It Fn bus_dmamap_load_ccb "dmat" "map" "ccb" "callback" "callback_arg" "flags" 854a073133cSJim HarrisThis is a variation of 855a073133cSJim Harris.Fn bus_dmamap_load 856a073133cSJim Harriswhich maps data pointed to by 857a073133cSJim Harris.Fa ccb 858a073133cSJim Harrisfor DMA transfers. 859a073133cSJim HarrisThe data for 860a073133cSJim Harris.Fa ccb 861a073133cSJim Harrismay be any of the following types: 862a073133cSJim Harris.Bl -tag -width ".Er CAM_DATA_SG_PADDR" 863a073133cSJim Harris.It CAM_DATA_VADDR 864a073133cSJim HarrisThe data is a single KVA buffer. 865a073133cSJim Harris.It CAM_DATA_PADDR 866a073133cSJim HarrisThe data is a single bus address range. 867a073133cSJim Harris.It CAM_DATA_SG 868a073133cSJim HarrisThe data is a scatter/gather list of KVA buffers. 869a073133cSJim Harris.It CAM_DATA_SG_PADDR 870a073133cSJim HarrisThe data is a scatter/gather list of bus address ranges. 871a073133cSJim Harris.It CAM_DATA_BIO 872a073133cSJim HarrisThe data is contained in a 873a073133cSJim Harris.Vt struct bio 874a073133cSJim Harrisattached to the CCB. 875a073133cSJim Harris.El 876a073133cSJim Harris.Pp 877a073133cSJim Harris.Fn bus_dmamap_load_ccb 878a073133cSJim Harrissupports the following CCB XPT function codes: 879a073133cSJim Harris.Pp 880a073133cSJim Harris.Bl -item -offset indent -compact 881a073133cSJim Harris.It 882a073133cSJim HarrisXPT_ATA_IO 883a073133cSJim Harris.It 884a073133cSJim HarrisXPT_CONT_TARGET_IO 885a073133cSJim Harris.It 886a073133cSJim HarrisXPT_SCSI_IO 887a073133cSJim Harris.El 888*c0341432SJohn Baldwin.It Fn bus_dmamap_load_crp "dmat" "map" "crp" "callback" "callback_arg" "flags" 889*c0341432SJohn BaldwinThis is a variation of 890*c0341432SJohn Baldwin.Fn bus_dmamap_load 891*c0341432SJohn Baldwinwhich maps buffers pointed to by 892*c0341432SJohn Baldwin.Fa crp 893*c0341432SJohn Baldwinfor DMA transfers. 894*c0341432SJohn BaldwinThe 895*c0341432SJohn Baldwin.Dv BUS_DMA_NOWAIT 896*c0341432SJohn Baldwinflag is implied, thus no callback deferral will happen. 89724503465SHiten Pandya.It Fn bus_dmamap_load_mbuf "dmat" "map" "mbuf" "callback2" "callback_arg" \ 89824503465SHiten Pandya"flags" 89924503465SHiten PandyaThis is a variation of 90024503465SHiten Pandya.Fn bus_dmamap_load 90124503465SHiten Pandyawhich maps mbuf chains 90224503465SHiten Pandyafor DMA transfers. 90324503465SHiten PandyaA 90424503465SHiten Pandya.Vt bus_size_t 90524503465SHiten Pandyaargument is also passed to the callback routine, which 90624503465SHiten Pandyacontains the mbuf chain's packet header length. 90771bb1f9bSScott LongThe 90881ae4b8dSRuslan Ermilov.Dv BUS_DMA_NOWAIT 90971bb1f9bSScott Longflag is implied, thus no callback deferral will happen. 91024503465SHiten Pandya.Pp 91124503465SHiten PandyaMbuf chains are assumed to be in kernel virtual address space. 91224503465SHiten Pandya.Pp 91371bb1f9bSScott LongBeside the error values listed for 91471bb1f9bSScott Long.Fn bus_dmamap_load , 91524503465SHiten Pandya.Er EINVAL 91671bb1f9bSScott Longwill be returned if the size of the mbuf chain exceeds the maximum limit of the 91724503465SHiten PandyaDMA tag. 918824f4edfSScott Long.It Fn bus_dmamap_load_mbuf_sg "dmat" "map" "mbuf" "segs" "nsegs" "flags" 919824f4edfSScott LongThis is just like 920824f4edfSScott Long.Fn bus_dmamap_load_mbuf 9214f068961SRuslan Ermilovexcept that it returns immediately without calling a callback function. 9224f068961SRuslan ErmilovIt is provided for efficiency. 923824f4edfSScott LongThe scatter/gather segment array 924824f4edfSScott Long.Va segs 925824f4edfSScott Longis provided by the caller and filled in directly by the function. 926824f4edfSScott LongThe 927824f4edfSScott Long.Va nsegs 928824f4edfSScott Longargument is returned with the number of segments filled in. 929824f4edfSScott LongReturns the same errors as 930824f4edfSScott Long.Fn bus_dmamap_load_mbuf . 93124503465SHiten Pandya.It Fn bus_dmamap_load_uio "dmat" "map" "uio" "callback2" "callback_arg" "flags" 93224503465SHiten PandyaThis is a variation of 93324503465SHiten Pandya.Fn bus_dmamap_load 93424503465SHiten Pandyawhich maps buffers pointed to by 93524503465SHiten Pandya.Fa uio 93624503465SHiten Pandyafor DMA transfers. 93724503465SHiten PandyaA 93824503465SHiten Pandya.Vt bus_size_t 93924503465SHiten Pandyaargument is also passed to the callback routine, which contains the size of 94024503465SHiten Pandya.Fa uio , 94124503465SHiten Pandyai.e. 94224503465SHiten Pandya.Fa uio->uio_resid . 94371bb1f9bSScott LongThe 94481ae4b8dSRuslan Ermilov.Dv BUS_DMA_NOWAIT 94571bb1f9bSScott Longflag is implied, thus no callback deferral will happen. 94671bb1f9bSScott LongReturns the same errors as 94771bb1f9bSScott Long.Fn bus_dmamap_load . 94824503465SHiten Pandya.Pp 94924503465SHiten PandyaIf 95024503465SHiten Pandya.Fa uio->uio_segflg 95124503465SHiten Pandyais 95224503465SHiten Pandya.Dv UIO_USERSPACE , 95324503465SHiten Pandyathen it is assumed that the buffer, 95424503465SHiten Pandya.Fa uio 95524503465SHiten Pandyais in 95624503465SHiten Pandya.Fa "uio->uio_td->td_proc" Ns 's 95724503465SHiten Pandyaaddress space. 95824503465SHiten PandyaUser space memory must be in-core and wired prior to attempting a map 95924503465SHiten Pandyaload operation. 960490ec740SWarner LoshPages may be locked using 961490ec740SWarner Losh.Xr vslock 9 . 96224503465SHiten Pandya.It Fn bus_dmamap_unload "dmat" "map" 96324503465SHiten PandyaUnloads a DMA map. 96424503465SHiten PandyaArguments are as follows: 96581ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa dmam" 96624503465SHiten Pandya.It Fa dmat 96724503465SHiten PandyaDMA tag used to allocate 96824503465SHiten Pandya.Fa map . 96924503465SHiten Pandya.It Fa map 97024503465SHiten PandyaThe DMA map that is to be unloaded. 97124503465SHiten Pandya.El 97224503465SHiten Pandya.Pp 97324503465SHiten Pandya.Fn bus_dmamap_unload 97424503465SHiten Pandyawill not perform any implicit synchronization of DMA buffers. 97524503465SHiten PandyaThis must be done explicitly by a call to 97624503465SHiten Pandya.Fn bus_dmamap_sync 97724503465SHiten Pandyaprior to unloading the map. 97824503465SHiten Pandya.It Fn bus_dmamap_sync "dmat" "map" "op" 97924503465SHiten PandyaPerforms synchronization of a device visible mapping with the CPU visible 98024503465SHiten Pandyamemory referenced by that mapping. 98124503465SHiten PandyaArguments are as follows: 98281ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa dmat" 98324503465SHiten Pandya.It Fa dmat 98424503465SHiten PandyaDMA tag used to allocate 98524503465SHiten Pandya.Fa map . 98624503465SHiten Pandya.It Fa map 98724503465SHiten PandyaThe DMA mapping to be synchronized. 98824503465SHiten Pandya.It Fa op 98924503465SHiten PandyaType of synchronization operation to perform. 99024503465SHiten PandyaSee the definition of 99124503465SHiten Pandya.Vt bus_dmasync_op_t 99224503465SHiten Pandyafor a description of the acceptable values for 99324503465SHiten Pandya.Fa op . 99424503465SHiten Pandya.El 99524503465SHiten Pandya.Pp 99607bf564cSRuslan ErmilovThe 99724503465SHiten Pandya.Fn bus_dmamap_sync 99807bf564cSRuslan Ermilovfunction 99907bf564cSRuslan Ermilovis the method used to ensure that CPU's and device's direct 100007bf564cSRuslan Ermilovmemory access (DMA) to shared 100124503465SHiten Pandyamemory is coherent. 100224503465SHiten PandyaFor example, the CPU might be used to set up the contents of a buffer 100307bf564cSRuslan Ermilovthat is to be made available to a device. 100424503465SHiten PandyaTo ensure that the data are visible via the device's mapping of that 100507bf564cSRuslan Ermilovmemory, the buffer must be loaded and a DMA sync operation of 10066f56dcd4SJohn-Mark Gurney.Dv BUS_DMASYNC_PREWRITE 10072f46d621SJohn Baldwinmust be performed after the CPU has updated the buffer and before the device 10082f46d621SJohn Baldwinaccess is initiated. 10092f46d621SJohn BaldwinIf the CPU modifies this buffer again later, another 101007bf564cSRuslan Ermilov.Dv BUS_DMASYNC_PREWRITE 10112f46d621SJohn Baldwinsync operation must be performed before an additional device 10122f46d621SJohn Baldwinaccess. 10132f46d621SJohn BaldwinConversely, suppose a device updates memory that is to be read by a CPU. 101407bf564cSRuslan ErmilovIn this case, the buffer must be loaded, and a DMA sync operation of 10156f56dcd4SJohn-Mark Gurney.Dv BUS_DMASYNC_PREREAD 10162f46d621SJohn Baldwinmust be performed before the device access is initiated. 101707bf564cSRuslan ErmilovThe CPU will only be able to see the results of this memory update 101807bf564cSRuslan Ermilovonce the DMA operation has completed and a 10196f56dcd4SJohn-Mark Gurney.Dv BUS_DMASYNC_POSTREAD 102007bf564cSRuslan Ermilovsync operation has been performed. 102124503465SHiten Pandya.Pp 102207bf564cSRuslan ErmilovIf read and write operations are not preceded and followed by the 102324503465SHiten Pandyaappropriate synchronization operations, behavior is undefined. 10246f3d2701SScott Long.It Fn bus_dmamem_alloc "dmat" "**vaddr" "flags" "*mapp" 102524503465SHiten PandyaAllocates memory that is mapped into KVA at the address returned 102624503465SHiten Pandyain 102724503465SHiten Pandya.Fa vaddr 10282f46d621SJohn Baldwinand that is permanently loaded into the newly created 102924503465SHiten Pandya.Vt bus_dmamap_t 103024503465SHiten Pandyareturned via 103124503465SHiten Pandya.Fa mapp . 103224503465SHiten PandyaArguments are as follows: 103381ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa alignment" 103424503465SHiten Pandya.It Fa dmat 103524503465SHiten PandyaDMA tag describing the constraints of the DMA mapping. 103624503465SHiten Pandya.It Fa vaddr 103724503465SHiten PandyaPointer to a pointer that will hold the returned KVA mapping of 103824503465SHiten Pandyathe allocated region. 103924503465SHiten Pandya.It Fa flags 104024503465SHiten PandyaFlags are defined as follows: 104181ae4b8dSRuslan Ermilov.Bl -tag -width ".Dv BUS_DMA_NOWAIT" 104224503465SHiten Pandya.It Dv BUS_DMA_WAITOK 104324503465SHiten PandyaThe routine can safely wait (sleep) for resources. 104424503465SHiten Pandya.It Dv BUS_DMA_NOWAIT 104524503465SHiten PandyaThe routine is not allowed to wait for resources. 104624503465SHiten PandyaIf resources are not available, 104724503465SHiten Pandya.Dv ENOMEM 104824503465SHiten Pandyais returned. 104924503465SHiten Pandya.It Dv BUS_DMA_COHERENT 1050afbeac3eSMarius StroblAttempt to map this memory in a coherent fashion. 1051afbeac3eSMarius StroblSee 1052afbeac3eSMarius Strobl.Fn bus_dmamap_create 1053afbeac3eSMarius Stroblabove for a description of this flag. 1054afbeac3eSMarius StroblFor 1055afbeac3eSMarius Strobl.Fn bus_dmamem_alloc , 1056afbeac3eSMarius Stroblthe 105781ae4b8dSRuslan Ermilov.Dv BUS_DMA_COHERENT 105870254772SWarner Loshflag is currently implemented on arm and arm64. 105982d227dcSMaxime Henrion.It Dv BUS_DMA_ZERO 106082d227dcSMaxime HenrionCauses the allocated memory to be set to all zeros. 1061ba0b1618SRobert Noland.It Dv BUS_DMA_NOCACHE 1062ba0b1618SRobert NolandThe allocated memory will not be cached in the processor caches. 1063ba0b1618SRobert NolandAll memory accesses appear on the bus and are executed 1064ba0b1618SRobert Nolandwithout reordering. 106508390d3bSMarius StroblFor 106608390d3bSMarius Strobl.Fn bus_dmamem_alloc , 106708390d3bSMarius Stroblthe 1068ba0b1618SRobert Noland.Dv BUS_DMA_NOCACHE 106908390d3bSMarius Stroblflag is currently implemented on amd64 and i386 where it results in the 107008390d3bSMarius StroblStrong Uncacheable PAT to be set for the allocated virtual address range. 107124503465SHiten Pandya.El 107224503465SHiten Pandya.It Fa mapp 10736f3d2701SScott LongPointer to a 10746f3d2701SScott Long.Vt bus_dmamap_t 10756f3d2701SScott Longwhere the resulting DMA map will be stored. 107624503465SHiten Pandya.El 107724503465SHiten Pandya.Pp 107824503465SHiten PandyaThe size of memory to be allocated is 107924503465SHiten Pandya.Fa maxsize 10802f46d621SJohn Baldwinas specified in the call to 10812f46d621SJohn Baldwin.Fn bus_dma_tag_create 10822f46d621SJohn Baldwinfor 108324503465SHiten Pandya.Fa dmat . 108424503465SHiten Pandya.Pp 108524503465SHiten PandyaThe current implementation of 108624503465SHiten Pandya.Fn bus_dmamem_alloc 108724503465SHiten Pandyawill allocate all requests as a single segment. 108824503465SHiten Pandya.Pp 10896f3d2701SScott LongAn initial load operation is required to obtain the bus address of the allocated 10906f3d2701SScott Longmemory, and an unload operation is required before freeing the memory, as 10916f3d2701SScott Longdescribed below in 10926f3d2701SScott Long.Fn bus_dmamem_free . 10936f3d2701SScott LongMaps are automatically handled by this function and should not be explicitly 10946f3d2701SScott Longallocated or destroyed. 10956f3d2701SScott Long.Pp 10966f3d2701SScott LongAlthough an explicit load is not required for each access to the memory 109724503465SHiten Pandyareferenced by the returned map, the synchronization requirements 109824503465SHiten Pandyaas described in the 109924503465SHiten Pandya.Fn bus_dmamap_sync 11009280e5faSMike Pritchardsection still apply and should be used to achieve portability on architectures 11016f3d2701SScott Longwithout coherent buses. 110224503465SHiten Pandya.Pp 110324503465SHiten PandyaReturns 110424503465SHiten Pandya.Er ENOMEM 110524503465SHiten Pandyaif sufficient memory is not available for completing 110624503465SHiten Pandyathe operation. 110724503465SHiten Pandya.It Fn bus_dmamem_free "dmat" "*vaddr" "map" 110824503465SHiten PandyaFrees memory previously allocated by 110924503465SHiten Pandya.Fn bus_dmamem_alloc . 111024503465SHiten PandyaAny mappings 111124503465SHiten Pandyawill be invalidated. 111224503465SHiten PandyaArguments are as follows: 111381ae4b8dSRuslan Ermilov.Bl -tag -width ".Fa vaddr" 111424503465SHiten Pandya.It Fa dmat 111524503465SHiten PandyaDMA tag. 111624503465SHiten Pandya.It Fa vaddr 111724503465SHiten PandyaKernel virtual address of the memory. 111824503465SHiten Pandya.It Fa map 111924503465SHiten PandyaDMA map to be invalidated. 112024503465SHiten Pandya.El 112124503465SHiten Pandya.El 112224503465SHiten Pandya.Sh RETURN VALUES 112324503465SHiten PandyaBehavior is undefined if invalid arguments are passed to 112424503465SHiten Pandyaany of the above functions. 112524503465SHiten PandyaIf sufficient resources cannot be allocated for a given 112624503465SHiten Pandyatransaction, 112724503465SHiten Pandya.Er ENOMEM 112824503465SHiten Pandyais returned. 112924503465SHiten PandyaAll 11302f46d621SJohn Baldwinroutines that are not of type 11312f46d621SJohn Baldwin.Vt void 113224503465SHiten Pandyawill return 0 on success or an error 11332f46d621SJohn Baldwincode on failure as discussed above. 113424503465SHiten Pandya.Pp 113524503465SHiten PandyaAll 113624503465SHiten Pandya.Vt void 113724503465SHiten Pandyaroutines will succeed if provided with valid arguments. 11384905491fSScott Long.Sh LOCKING 11394905491fSScott LongTwo locking protocols are used by 11404905491fSScott Long.Nm . 11414905491fSScott LongThe first is a private global lock that is used to synchronize access to the 11424905491fSScott Longbounce buffer pool on the architectures that make use of them. 11434905491fSScott LongThis lock is strictly a leaf lock that is only used internally to 11444905491fSScott Long.Nm 11454905491fSScott Longand is not exposed to clients of the API. 11464905491fSScott Long.Pp 11474905491fSScott LongThe second protocol involves protecting various resources stored in the tag. 11484905491fSScott LongSince almost all 11494905491fSScott Long.Nm 11504905491fSScott Longoperations are done through requests from the driver that created the tag, 11514905491fSScott Longthe most efficient way to protect the tag resources is through the lock that 11524905491fSScott Longthe driver uses. 11534905491fSScott LongIn cases where 11544905491fSScott Long.Nm 11554905491fSScott Longacts on its own without being called by the driver, the lock primitive 11564905491fSScott Longspecified in the tag is acquired and released automatically. 11574905491fSScott LongAn example of this is when the 11584905491fSScott Long.Fn bus_dmamap_load 1159b1cc1020SGiorgos Keramidascallback function is called from a deferred context instead of the driver 11604905491fSScott Longcontext. 11614905491fSScott LongThis means that certain 11624905491fSScott Long.Nm 116381ae4b8dSRuslan Ermilovfunctions must always be called with the same lock held that is specified in the 116481ae4b8dSRuslan Ermilovtag. 116581ae4b8dSRuslan ErmilovThese functions include: 11664905491fSScott Long.Pp 116781ae4b8dSRuslan Ermilov.Bl -item -offset indent -compact 116881ae4b8dSRuslan Ermilov.It 116981ae4b8dSRuslan Ermilov.Fn bus_dmamap_load 117081ae4b8dSRuslan Ermilov.It 1171a073133cSJim Harris.Fn bus_dmamap_load_bio 1172a073133cSJim Harris.It 1173a073133cSJim Harris.Fn bus_dmamap_load_ccb 117481ae4b8dSRuslan Ermilov.It 117581ae4b8dSRuslan Ermilov.Fn bus_dmamap_load_mbuf 117681ae4b8dSRuslan Ermilov.It 117781ae4b8dSRuslan Ermilov.Fn bus_dmamap_load_mbuf_sg 117881ae4b8dSRuslan Ermilov.It 1179a073133cSJim Harris.Fn bus_dmamap_load_uio 1180a073133cSJim Harris.It 118181ae4b8dSRuslan Ermilov.Fn bus_dmamap_unload 118281ae4b8dSRuslan Ermilov.It 118381ae4b8dSRuslan Ermilov.Fn bus_dmamap_sync 11844905491fSScott Long.El 11854905491fSScott Long.Pp 11864905491fSScott LongThere is one exception to this rule. 11874905491fSScott LongIt is common practice to call some of these functions during driver start-up 11884905491fSScott Longwithout any locks held. 11894905491fSScott LongSo long as there is a guarantee of no possible concurrent use of the tag by 11904905491fSScott Longdifferent threads during this operation, it is safe to not hold a lock for 11914905491fSScott Longthese functions. 11924905491fSScott Long.Pp 11934905491fSScott LongCertain 11944905491fSScott Long.Nm 11954905491fSScott Longoperations should not be called with the driver lock held, either because 11964905491fSScott Longthey are already protected by an internal lock, or because they might sleep 119781ae4b8dSRuslan Ermilovdue to memory or resource allocation. 119881ae4b8dSRuslan ErmilovThe following functions must not be 11994905491fSScott Longcalled with any non-sleepable locks held: 12004905491fSScott Long.Pp 120181ae4b8dSRuslan Ermilov.Bl -item -offset indent -compact 120281ae4b8dSRuslan Ermilov.It 120381ae4b8dSRuslan Ermilov.Fn bus_dma_tag_create 120481ae4b8dSRuslan Ermilov.It 120581ae4b8dSRuslan Ermilov.Fn bus_dmamap_create 120681ae4b8dSRuslan Ermilov.It 120781ae4b8dSRuslan Ermilov.Fn bus_dmamem_alloc 12084905491fSScott Long.El 12094905491fSScott Long.Pp 12104905491fSScott LongAll other functions do not have a locking protocol and can thus be 12112f46d621SJohn Baldwincalled with or without any system or driver locks held. 121224503465SHiten Pandya.Sh SEE ALSO 121324503465SHiten Pandya.Xr devclass 9 , 121424503465SHiten Pandya.Xr device 9 , 121524503465SHiten Pandya.Xr driver 9 , 1216490ec740SWarner Losh.Xr rman 9 , 1217490ec740SWarner Losh.Xr vslock 9 121824503465SHiten Pandya.Pp 121924503465SHiten Pandya.Rs 122024503465SHiten Pandya.%A "Jason R. Thorpe" 122124503465SHiten Pandya.%T "A Machine-Independent DMA Framework for NetBSD" 122224503465SHiten Pandya.%J "Proceedings of the Summer 1998 USENIX Technical Conference" 122324503465SHiten Pandya.%Q "USENIX Association" 122424503465SHiten Pandya.%D "June 1998" 122524503465SHiten Pandya.Re 122624503465SHiten Pandya.Sh HISTORY 122724503465SHiten PandyaThe 122824503465SHiten Pandya.Nm 122924503465SHiten Pandyainterface first appeared in 123024503465SHiten Pandya.Nx 1.3 . 123124503465SHiten Pandya.Pp 123224503465SHiten PandyaThe 123324503465SHiten Pandya.Nm 123424503465SHiten PandyaAPI was adopted from 123524503465SHiten Pandya.Nx 123624503465SHiten Pandyafor use in the CAM SCSI subsystem. 123724503465SHiten PandyaThe alterations to the original API were aimed to remove the need for 123824503465SHiten Pandyaa 123924503465SHiten Pandya.Vt bus_dma_segment_t 124024503465SHiten Pandyaarray stored in each 124124503465SHiten Pandya.Vt bus_dmamap_t 124224503465SHiten Pandyawhile allowing callers to queue up on scarce resources. 124324503465SHiten Pandya.Sh AUTHORS 124424503465SHiten PandyaThe 124524503465SHiten Pandya.Nm 1246b9b855ddSMaxime Henrioninterface was designed and implemented by 1247b9b855ddSMaxime Henrion.An Jason R. Thorpe 1248b9b855ddSMaxime Henrionof the Numerical Aerospace Simulation Facility, NASA Ames Research Center. 124924503465SHiten PandyaAdditional input on the 125024503465SHiten Pandya.Nm 1251b9b855ddSMaxime Henriondesign was provided by 1252b9b855ddSMaxime Henrion.An -nosplit 1253b9b855ddSMaxime Henrion.An Chris Demetriou , 1254b9b855ddSMaxime Henrion.An Charles Hannum , 1255b9b855ddSMaxime Henrion.An Ross Harvey , 1256b9b855ddSMaxime Henrion.An Matthew Jacob , 1257b9b855ddSMaxime Henrion.An Jonathan Stone , 1258b9b855ddSMaxime Henrionand 1259b9b855ddSMaxime Henrion.An Matt Thomas . 126024503465SHiten Pandya.Pp 126124503465SHiten PandyaThe 126224503465SHiten Pandya.Nm 126324503465SHiten Pandyainterface in 126424503465SHiten Pandya.Fx 1265b9b855ddSMaxime Henrionbenefits from the contributions of 1266b9b855ddSMaxime Henrion.An Justin T. Gibbs , 1267b9b855ddSMaxime Henrion.An Peter Wemm , 1268b9b855ddSMaxime Henrion.An Doug Rabson , 1269b9b855ddSMaxime Henrion.An Matthew N. Dodd , 1270b9b855ddSMaxime Henrion.An Sam Leffler , 1271b9b855ddSMaxime Henrion.An Maxime Henrion , 1272b9b855ddSMaxime Henrion.An Jake Burkholder , 1273b9b855ddSMaxime Henrion.An Takahashi Yoshihiro , 1274b9b855ddSMaxime Henrion.An Scott Long 1275b9b855ddSMaxime Henrionand many others. 127624503465SHiten Pandya.Pp 1277b9b855ddSMaxime HenrionThis manual page was written by 1278b9b855ddSMaxime Henrion.An Hiten M. Pandya 1279b9b855ddSMaxime Henrionand 1280b9b855ddSMaxime Henrion.An Justin T. Gibbs . 1281