xref: /freebsd/share/man/man4/man4.arm/imx_wdog.4 (revision cd0d51baaa4509a1db83251a601d34404d20c990)
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26.\" $FreeBSD$
27.\"
28.Dd July 7, 2018
29.Dt IMX_WDOG 4
30.Os
31.Sh NAME
32.Nm imx_wdog
33.Nd device driver for the NXP i.MX5 and i.MX6 watchdog timer
34.Sh SYNOPSIS
35To compile this driver into the kernel,
36place the following line in your
37kernel configuration file:
38.Bd -ragged -offset indent
39.Cd "device imxwdt"
40.Ed
41.Pp
42Alternatively, to load the driver as a
43module at boot time, place the following line in
44.Xr loader.conf 5 :
45.Bd -literal -offset indent
46imx_wdog_load="YES"
47.Ed
48.Sh DESCRIPTION
49The
50.Nm
51driver provides
52.Xr watchdog 4
53support for the watchdog timer present on NXP i.MX5 and i.MX6 processors.
54The i.MX watchdog hardware supports programmable timeouts ranging from
550.5 to 128 seconds, in half-second increments.
56Once activated, the watchdog hardware cannot be deactivated, but the
57timeout period can be changed to any valid non-zero value.
58.Pp
59At power-on, a special 16-second
60.Sq power-down timer
61mode is automatically enabled by the hardware.
62It will assert the external WDOG_B signal, which may be connected to
63external hardware that causes the system to reset or power-down.
64The power-down timer is often reset by the boot loader (typically U-Boot).
65If the power-down timer is still active at the time when the normal
66watchdog is first enabled, the
67.Nm
68driver automatically disables it.
69.Pp
70The
71.Nm
72driver supports the FDT
73.Va fsl,external-reset
74property by enabling the assertion of the WDOG_B external timeout signal
75when the property is present.
76When running this way, the need to reset the system due to watchdog
77timeout is signaled by driving the WDOG_B line low; some external
78entity is expected to assert the chip's POR pin in response.
79The
80.Nm
81driver attempts to backstop this external reset by scheduling an
82interrupt to occur as well.
83The interrupt handler waits 1 second for the external reset to occur,
84then it triggers a normal software reset.
85Note that the WDOG_B signal can be configured to use a variety of
86pins on the chip.
87For the
88.Va fsl,external-reset
89property to be effective, the signal must be connected to an appropriate
90pin by the system's FDT pinctrl data.
91.Pp
92The
93.Nm
94driver supports the FDT
95.Va timeout-secs
96property by enabling the watchdog as soon as the driver attaches,
97using the given timeout value.
98This extends watchdog protection to much of the system startup process,
99but it still requires that
100.Xr watchdogd 4
101be configured to service the watchdog.
102.Sh SEE ALSO
103.Xr fdt 4 ,
104.Xr watchdog 4 ,
105.Xr watchdog 8 ,
106.Xr watchdogd 8 ,
107.Xr watchdog 9
108.Sh HISTORY
109The
110.Nm
111driver first appeared in
112.Fx 10.0 .
113