1.\" Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 2.\" All rights reserved. 3.\" 4.\" Redistribution and use in source and binary forms, with or without 5.\" modification, are permitted provided that the following conditions 6.\" are met: 7.\" 1. Redistributions of source code must retain the above copyright 8.\" notice, this list of conditions and the following disclaimer. 9.\" 2. Redistributions in binary form must reproduce the above copyright 10.\" notice, this list of conditions and the following disclaimer in the 11.\" documentation and/or other materials provided with the distribution. 12.\" 13.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23.\" SUCH DAMAGE. 24.\" 25.Dd September 14, 2010 26.Dt HPET 4 27.Os 28.Sh NAME 29.Nm hpet 30.Nd High Precision Event Timer driver 31.Sh SYNOPSIS 32To compile this driver into the kernel, 33place the following lines in your 34kernel configuration file: 35.Bd -ragged -offset indent 36.Cd "device acpi" 37.Ed 38.Pp 39The following tunables are settable from the 40.Xr loader 8 : 41.Bl -ohang 42.It Va hint.hpet. Ns Ar X Ns Va .allowed_irqs 43is a 32bit mask. 44Each set bit allows driver to use respective IRQ, 45if BIOS also set respective capability bit in comparator's configuration 46register. 47Default value is 0xffff0000, except some known broken hardware. 48.It Va hint.hpet. Ns Ar X Ns Va .clock 49controls event timers functionality support. 50Setting to 0, disables it. 51Default value is 1. 52.It Va hint.hpet. Ns Ar X Ns Va .legacy_route 53controls "LegacyReplacement Route" mode. 54If enabled, HPET will steal IRQ0 of i8254 timer and IRQ8 of RTC. 55Before using it, make sure that respective 56drivers are not using interrupts, by setting also: 57.Bd -literal 58hint.attimer.0.clock=0 59hint.atrtc.0.clock=0 60.Ed 61Default value is 0. 62.It Va hint.hpet. Ns Ar X Ns Va .per_cpu 63controls how much per-CPU event timers should driver attempt to register. 64This functionality requires every comparator in a group to have own unshared 65IRQ, so it depends on hardware capabilities and interrupts configuration. 66Default value is 1. 67.El 68.Sh DESCRIPTION 69This driver uses High Precision Event Timer hardware (part of the chipset, 70usually enumerated via ACPI) to supply kernel with one time counter and 71several (usually from 3 to 8) event timers. 72This hardware includes single main counter with known increment frequency 73(10MHz or more), and several programmable comparators (optionally with 74automatic reload feature). 75When value of the main counter matches current value of any comparator, 76interrupt can be generated. 77Depending on hardware capabilities and configuration, interrupt can be 78delivered as regular I/O APIC interrupt (ISA or PCI) in range from 0 to 31, 79or as Front Side Bus interrupt, alike to PCI MSI interrupts, or in so called 80"LegacyReplacement Route" HPET can steal IRQ0 of i8254 and IRQ8 of the RTC. 81Interrupt can be either edge- or level-triggered. 82In last case they could be safely shared with PCI IRQs. 83Driver prefers to use FSB interrupts, if supported, to avoid sharing. 84If it is not possible, it uses single sharable IRQ from PCI range. 85Other modes (LegacyReplacement and ISA IRQs) require special care to setup, 86but could be configured manually via device hints. 87.Pp 88Event timers provided by the driver support both one-shot an periodic modes 89and irrelevant to CPU power states. 90.Pp 91Depending on hardware capabilities and configuration, driver can expose each 92comparator as separate event timer or group them into one or several per-CPU 93event timers. 94In last case interrupt of every of those comparators within 95group is bound to specific CPU core. 96This is possible only when each of these comparators has own unsharable IRQ. 97.Sh SEE ALSO 98.Xr acpi 4 , 99.Xr apic 4 , 100.Xr atrtc 4 , 101.Xr attimer 4 , 102.Xr eventtimers 4 , 103.Xr timecounters 4 104.Sh HISTORY 105The 106.Nm 107driver first appeared in 108.Fx 6.3 . 109Support for event timers was added in 110.Fx 9.0 . 111