1.\" $OpenBSD: hifn.4,v 1.32 2002/09/26 07:55:40 miod Exp $ 2.\" 3.\" Copyright (c) 2000 Theo de Raadt 4.\" All rights reserved. 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 15.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18.\" DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25.\" POSSIBILITY OF SUCH DAMAGE. 26.\" 27.Dd July 29, 2020 28.Dt HIFN 4 29.Os 30.Sh NAME 31.Nm hifn 32.Nd Hifn 7751/7951/7811/7955/7956 crypto accelerator 33.Sh SYNOPSIS 34To compile this driver into the kernel, 35place the following lines in your 36kernel configuration file: 37.Bd -ragged -offset indent 38.Cd "device crypto" 39.Cd "device cryptodev" 40.Cd "device hifn" 41.Ed 42.Pp 43Alternatively, to load the driver as a 44module at boot time, place the following line in 45.Xr loader.conf 5 : 46.Bd -literal -offset indent 47hifn_load="YES" 48.Ed 49.Sh DESCRIPTION 50The 51.Nm 52driver supports various cards containing the Hifn 7751, 7951, 537811, 7955, and 7956 chipsets. 54.Pp 55The 56.Nm 57driver registers itself to accelerate 58AES (7955 and 7956 only), 59SHA1, and SHA1-HMAC operations for 60.Xr ipsec 4 61and 62.Xr crypto 4 . 63.Pp 64The Hifn 65.Tn 7951 , 66.Tn 7811 , 67.Tn 7955 , 68and 69.Tn 7956 70will also supply data to the kernel 71.Xr random 4 72subsystem. 73.Sh HARDWARE 74The 75.Nm 76driver supports various cards containing the Hifn 7751, 7951, 777811, 7955, and 7956 78chipsets, such as: 79.Bl -tag -width namenamenamena -offset indent 80.It Invertex AEON 81No longer being made. 82Came as 128KB SRAM model, or 2MB DRAM model. 83.It Hifn 7751 84Reference board with 512KB SRAM. 85.It PowerCrypt 86Comes with 512KB SRAM. 87.It XL-Crypt 88Only board based on 7811 (which is faster than 7751 and has 89a random number generator). 90.It NetSec 7751 91Supports the most IPsec sessions, with 1MB SRAM. 92.It Soekris Engineering vpn1201 and vpn1211 93See 94.Pa http://www.soekris.com/ . 95Contains a 7951 and supports symmetric and random number operations. 96.It Soekris Engineering vpn1401 and vpn1411 97See 98.Pa http://www.soekris.com/ . 99Contains a 7955 and supports symmetric and random number operations. 100.El 101.Sh SEE ALSO 102.Xr crypto 4 , 103.Xr intro 4 , 104.Xr ipsec 4 , 105.Xr random 4 , 106.Xr crypto 7 , 107.Xr crypto 9 108.Sh HISTORY 109The 110.Nm 111device driver appeared in 112.Ox 2.7 . 113The 114.Nm 115device driver was imported to 116.Fx 5.0 . 117.Sh CAVEATS 118The Hifn 9751 shares the same PCI ID. 119This chip is basically a 7751, but with the cryptographic functions missing. 120Instead, the 9751 is only capable of doing compression. 121Since we do not currently attempt to use any of these chips to do 122compression, the 9751-based cards are not useful. 123.Pp 124Support for the 7955 and 7956 is incomplete; the asymmetric crypto 125facilities are to be added and the performance is suboptimal. 126.Sh BUGS 127The 7751 chip starts out at initialization by only supporting compression. 128A proprietary algorithm, which has been reverse engineered, is required to 129unlock the cryptographic functionality of the chip. 130It is possible for vendors to make boards which have a lock ID not known 131to the driver, but all vendors currently just use the obvious ID which is 13213 bytes of 0. 133