xref: /freebsd/share/man/man4/gpioiic.4 (revision 8881d206f4e68b564c2c5f50fc717086fc3e827a)
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25.\" $FreeBSD$
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27.Dd December 1, 2019
28.Dt GPIOIIC 4
29.Os
30.Sh NAME
31.Nm gpioiic
32.Nd GPIO I2C bit-banging device driver
33.Sh SYNOPSIS
34To compile this driver into the kernel,
35place the following lines in your
36kernel configuration file:
37.Bd -ragged -offset indent
38.Cd "device gpio"
39.Cd "device gpioiic"
40.Cd "device iicbb"
41.Cd "device iicbus"
42.Ed
43.Pp
44Alternatively, to load the driver as a
45module at boot time, place the following line in
46.Xr loader.conf 5 :
47.Bd -literal -offset indent
48gpioiic_load="YES"
49.Ed
50.Sh DESCRIPTION
51The
52.Nm
53driver provides an IIC bit-banging interface using two GPIO pins for the
54SCL and SDA lines on the bus.
55.Pp
56.Nm
57simulates an open collector kind of output when managing the pins on the
58bus, even on systems which don't directly support configuring gpio pins
59in that mode.
60The pins are never driven to the logical value of '1'.
61They are driven to '0' or switched to input mode (Hi-Z/tri-state), and
62an external pullup resistor pulls the line to the 1 state unless some
63other device on the bus is driving it to 0.
64.Sh HINTS CONFIGURATION
65On a
66.Xr device.hints 5
67based system, such as MIPS, these values are configurable for
68.Nm :
69.Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
70.It Va hint.gpioiic.%d.at
71The
72.Nm gpiobus
73you are attaching to.
74Normally just gpiobus0 on systems with a single bank of gpio pins.
75.It Va hint.gpioiic.%d.pins
76This is a bitmask of the pins on the
77.Nm gpiobus
78that are to be used for SCLOCK and SDATA from the GPIO IIC
79bit-banging bus.
80To configure pin 0 and 7, use the bitmask of
810b10000001 and convert it to a hexadecimal value of 0x0081.
82Please note that this mask should only ever have two bits set
83(any other bits - i.e., pins - will be ignored).
84Because
85.Nm
86must be a child of the gpiobus, both gpio pins must be part of that bus.
87.It Va hint.gpioiic.%d.scl
88Indicates which bit in the
89.Va hint.gpioiic.%d.pins
90should be used as the SCLOCK
91source.
92Optional, defaults to 0.
93.It Va hint.gpioiic.%d.sda
94Indicates which bit in the
95.Va hint.gpioiic.%d.pins
96should be used as the SDATA
97source.
98Optional, defaults to 1.
99.El
100.Sh FDT CONFIGURATION
101On an
102.Xr FDT 4
103based system, such as ARM, the DTS node for
104.Nm gpioiic
105conforms to the standard bindings document i2c/i2c-gpio.yaml.
106The device node typically appears at the root of the device tree.
107The following is an example of a
108.Nm
109node with one slave device
110on the IIC bus:
111.Bd -literal
112/ {
113	gpioiic0 {
114		compatible = "i2c-gpio";
115		pinctrl-names = "default";
116		pinctrl-0 = <&pinctrl_gpioiic0>;
117		scl-gpios = <&gpio1  5 GPIO_ACTIVE_HIGH>;
118		sda-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
119		status = "okay";
120
121		/* One slave device on the i2c bus. */
122		rtc@51 {
123			compatible="nxp,pcf2127";
124			reg = <0x51>;
125			status = "okay";
126		};
127	};
128};
129.Ed
130.Pp
131Where:
132.Bl -tag -width ".Va compatible"
133.It Va compatible
134Should be set to "i2c-gpio".
135The deprecated string "gpioiic" is also accepted for backwards compatibility.
136.It Va scl-gpios Va sda-gpios
137These properties indicate which GPIO pins should be used for clock
138and data on the GPIO IIC bit-banging bus.
139There is no requirement that the two pins belong to the same gpio controller.
140.It Va pinctrl-names pinctrl-0
141These properties may be required to configure the chosen pins as gpio
142pins, unless the pins default to that state on your system.
143.El
144.Sh SEE ALSO
145.Xr fdt 4 ,
146.Xr gpio 4 ,
147.Xr iic 4 ,
148.Xr iicbb 4 ,
149.Xr iicbus 4
150.Sh HISTORY
151The
152.Nm
153manual page first appeared in
154.Fx 10.1 .
155.Sh AUTHORS
156This
157manual page was written by
158.An Luiz Otavio O Souza .
159