xref: /freebsd/share/man/man4/gpio.4 (revision eb69d1f144a6fcc765d1b9d44a5ae8082353e70b)
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25.\" $FreeBSD$
26.\"
27.Dd November 5, 2013
28.Dt GPIO 4
29.Os
30.Sh NAME
31.Nm gpiobus
32.Nd GPIO bus system
33.Sh SYNOPSIS
34To compile these devices into your kernel and use the device hints, place the
35following lines in your kernel configuration file:
36.Bd -ragged -offset indent
37.Cd "device gpio"
38.Cd "device gpioc"
39.Cd "device gpioiic"
40.Cd "device gpioled"
41.Ed
42.Pp
43Additional device entries for the
44.Li ARM
45architecture include:
46.Bd -ragged -offset indent
47.Cd "device a10_gpio"
48.Cd "device bcm_gpio"
49.Cd "device imx51_gpio"
50.Cd "device lpcgpio"
51.Cd "device mv_gpio"
52.Cd "device ti_gpio"
53.Cd "device gpio_avila"
54.Cd "device gpio_cambria"
55.Cd "device zy7_gpio"
56.Cd "device pxagpio"
57.Ed
58.Pp
59Additional device entries for the
60.Li MIPS
61architecture include:
62.Bd -ragged -offset indent
63.Cd "device ar71xxx_gpio"
64.Cd "device octeon_gpio"
65.Cd "device rt305_gpio"
66.Ed
67.Pp
68Additional device entries for the
69.Li POWERPC
70architecture include:
71.Bd -ragged -offset indent
72.Cd "device wiigpio"
73.Cd "device macgpio"
74.Ed
75.Sh DESCRIPTION
76The
77.Nm
78system provides a simple interface to the GPIO pins that are usually
79available on embedded architectures and can provide bit banging style
80devices to the system.
81.Pp
82The acronym
83.Li GPIO
84means
85.Dq General-Purpose Input/Output.
86.Pp
87The BUS physically consists of multiple pins that can be configured
88for input/output, IRQ delivery, SDA/SCL
89.Em iicbus
90use, etc.
91.Pp
92On some embedded architectures (like MIPS), discovery of the bus and
93configuration of the pins is done via
94.Xr device.hints 5
95in the platform's kernel
96.Xr config 5
97file.
98.Pp
99On some others (like ARM), where
100.Xr FDT 4
101is used to describe the device tree, the bus discovery is done via the DTS
102passed to the kernel, being either statically compiled in, or by a variety
103of ways where the boot loader (or Open Firmware enabled system) passes the
104DTS blob to the kernel at boot.
105.Pp
106The following
107.Xr device.hints 5
108are only provided by the
109.Cd ar71xx_gpio
110driver:
111.Bl -tag -width ".Va hint.gpioiic.%d.atXXX"
112.It Va hint.gpio.%d.pinmask
113This is a bitmask of pins on the GPIO board that we would like to expose
114for use to the host operating system.
115To expose pin 0, 4 and 7, use the bitmask of
11610010001 converted to the hexadecimal value 0x0091.
117.It Va hint.gpio.%d.pinon
118This is a bitmask of pins on the GPIO board that will be set to ON at host
119start.
120To set pin 2, 5 and 13 to be set ON at boot, use the bitmask of
12110000000010010 converted to the hexadecimal value 0x2012.
122.It Va hint.gpio.function_set
123.It Va hint.gpio.function_clear
124These are bitmasks of pins that will remap a pin to handle a specific
125function (USB, UART TX/RX, etc) in the Atheros function registers.
126This is mainly used to set/clear functions that we need when they are set up or
127not set up by uBoot.
128.El
129.Pp
130Simply put, each pin of the GPIO interface is connected to an input/output
131of some device in a system.
132.Sh SEE ALSO
133.Xr gpioiic 4 ,
134.Xr gpioled 4 ,
135.Xr iicbus 4 ,
136.Xr gpioctl 8
137.Sh HISTORY
138The
139.Nm
140manual page first appeared in
141.Fx 10.0 .
142.Sh AUTHORS
143This
144manual page was written by
145.An Sean Bruno Aq Mt sbruno@FreeBSD.org .
146