xref: /freebsd/share/man/man4/gpio.4 (revision 4f8f43b06ed07e96a250855488cc531799d5b78f)
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25.Dd June 27, 2019
26.Dt GPIO 4
27.Os
28.Sh NAME
29.Nm gpiobus
30.Nd GPIO bus system
31.Sh SYNOPSIS
32To compile these devices into your kernel and use the device hints, place the
33following lines in your kernel configuration file:
34.Bd -ragged -offset indent
35.Cd "device gpio"
36.Cd "device gpioc"
37.Cd "device gpioiic"
38.Cd "device gpioled"
39.Ed
40.Pp
41Additional device entries for the
42.Li ARM
43architecture include:
44.Bd -ragged -offset indent
45.Cd "device a10_gpio"
46.Cd "device bcm_gpio"
47.Cd "device imx51_gpio"
48.Cd "device lpcgpio"
49.Cd "device mv_gpio"
50.Cd "device ti_gpio"
51.Cd "device gpio_avila"
52.Cd "device gpio_cambria"
53.Cd "device zy7_gpio"
54.Cd "device pxagpio"
55.Ed
56.Pp
57Additional device entries for the
58.Li MIPS
59architecture include:
60.Bd -ragged -offset indent
61.Cd "device ar71xxx_gpio"
62.Cd "device octeon_gpio"
63.Cd "device rt305_gpio"
64.Ed
65.Pp
66Additional device entries for the
67.Li POWERPC
68architecture include:
69.Bd -ragged -offset indent
70.Cd "device wiigpio"
71.Cd "device macgpio"
72.Ed
73.Pp
74Additional device entries for the
75.Li RISC-V
76architecture include:
77.Bd -ragged -offset indent
78.Cd "device sifive_gpio"
79.Ed
80.Sh DESCRIPTION
81The
82.Nm
83system provides a simple interface to the GPIO pins that are usually
84available on embedded architectures and can provide bit banging style
85devices to the system.
86.Pp
87The acronym
88.Li GPIO
89means
90.Dq General-Purpose Input/Output.
91.Pp
92The BUS physically consists of multiple pins that can be configured
93for input/output, IRQ delivery, SDA/SCL
94.Em iicbus
95use, etc.
96.Pp
97On some embedded architectures (like MIPS), discovery of the bus and
98configuration of the pins is done via
99.Xr device.hints 5
100in the platform's kernel
101.Xr config 5
102file.
103.Pp
104On some others (like ARM), where
105.Xr FDT 4
106is used to describe the device tree, the bus discovery is done via the DTS
107passed to the kernel, being either statically compiled in, or by a variety
108of ways where the boot loader (or Open Firmware enabled system) passes the
109DTS blob to the kernel at boot.
110.Pp
111On a
112.Xr device.hints 5
113based system these hints can be used to configure drivers for devices
114attached to
115.Nm
116pins:
117.Bl -tag -width ".Va hint.driver.unit.pin_list"
118.It Va hint.driver.unit.at
119The
120.Nm gpiobus
121where the device is attached.
122For example,
123.Qq gpiobus0 .
124.Ar driver
125and
126.Ar unit
127are the driver name and the unit number for the device driver.
128.It Va hint.driver.unit.pins
129This is a bitmask of the pins on the
130.Nm gpiobus
131that are connected to the device.
132The pins will be allocated to the specified driver instance.
133Only pins with numbers from 0 to 31 can be specified using this hint.
134.It Va hint.driver.unit.pin_list
135This is a list of pin numbers of pins on the
136.Nm gpiobus
137that are connected to the device.
138The pins will be allocated to the specified driver instance.
139This is a more user friendly alternative to the
140.Ar pins
141hint.
142Additionally, this hint allows specifying pin numbers greater than 31.
143The numbers can be decimal or hexadecimal with 0x prefix.
144Any non-digit character can be used as a separator.
145For example, it can be a comma, a slash or a space.
146The separator can be followed by any number of space characters.
147.El
148.Pp
149The following
150.Xr device.hints 5
151are only provided by the
152.Cd ar71xx_gpio
153driver:
154.Bl -tag -width ".Va hint.gpio.function_clear"
155.It Va hint.gpio.%d.pinmask
156This is a bitmask of pins on the GPIO board that we would like to expose
157for use to the host operating system.
158To expose pin 0, 4 and 7, use the bitmask of
15910010001 converted to the hexadecimal value 0x0091.
160.It Va hint.gpio.%d.pinon
161This is a bitmask of pins on the GPIO board that will be set to ON at host
162start.
163To set pin 2, 5 and 13 to be set ON at boot, use the bitmask of
16410000000010010 converted to the hexadecimal value 0x2012.
165.It Va hint.gpio.function_set
166.It Va hint.gpio.function_clear
167These are bitmasks of pins that will remap a pin to handle a specific
168function (USB, UART TX/RX, etc) in the Atheros function registers.
169This is mainly used to set/clear functions that we need when they are set up or
170not set up by uBoot.
171.El
172.Pp
173Simply put, each pin of the GPIO interface is connected to an input/output
174of some device in a system.
175.Sh SEE ALSO
176.Xr gpioiic 4 ,
177.Xr gpioled 4 ,
178.Xr iicbus 4 ,
179.Xr device.hints 5 ,
180.Xr gpioctl 8
181.Sh HISTORY
182The
183.Nm
184manual page first appeared in
185.Fx 10.0 .
186.Sh AUTHORS
187This
188manual page was written by
189.An Sean Bruno Aq Mt sbruno@FreeBSD.org .
190