1.\"- 2.\" Copyright (c) 2013-2014 SRI International 3.\" All rights reserved. 4.\" 5.\" This software was developed by SRI International and the University of 6.\" Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7.\" ("CTSRD"), as part of the DARPA CRASH research programme. 8.\" 9.\" Redistribution and use in source and binary forms, with or without 10.\" modification, are permitted provided that the following conditions 11.\" are met: 12.\" 1. Redistributions of source code must retain the above copyright 13.\" notice, this list of conditions and the following disclaimer. 14.\" 2. Redistributions in binary form must reproduce the above copyright 15.\" notice, this list of conditions and the following disclaimer in the 16.\" documentation and/or other materials provided with the distribution. 17.\" 18.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28.\" SUCH DAMAGE. 29.\" 30.Dd May 21, 2014 31.Dt ALTERA_ATSE 4 32.Os 33.Sh NAME 34.Nm atse 35.Nd driver for the Altera Triple-Speed Ethernet MegaCore 36.Sh SYNOPSIS 37.Cd "device atse" 38.Cd "options ATSE_CFI_HACK" 39.Pp 40In 41.Pa /boot/device.hints : 42.Cd hint.atse.0.at="nexus0" 43.Cd hint.atse.0.maddr=0x7f007000 44.Cd hint.atse.0.msize=0x540 45.Cd hint.atse.0.rc_irq=1 46.Cd hint.atse.0.rx_maddr=0x7f007500 47.Cd hint.atse.0.rx_msize=0x8 48.Cd hint.atse.0.rxc_maddr=0x7f007520 49.Cd hint.atse.0.rxc_msize=0x20 50.Cd hint.atse.0.tx_irq=2 51.Cd hint.atse.0.tx_maddr=0x7f007400 52.Cd hint.atse.0.tx_msize=0x8 53.Cd hint.atse.0.txc_maddr=0x7f007420 54.Cd hint.atse.0.txc_msize=0x20 55.Cd hint.e1000phy.0.at="miibus0" 56.Cd hint.e1000phy.0.phyno=0 57.Sh DESCRIPTION 58The 59.Nm 60device driver provides support for the Altera Triple-Speed Ethernet 61MegaCore. 62.Sh HARDWARE 63The current version of the 64.Nm 65driver supports the Ethernet MegaCore as described in version 11.1 of 66Altera's documentation when the device is configured with internal FIFOs. 67.Sh MAC SELECTION 68The default MAC address for each 69.Nm 70interface is derived from a value stored in 71.Xr cfi 4 72flash. 73The value is managed by the 74.Xr atsectl 8 75utility. 76.Pp 77Only a single MAC address may be stored in flash. 78If the address begins with the Altera prefix 00:07:ed and ends in 00 then 79up to 16 addresses will be derived from it by adding the unit number of 80the interface to the stored address. 81For other prefixes, the address will be assigned to atse0 and random 82addresses will be used for other interfaces. 83If the stored address is invalid, for example all zero's, multicast, or the 84default address shipped on all DE4 boards (00:07:ed:ff:ed:15) then a random 85address is generated when the device is attached. 86.Sh SEE ALSO 87.Xr miibus 4 , 88.Xr netintro 4 , 89.Xr ifconfig 8 90.Rs 91.%T Triple-Speed Ethernet MegaCore Function User Guide 92.%D November 2011 93.%I Altera Corporation 94.Re 95.Sh HISTORY 96The 97.Nm 98device driver first appeared in 99.Fx 10.0 . 100.Sh AUTHORS 101The 102.Nm 103device driver and this manual page were 104developed by SRI International and the University of Cambridge Computer 105Laboratory under DARPA/AFRL contract 106.Pq FA8750-10-C-0237 107.Pq Do CTSRD Dc , 108as part of the DARPA CRASH research programme. 109This device driver was written by 110.An Bjoern A. Zeeb . 111.Sh BUGS 112The 113.Nm 114driver only supports a single configuration of the MegaCore as installed 115on the Terasic Technologies Altera DE4 Development and Education Board. 116.Pp 117Only gigabit Ethernet speeds are currently supported. 118